aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s5pv210/mach-torbreck.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-s5pv210/mach-torbreck.c')
-rw-r--r--arch/arm/mach-s5pv210/mach-torbreck.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c
index 043c938806b0..925fc0dc6252 100644
--- a/arch/arm/mach-s5pv210/mach-torbreck.c
+++ b/arch/arm/mach-s5pv210/mach-torbreck.c
@@ -27,6 +27,7 @@
27#include <plat/devs.h> 27#include <plat/devs.h>
28#include <plat/cpu.h> 28#include <plat/cpu.h>
29#include <plat/iic.h> 29#include <plat/iic.h>
30#include <plat/s5p-time.h>
30 31
31/* Following are default values for UCON, ULCON and UFCON UART registers */ 32/* Following are default values for UCON, ULCON and UFCON UART registers */
32#define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 33#define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
@@ -104,6 +105,7 @@ static void __init torbreck_map_io(void)
104 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 105 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
105 s3c24xx_init_clocks(24000000); 106 s3c24xx_init_clocks(24000000);
106 s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs)); 107 s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs));
108 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
107} 109}
108 110
109static void __init torbreck_machine_init(void) 111static void __init torbreck_machine_init(void)
@@ -127,5 +129,5 @@ MACHINE_START(TORBRECK, "TORBRECK")
127 .init_irq = s5pv210_init_irq, 129 .init_irq = s5pv210_init_irq,
128 .map_io = torbreck_map_io, 130 .map_io = torbreck_map_io,
129 .init_machine = torbreck_machine_init, 131 .init_machine = torbreck_machine_init,
130 .timer = &s3c24xx_timer, 132 .timer = &s5p_timer,
131MACHINE_END 133MACHINE_END