diff options
Diffstat (limited to 'arch/arm/mach-s5pc100')
-rw-r--r-- | arch/arm/mach-s5pc100/cpu.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/include/mach/regs-fb.h | 34 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/mach-smdkc100.c | 2 |
3 files changed, 3 insertions, 35 deletions
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/cpu.c index 799d22f41fcd..251c92ac5b22 100644 --- a/arch/arm/mach-s5pc100/cpu.c +++ b/arch/arm/mach-s5pc100/cpu.c | |||
@@ -43,6 +43,7 @@ | |||
43 | #include <plat/sdhci.h> | 43 | #include <plat/sdhci.h> |
44 | #include <plat/adc-core.h> | 44 | #include <plat/adc-core.h> |
45 | #include <plat/onenand-core.h> | 45 | #include <plat/onenand-core.h> |
46 | #include <plat/fb-core.h> | ||
46 | 47 | ||
47 | #include <plat/s5pc100.h> | 48 | #include <plat/s5pc100.h> |
48 | 49 | ||
@@ -96,6 +97,7 @@ void __init s5pc100_map_io(void) | |||
96 | s3c_i2c1_setname("s3c2440-i2c"); | 97 | s3c_i2c1_setname("s3c2440-i2c"); |
97 | 98 | ||
98 | s3c_onenand_setname("s5pc100-onenand"); | 99 | s3c_onenand_setname("s5pc100-onenand"); |
100 | s3c_fb_setname("s5pc100-fb"); | ||
99 | s3c_cfcon_setname("s5pc100-pata"); | 101 | s3c_cfcon_setname("s5pc100-pata"); |
100 | } | 102 | } |
101 | 103 | ||
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-fb.h b/arch/arm/mach-s5pc100/include/mach/regs-fb.h index 1732cd28c765..4be4cc9abf75 100644 --- a/arch/arm/mach-s5pc100/include/mach/regs-fb.h +++ b/arch/arm/mach-s5pc100/include/mach/regs-fb.h | |||
@@ -100,40 +100,6 @@ | |||
100 | #define BLENDCON (0x260) | 100 | #define BLENDCON (0x260) |
101 | #define BLENDCON_8BIT_ALPHA (1 << 0) | 101 | #define BLENDCON_8BIT_ALPHA (1 << 0) |
102 | 102 | ||
103 | /* Per-window palette base addresses (start of palette memory). | ||
104 | * Each window palette area consists of 256 32-bit entries. | ||
105 | * START is the first address (entry 0th), END is the address of 255th entry. | ||
106 | */ | ||
107 | #define WIN0_PAL_BASE (0x2400) | ||
108 | #define WIN0_PAL_END (0x27fc) | ||
109 | #define WIN1_PAL_BASE (0x2800) | ||
110 | #define WIN1_PAL_END (0x2bfc) | ||
111 | #define WIN2_PAL_BASE (0x2c00) | ||
112 | #define WIN2_PAL_END (0x2ffc) | ||
113 | #define WIN3_PAL_BASE (0x3000) | ||
114 | #define WIN3_PAL_END (0x33fc) | ||
115 | #define WIN4_PAL_BASE (0x3400) | ||
116 | #define WIN4_PAL_END (0x37fc) | ||
117 | |||
118 | #define WIN0_PAL(_entry) (WIN0_PAL_BASE + ((_entry) * 4)) | ||
119 | #define WIN1_PAL(_entry) (WIN1_PAL_BASE + ((_entry) * 4)) | ||
120 | #define WIN2_PAL(_entry) (WIN2_PAL_BASE + ((_entry) * 4)) | ||
121 | #define WIN3_PAL(_entry) (WIN3_PAL_BASE + ((_entry) * 4)) | ||
122 | #define WIN4_PAL(_entry) (WIN4_PAL_BASE + ((_entry) * 4)) | ||
123 | |||
124 | static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg) | ||
125 | { | ||
126 | switch (window) { | ||
127 | case 0: return WIN0_PAL(reg); | ||
128 | case 1: return WIN1_PAL(reg); | ||
129 | case 2: return WIN2_PAL(reg); | ||
130 | case 3: return WIN3_PAL(reg); | ||
131 | case 4: return WIN4_PAL(reg); | ||
132 | } | ||
133 | |||
134 | BUG(); | ||
135 | } | ||
136 | |||
137 | 103 | ||
138 | #endif /* __ASM_ARCH_REGS_FB_H */ | 104 | #endif /* __ASM_ARCH_REGS_FB_H */ |
139 | 105 | ||
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c index 2dc519c172ec..020c3f98f81f 100644 --- a/arch/arm/mach-s5pc100/mach-smdkc100.c +++ b/arch/arm/mach-s5pc100/mach-smdkc100.c | |||
@@ -133,7 +133,6 @@ static struct platform_device smdkc100_lcd_powerdev = { | |||
133 | static struct s3c_fb_pd_win smdkc100_fb_win0 = { | 133 | static struct s3c_fb_pd_win smdkc100_fb_win0 = { |
134 | /* this is to ensure we use win0 */ | 134 | /* this is to ensure we use win0 */ |
135 | .win_mode = { | 135 | .win_mode = { |
136 | .pixclock = 1000000000000ULL / ((8+13+3+800)*(7+5+1+480)*80), | ||
137 | .left_margin = 8, | 136 | .left_margin = 8, |
138 | .right_margin = 13, | 137 | .right_margin = 13, |
139 | .upper_margin = 7, | 138 | .upper_margin = 7, |
@@ -142,6 +141,7 @@ static struct s3c_fb_pd_win smdkc100_fb_win0 = { | |||
142 | .vsync_len = 1, | 141 | .vsync_len = 1, |
143 | .xres = 800, | 142 | .xres = 800, |
144 | .yres = 480, | 143 | .yres = 480, |
144 | .refresh = 80, | ||
145 | }, | 145 | }, |
146 | .max_bpp = 32, | 146 | .max_bpp = 32, |
147 | .default_bpp = 16, | 147 | .default_bpp = 16, |