2 files changed, 15 insertions, 37 deletions

diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index 16eca4ea2010..926219791f0d 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -564,19 +564,19 @@ static struct clk init_clocks_off[] = {
                 .ctrlbit        = (1 << 5),
         }, {
                 .name           = "spi",
-                .devname        = "s3c64xx-spi.0",
+                .devname        = "s5pc100-spi.0",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
                 .name           = "spi",
-                .devname        = "s3c64xx-spi.1",
+                .devname        = "s5pc100-spi.1",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 7),
         }, {
                 .name           = "spi",
-                .devname        = "s3c64xx-spi.2",
+                .devname        = "s5pc100-spi.2",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_4_ctrl,
                 .ctrlbit        = (1 << 8),
@@ -702,7 +702,7 @@ static struct clk clk_hsmmc0 = {
 
 static struct clk clk_48m_spi0 = {
         .name           = "spi_48m",
-        .devname        = "s3c64xx-spi.0",
+        .devname        = "s5pc100-spi.0",
         .parent         = &clk_mout_48m.clk,
         .enable         = s5pc100_sclk0_ctrl,
         .ctrlbit        = (1 << 7),
@@ -710,7 +710,7 @@ static struct clk clk_48m_spi0 = {
 
 static struct clk clk_48m_spi1 = {
         .name           = "spi_48m",
-        .devname        = "s3c64xx-spi.1",
+        .devname        = "s5pc100-spi.1",
         .parent         = &clk_mout_48m.clk,
         .enable         = s5pc100_sclk0_ctrl,
         .ctrlbit        = (1 << 8),
@@ -718,7 +718,7 @@ static struct clk clk_48m_spi1 = {
 
 static struct clk clk_48m_spi2 = {
         .name           = "spi_48m",
-        .devname        = "s3c64xx-spi.2",
+        .devname        = "s5pc100-spi.2",
         .parent         = &clk_mout_48m.clk,
         .enable         = s5pc100_sclk0_ctrl,
         .ctrlbit        = (1 << 9),
@@ -1085,7 +1085,7 @@ static struct clksrc_clk clk_sclk_mmc2 = {
 static struct clksrc_clk clk_sclk_spi0 = {
         .clk    = {
                 .name           = "sclk_spi",
-                .devname        = "s3c64xx-spi.0",
+                .devname        = "s5pc100-spi.0",
                 .ctrlbit        = (1 << 4),
                 .enable         = s5pc100_sclk0_ctrl,
         },
@@ -1097,7 +1097,7 @@ static struct clksrc_clk clk_sclk_spi0 = {
 static struct clksrc_clk clk_sclk_spi1 = {
         .clk    = {
                 .name           = "sclk_spi",
-                .devname        = "s3c64xx-spi.1",
+                .devname        = "s5pc100-spi.1",
                 .ctrlbit        = (1 << 5),
                 .enable         = s5pc100_sclk0_ctrl,
         },
@@ -1109,7 +1109,7 @@ static struct clksrc_clk clk_sclk_spi1 = {
 static struct clksrc_clk clk_sclk_spi2 = {
         .clk    = {
                 .name           = "sclk_spi",
-                .devname        = "s3c64xx-spi.2",
+                .devname        = "s5pc100-spi.2",
                 .ctrlbit        = (1 << 6),
                 .enable         = s5pc100_sclk0_ctrl,
         },
@@ -1315,12 +1315,12 @@ static struct clk_lookup s5pc100_clk_lookup[] = {
         CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
         CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
         CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
-        CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_48m_spi0),
-        CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &clk_sclk_spi0.clk),
-        CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_48m_spi1),
-        CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk2", &clk_sclk_spi1.clk),
-        CLKDEV_INIT("s3c64xx-spi.2", "spi_busclk1", &clk_48m_spi2),
-        CLKDEV_INIT("s3c64xx-spi.2", "spi_busclk2", &clk_sclk_spi2.clk),
+        CLKDEV_INIT("s5pc100-spi.0", "spi_busclk1", &clk_48m_spi0),
+        CLKDEV_INIT("s5pc100-spi.0", "spi_busclk2", &clk_sclk_spi0.clk),
+        CLKDEV_INIT("s5pc100-spi.1", "spi_busclk1", &clk_48m_spi1),
+        CLKDEV_INIT("s5pc100-spi.1", "spi_busclk2", &clk_sclk_spi1.clk),
+        CLKDEV_INIT("s5pc100-spi.2", "spi_busclk1", &clk_48m_spi2),
+        CLKDEV_INIT("s5pc100-spi.2", "spi_busclk2", &clk_sclk_spi2.clk),
 };
 
 void __init s5pc100_register_clocks(void)
diff --git a/arch/arm/mach-s5pc100/setup-spi.c b/arch/arm/mach-s5pc100/setup-spi.c
index 431a6f747caa..4b42718948a4 100644
--- a/arch/arm/mach-s5pc100/setup-spi.c
+++ b/arch/arm/mach-s5pc100/setup-spi.c
@@ -12,16 +12,8 @@
 #include <linux/platform_device.h>
 
 #include <plat/gpio-cfg.h>
-#include <plat/s3c64xx-spi.h>
 
 #ifdef CONFIG_S3C64XX_DEV_SPI0
-struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
-        .fifo_lvl_mask  = 0x7f,
-        .rx_lvl_offset  = 13,
-        .high_speed     = 1,
-        .tx_st_done     = 21,
-};
-
 int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
 {
         s3c_gpio_cfgall_range(S5PC100_GPB(0), 3,
@@ -31,13 +23,6 @@ int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
 #endif
 
 #ifdef CONFIG_S3C64XX_DEV_SPI1
-struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
-        .fifo_lvl_mask  = 0x7f,
-        .rx_lvl_offset  = 13,
-        .high_speed     = 1,
-        .tx_st_done     = 21,
-};
-
 int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
 {
         s3c_gpio_cfgall_range(S5PC100_GPB(4), 3,
@@ -47,13 +32,6 @@ int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
 #endif
 
 #ifdef CONFIG_S3C64XX_DEV_SPI2
-struct s3c64xx_spi_info s3c64xx_spi2_pdata __initdata = {
-        .fifo_lvl_mask  = 0x7f,
-        .rx_lvl_offset  = 13,
-        .high_speed     = 1,
-        .tx_st_done     = 21,
-};
-
 int s3c64xx_spi2_cfg_gpio(struct platform_device *dev)
 {
         s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3));