1 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index af22f8202a07..c708db35960d 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -44,16 +44,16 @@
 #include <plat/iic.h>
 /* Following are default values for UCON, ULCON and UFCON UART registers */
-#define S5PC100_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+#define SMDKC100_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |        \
                                 S3C2410_UCON_TXIRQMODE |       \
                                 S3C2410_UCON_RXIRQMODE |       \
                                 S3C2410_UCON_RXFIFO_TOI |      \
                                 S3C2443_UCON_RXERR_IRQEN)
-#define S5PC100_ULCON_DEFAULT   S3C2410_LCON_CS8
+#define SMDKC100_ULCON_DEFAULT  S3C2410_LCON_CS8
-#define S5PC100_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+#define SMDKC100_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
                                 S3C2440_UFCON_RXTRIG8 |        \
                                 S3C2440_UFCON_TXTRIG16)
@@ -61,30 +61,30 @@ static struct s3c2410_uartcfg smdkc100_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
                .flags       = 0,
-                .ucon        = S5PC100_UCON_DEFAULT,
+                .ucon        = SMDKC100_UCON_DEFAULT,
-                .ulcon       = S5PC100_ULCON_DEFAULT,
+                .ulcon       = SMDKC100_ULCON_DEFAULT,
-                .ufcon       = S5PC100_UFCON_DEFAULT,
+                .ufcon       = SMDKC100_UFCON_DEFAULT,
        },
        [1] = {
                .hwport      = 1,
                .flags       = 0,
-                .ucon        = S5PC100_UCON_DEFAULT,
+                .ucon        = SMDKC100_UCON_DEFAULT,
-                .ulcon       = S5PC100_ULCON_DEFAULT,
+                .ulcon       = SMDKC100_ULCON_DEFAULT,
-                .ufcon       = S5PC100_UFCON_DEFAULT,
+                .ufcon       = SMDKC100_UFCON_DEFAULT,
        },
        [2] = {
                .hwport      = 2,
                .flags       = 0,
-                .ucon        = S5PC100_UCON_DEFAULT,
+                .ucon        = SMDKC100_UCON_DEFAULT,
-                .ulcon       = S5PC100_ULCON_DEFAULT,
+                .ulcon       = SMDKC100_ULCON_DEFAULT,
-                .ufcon       = S5PC100_UFCON_DEFAULT,
+                .ufcon       = SMDKC100_UFCON_DEFAULT,
        },
        [3] = {
                .hwport      = 3,
                .flags       = 0,
-                .ucon        = S5PC100_UCON_DEFAULT,
+                .ucon        = SMDKC100_UCON_DEFAULT,
-                .ulcon       = S5PC100_ULCON_DEFAULT,
+                .ulcon       = SMDKC100_ULCON_DEFAULT,
-                .ufcon       = S5PC100_UFCON_DEFAULT,
+                .ufcon       = SMDKC100_UFCON_DEFAULT,
        },
 };

diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c index af22f8202a07..c708db35960d 100644 --- a/arch/arm/mach-s5pc100/mach-smdkc100.c +++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -44,16 +44,16 @@
44	#include <plat/iic.h>	44	#include <plat/iic.h>
45		45
46	/* Following are default values for UCON, ULCON and UFCON UART registers */	46	/* Following are default values for UCON, ULCON and UFCON UART registers */
47	#define S5PC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL \| \	47	#define SMDKC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL \| \
48	S3C2410_UCON_RXILEVEL \| \	48	S3C2410_UCON_RXILEVEL \| \
49	S3C2410_UCON_TXIRQMODE \| \	49	S3C2410_UCON_TXIRQMODE \| \
50	S3C2410_UCON_RXIRQMODE \| \	50	S3C2410_UCON_RXIRQMODE \| \
51	S3C2410_UCON_RXFIFO_TOI \| \	51	S3C2410_UCON_RXFIFO_TOI \| \
52	S3C2443_UCON_RXERR_IRQEN)	52	S3C2443_UCON_RXERR_IRQEN)
53		53
54	#define S5PC100_ULCON_DEFAULT S3C2410_LCON_CS8	54	#define SMDKC100_ULCON_DEFAULT S3C2410_LCON_CS8
55		55
56	#define S5PC100_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE \| \	56	#define SMDKC100_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE \| \
57	S3C2440_UFCON_RXTRIG8 \| \	57	S3C2440_UFCON_RXTRIG8 \| \
58	S3C2440_UFCON_TXTRIG16)	58	S3C2440_UFCON_TXTRIG16)
59		59
@@ -61,30 +61,30 @@ static struct s3c2410_uartcfg smdkc100_uartcfgs[] __initdata = {
61	[0] = {	61	[0] = {
62	.hwport = 0,	62	.hwport = 0,
63	.flags = 0,	63	.flags = 0,
64	.ucon = S5PC100_UCON_DEFAULT,	64	.ucon = SMDKC100_UCON_DEFAULT,
65	.ulcon = S5PC100_ULCON_DEFAULT,	65	.ulcon = SMDKC100_ULCON_DEFAULT,
66	.ufcon = S5PC100_UFCON_DEFAULT,	66	.ufcon = SMDKC100_UFCON_DEFAULT,
67	},	67	},
68	[1] = {	68	[1] = {
69	.hwport = 1,	69	.hwport = 1,
70	.flags = 0,	70	.flags = 0,
71	.ucon = S5PC100_UCON_DEFAULT,	71	.ucon = SMDKC100_UCON_DEFAULT,
72	.ulcon = S5PC100_ULCON_DEFAULT,	72	.ulcon = SMDKC100_ULCON_DEFAULT,
73	.ufcon = S5PC100_UFCON_DEFAULT,	73	.ufcon = SMDKC100_UFCON_DEFAULT,
74	},	74	},
75	[2] = {	75	[2] = {
76	.hwport = 2,	76	.hwport = 2,
77	.flags = 0,	77	.flags = 0,
78	.ucon = S5PC100_UCON_DEFAULT,	78	.ucon = SMDKC100_UCON_DEFAULT,
79	.ulcon = S5PC100_ULCON_DEFAULT,	79	.ulcon = SMDKC100_ULCON_DEFAULT,
80	.ufcon = S5PC100_UFCON_DEFAULT,	80	.ufcon = SMDKC100_UFCON_DEFAULT,
81	},	81	},
82	[3] = {	82	[3] = {
83	.hwport = 3,	83	.hwport = 3,
84	.flags = 0,	84	.flags = 0,
85	.ucon = S5PC100_UCON_DEFAULT,	85	.ucon = SMDKC100_UCON_DEFAULT,
86	.ulcon = S5PC100_ULCON_DEFAULT,	86	.ulcon = SMDKC100_ULCON_DEFAULT,
87	.ufcon = S5PC100_UFCON_DEFAULT,	87	.ufcon = SMDKC100_UFCON_DEFAULT,
88	},	88	},
89	};	89	};
90		90