diff options
Diffstat (limited to 'arch/arm/mach-s5pc100/clock.c')
-rw-r--r-- | arch/arm/mach-s5pc100/clock.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c index ff5cbb30de5b..6527c05c5fa1 100644 --- a/arch/arm/mach-s5pc100/clock.c +++ b/arch/arm/mach-s5pc100/clock.c | |||
@@ -33,6 +33,11 @@ static struct clk s5p_clk_otgphy = { | |||
33 | .name = "otg_phy", | 33 | .name = "otg_phy", |
34 | }; | 34 | }; |
35 | 35 | ||
36 | static struct clk dummy_apb_pclk = { | ||
37 | .name = "apb_pclk", | ||
38 | .id = -1, | ||
39 | }; | ||
40 | |||
36 | static struct clk *clk_src_mout_href_list[] = { | 41 | static struct clk *clk_src_mout_href_list[] = { |
37 | [0] = &s5p_clk_27m, | 42 | [0] = &s5p_clk_27m, |
38 | [1] = &clk_fin_hpll, | 43 | [1] = &clk_fin_hpll, |
@@ -454,13 +459,13 @@ static struct clk init_clocks_off[] = { | |||
454 | .enable = s5pc100_d1_0_ctrl, | 459 | .enable = s5pc100_d1_0_ctrl, |
455 | .ctrlbit = (1 << 2), | 460 | .ctrlbit = (1 << 2), |
456 | }, { | 461 | }, { |
457 | .name = "pdma", | 462 | .name = "dma", |
458 | .devname = "s3c-pl330.1", | 463 | .devname = "s3c-pl330.1", |
459 | .parent = &clk_div_d1_bus.clk, | 464 | .parent = &clk_div_d1_bus.clk, |
460 | .enable = s5pc100_d1_0_ctrl, | 465 | .enable = s5pc100_d1_0_ctrl, |
461 | .ctrlbit = (1 << 1), | 466 | .ctrlbit = (1 << 1), |
462 | }, { | 467 | }, { |
463 | .name = "pdma", | 468 | .name = "dma", |
464 | .devname = "s3c-pl330.0", | 469 | .devname = "s3c-pl330.0", |
465 | .parent = &clk_div_d1_bus.clk, | 470 | .parent = &clk_div_d1_bus.clk, |
466 | .enable = s5pc100_d1_0_ctrl, | 471 | .enable = s5pc100_d1_0_ctrl, |
@@ -1276,5 +1281,7 @@ void __init s5pc100_register_clocks(void) | |||
1276 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 1281 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1277 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | 1282 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1278 | 1283 | ||
1284 | s3c24xx_register_clock(&dummy_apb_pclk); | ||
1285 | |||
1279 | s3c_pwmclk_init(); | 1286 | s3c_pwmclk_init(); |
1280 | } | 1287 | } |