diff options
Diffstat (limited to 'arch/arm/mach-s5p64x0')
-rw-r--r-- | arch/arm/mach-s5p64x0/clock-s5p6440.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/clock-s5p6450.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/setup-spi.c | 21 |
3 files changed, 14 insertions, 31 deletions
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c index ee1e8e7f5631..000445596ec4 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6440.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c | |||
@@ -227,13 +227,13 @@ static struct clk init_clocks_off[] = { | |||
227 | .ctrlbit = (1 << 17), | 227 | .ctrlbit = (1 << 17), |
228 | }, { | 228 | }, { |
229 | .name = "spi", | 229 | .name = "spi", |
230 | .devname = "s3c64xx-spi.0", | 230 | .devname = "s5p64x0-spi.0", |
231 | .parent = &clk_pclk_low.clk, | 231 | .parent = &clk_pclk_low.clk, |
232 | .enable = s5p64x0_pclk_ctrl, | 232 | .enable = s5p64x0_pclk_ctrl, |
233 | .ctrlbit = (1 << 21), | 233 | .ctrlbit = (1 << 21), |
234 | }, { | 234 | }, { |
235 | .name = "spi", | 235 | .name = "spi", |
236 | .devname = "s3c64xx-spi.1", | 236 | .devname = "s5p64x0-spi.1", |
237 | .parent = &clk_pclk_low.clk, | 237 | .parent = &clk_pclk_low.clk, |
238 | .enable = s5p64x0_pclk_ctrl, | 238 | .enable = s5p64x0_pclk_ctrl, |
239 | .ctrlbit = (1 << 22), | 239 | .ctrlbit = (1 << 22), |
@@ -467,7 +467,7 @@ static struct clksrc_clk clk_sclk_uclk = { | |||
467 | static struct clksrc_clk clk_sclk_spi0 = { | 467 | static struct clksrc_clk clk_sclk_spi0 = { |
468 | .clk = { | 468 | .clk = { |
469 | .name = "sclk_spi", | 469 | .name = "sclk_spi", |
470 | .devname = "s3c64xx-spi.0", | 470 | .devname = "s5p64x0-spi.0", |
471 | .ctrlbit = (1 << 20), | 471 | .ctrlbit = (1 << 20), |
472 | .enable = s5p64x0_sclk_ctrl, | 472 | .enable = s5p64x0_sclk_ctrl, |
473 | }, | 473 | }, |
@@ -479,7 +479,7 @@ static struct clksrc_clk clk_sclk_spi0 = { | |||
479 | static struct clksrc_clk clk_sclk_spi1 = { | 479 | static struct clksrc_clk clk_sclk_spi1 = { |
480 | .clk = { | 480 | .clk = { |
481 | .name = "sclk_spi", | 481 | .name = "sclk_spi", |
482 | .devname = "s3c64xx-spi.1", | 482 | .devname = "s5p64x0-spi.1", |
483 | .ctrlbit = (1 << 21), | 483 | .ctrlbit = (1 << 21), |
484 | .enable = s5p64x0_sclk_ctrl, | 484 | .enable = s5p64x0_sclk_ctrl, |
485 | }, | 485 | }, |
@@ -519,8 +519,8 @@ static struct clk_lookup s5p6440_clk_lookup[] = { | |||
519 | CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_pclk_low.clk), | 519 | CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_pclk_low.clk), |
520 | CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk), | 520 | CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk), |
521 | CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), | 521 | CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), |
522 | CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), | 522 | CLKDEV_INIT("s5p64x0-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), |
523 | CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), | 523 | CLKDEV_INIT("s5p64x0-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), |
524 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), | 524 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), |
525 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), | 525 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), |
526 | CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), | 526 | CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), |
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c index dae6a13f43bb..f3e0ef3d27c9 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6450.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c | |||
@@ -236,13 +236,13 @@ static struct clk init_clocks_off[] = { | |||
236 | .ctrlbit = (1 << 17), | 236 | .ctrlbit = (1 << 17), |
237 | }, { | 237 | }, { |
238 | .name = "spi", | 238 | .name = "spi", |
239 | .devname = "s3c64xx-spi.0", | 239 | .devname = "s5p64x0-spi.0", |
240 | .parent = &clk_pclk_low.clk, | 240 | .parent = &clk_pclk_low.clk, |
241 | .enable = s5p64x0_pclk_ctrl, | 241 | .enable = s5p64x0_pclk_ctrl, |
242 | .ctrlbit = (1 << 21), | 242 | .ctrlbit = (1 << 21), |
243 | }, { | 243 | }, { |
244 | .name = "spi", | 244 | .name = "spi", |
245 | .devname = "s3c64xx-spi.1", | 245 | .devname = "s5p64x0-spi.1", |
246 | .parent = &clk_pclk_low.clk, | 246 | .parent = &clk_pclk_low.clk, |
247 | .enable = s5p64x0_pclk_ctrl, | 247 | .enable = s5p64x0_pclk_ctrl, |
248 | .ctrlbit = (1 << 22), | 248 | .ctrlbit = (1 << 22), |
@@ -528,7 +528,7 @@ static struct clksrc_clk clk_sclk_uclk = { | |||
528 | static struct clksrc_clk clk_sclk_spi0 = { | 528 | static struct clksrc_clk clk_sclk_spi0 = { |
529 | .clk = { | 529 | .clk = { |
530 | .name = "sclk_spi", | 530 | .name = "sclk_spi", |
531 | .devname = "s3c64xx-spi.0", | 531 | .devname = "s5p64x0-spi.0", |
532 | .ctrlbit = (1 << 20), | 532 | .ctrlbit = (1 << 20), |
533 | .enable = s5p64x0_sclk_ctrl, | 533 | .enable = s5p64x0_sclk_ctrl, |
534 | }, | 534 | }, |
@@ -540,7 +540,7 @@ static struct clksrc_clk clk_sclk_spi0 = { | |||
540 | static struct clksrc_clk clk_sclk_spi1 = { | 540 | static struct clksrc_clk clk_sclk_spi1 = { |
541 | .clk = { | 541 | .clk = { |
542 | .name = "sclk_spi", | 542 | .name = "sclk_spi", |
543 | .devname = "s3c64xx-spi.1", | 543 | .devname = "s5p64x0-spi.1", |
544 | .ctrlbit = (1 << 21), | 544 | .ctrlbit = (1 << 21), |
545 | .enable = s5p64x0_sclk_ctrl, | 545 | .enable = s5p64x0_sclk_ctrl, |
546 | }, | 546 | }, |
@@ -562,8 +562,8 @@ static struct clk_lookup s5p6450_clk_lookup[] = { | |||
562 | CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_pclk_low.clk), | 562 | CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_pclk_low.clk), |
563 | CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk), | 563 | CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk), |
564 | CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), | 564 | CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), |
565 | CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), | 565 | CLKDEV_INIT("s5p64x0-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), |
566 | CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), | 566 | CLKDEV_INIT("s5p64x0-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), |
567 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), | 567 | CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), |
568 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), | 568 | CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), |
569 | CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), | 569 | CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), |
diff --git a/arch/arm/mach-s5p64x0/setup-spi.c b/arch/arm/mach-s5p64x0/setup-spi.c index e9b841240352..7664356720ca 100644 --- a/arch/arm/mach-s5p64x0/setup-spi.c +++ b/arch/arm/mach-s5p64x0/setup-spi.c | |||
@@ -9,21 +9,10 @@ | |||
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <linux/gpio.h> | 11 | #include <linux/gpio.h> |
12 | #include <linux/platform_device.h> | ||
13 | #include <linux/io.h> | ||
14 | |||
15 | #include <plat/gpio-cfg.h> | 12 | #include <plat/gpio-cfg.h> |
16 | #include <plat/cpu.h> | ||
17 | #include <plat/s3c64xx-spi.h> | ||
18 | 13 | ||
19 | #ifdef CONFIG_S3C64XX_DEV_SPI0 | 14 | #ifdef CONFIG_S3C64XX_DEV_SPI0 |
20 | struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = { | 15 | int s3c64xx_spi0_cfg_gpio(void) |
21 | .fifo_lvl_mask = 0x1ff, | ||
22 | .rx_lvl_offset = 15, | ||
23 | .tx_st_done = 25, | ||
24 | }; | ||
25 | |||
26 | int s3c64xx_spi0_cfg_gpio(struct platform_device *dev) | ||
27 | { | 16 | { |
28 | if (soc_is_s5p6450()) | 17 | if (soc_is_s5p6450()) |
29 | s3c_gpio_cfgall_range(S5P6450_GPC(0), 3, | 18 | s3c_gpio_cfgall_range(S5P6450_GPC(0), 3, |
@@ -36,13 +25,7 @@ int s3c64xx_spi0_cfg_gpio(struct platform_device *dev) | |||
36 | #endif | 25 | #endif |
37 | 26 | ||
38 | #ifdef CONFIG_S3C64XX_DEV_SPI1 | 27 | #ifdef CONFIG_S3C64XX_DEV_SPI1 |
39 | struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = { | 28 | int s3c64xx_spi1_cfg_gpio(void) |
40 | .fifo_lvl_mask = 0x7f, | ||
41 | .rx_lvl_offset = 15, | ||
42 | .tx_st_done = 25, | ||
43 | }; | ||
44 | |||
45 | int s3c64xx_spi1_cfg_gpio(struct platform_device *dev) | ||
46 | { | 29 | { |
47 | if (soc_is_s5p6450()) | 30 | if (soc_is_s5p6450()) |
48 | s3c_gpio_cfgall_range(S5P6450_GPC(4), 3, | 31 | s3c_gpio_cfgall_range(S5P6450_GPC(4), 3, |