diff options
Diffstat (limited to 'arch/arm/mach-s5p64x0')
-rw-r--r-- | arch/arm/mach-s5p64x0/dev-audio.c | 26 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/dev-spi.c | 38 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/setup-i2c0.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/setup-i2c1.c | 12 |
4 files changed, 29 insertions, 59 deletions
diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c index fa097bd68ca4..396bacc0a39a 100644 --- a/arch/arm/mach-s5p64x0/dev-audio.c +++ b/arch/arm/mach-s5p64x0/dev-audio.c | |||
@@ -24,13 +24,8 @@ static int s5p6440_cfg_i2s(struct platform_device *pdev) | |||
24 | /* configure GPIO for i2s port */ | 24 | /* configure GPIO for i2s port */ |
25 | switch (pdev->id) { | 25 | switch (pdev->id) { |
26 | case -1: | 26 | case -1: |
27 | s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5)); | 27 | s3c_gpio_cfgpin_range(S5P6440_GPR(4), 5, S3C_GPIO_SFN(5)); |
28 | s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5)); | 28 | s3c_gpio_cfgpin_range(S5P6440_GPR(13), 2, S3C_GPIO_SFN(5)); |
29 | s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5)); | ||
30 | s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5)); | ||
31 | s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5)); | ||
32 | s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5)); | ||
33 | s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5)); | ||
34 | break; | 29 | break; |
35 | 30 | ||
36 | default: | 31 | default: |
@@ -47,13 +42,9 @@ static int s5p6450_cfg_i2s(struct platform_device *pdev) | |||
47 | switch (pdev->id) { | 42 | switch (pdev->id) { |
48 | case -1: | 43 | case -1: |
49 | s3c_gpio_cfgpin(S5P6450_GPB(4), S3C_GPIO_SFN(5)); | 44 | s3c_gpio_cfgpin(S5P6450_GPB(4), S3C_GPIO_SFN(5)); |
50 | s3c_gpio_cfgpin(S5P6450_GPR(4), S3C_GPIO_SFN(5)); | 45 | s3c_gpio_cfgpin_range(S5P6450_GPR(4), 5, S3C_GPIO_SFN(5)); |
51 | s3c_gpio_cfgpin(S5P6450_GPR(5), S3C_GPIO_SFN(5)); | 46 | s3c_gpio_cfgpin_range(S5P6450_GPR(13), 2, S3C_GPIO_SFN(5)); |
52 | s3c_gpio_cfgpin(S5P6450_GPR(6), S3C_GPIO_SFN(5)); | 47 | |
53 | s3c_gpio_cfgpin(S5P6450_GPR(7), S3C_GPIO_SFN(5)); | ||
54 | s3c_gpio_cfgpin(S5P6450_GPR(8), S3C_GPIO_SFN(5)); | ||
55 | s3c_gpio_cfgpin(S5P6450_GPR(13), S3C_GPIO_SFN(5)); | ||
56 | s3c_gpio_cfgpin(S5P6450_GPR(14), S3C_GPIO_SFN(5)); | ||
57 | break; | 48 | break; |
58 | 49 | ||
59 | default: | 50 | default: |
@@ -116,11 +107,8 @@ static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev) | |||
116 | { | 107 | { |
117 | switch (pdev->id) { | 108 | switch (pdev->id) { |
118 | case 0: | 109 | case 0: |
119 | s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2)); | 110 | s3c_gpio_cfgpin_range(S5P6440_GPR(6), 3, S3C_GPIO_SFN(2)); |
120 | s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2)); | 111 | s3c_gpio_cfgpin_range(S5P6440_GPR(13), 2, S3C_GPIO_SFN(2)); |
121 | s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2)); | ||
122 | s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2)); | ||
123 | s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2)); | ||
124 | break; | 112 | break; |
125 | 113 | ||
126 | default: | 114 | default: |
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c index 5b69ec4c8af3..e78ee18c76e3 100644 --- a/arch/arm/mach-s5p64x0/dev-spi.c +++ b/arch/arm/mach-s5p64x0/dev-spi.c | |||
@@ -39,23 +39,15 @@ static char *s5p64x0_spi_src_clks[] = { | |||
39 | */ | 39 | */ |
40 | static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) | 40 | static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) |
41 | { | 41 | { |
42 | unsigned int base; | ||
43 | |||
42 | switch (pdev->id) { | 44 | switch (pdev->id) { |
43 | case 0: | 45 | case 0: |
44 | s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2)); | 46 | base = S5P6440_GPC(0); |
45 | s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2)); | ||
46 | s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2)); | ||
47 | s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP); | ||
48 | s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP); | ||
49 | s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP); | ||
50 | break; | 47 | break; |
51 | 48 | ||
52 | case 1: | 49 | case 1: |
53 | s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2)); | 50 | base = S5P6440_GPC(4); |
54 | s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2)); | ||
55 | s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2)); | ||
56 | s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP); | ||
57 | s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP); | ||
58 | s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP); | ||
59 | break; | 51 | break; |
60 | 52 | ||
61 | default: | 53 | default: |
@@ -63,28 +55,23 @@ static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) | |||
63 | return -EINVAL; | 55 | return -EINVAL; |
64 | } | 56 | } |
65 | 57 | ||
58 | s3c_gpio_cfgall_range(base, 3, | ||
59 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
60 | |||
66 | return 0; | 61 | return 0; |
67 | } | 62 | } |
68 | 63 | ||
69 | static int s5p6450_spi_cfg_gpio(struct platform_device *pdev) | 64 | static int s5p6450_spi_cfg_gpio(struct platform_device *pdev) |
70 | { | 65 | { |
66 | unsigned int base; | ||
67 | |||
71 | switch (pdev->id) { | 68 | switch (pdev->id) { |
72 | case 0: | 69 | case 0: |
73 | s3c_gpio_cfgpin(S5P6450_GPC(0), S3C_GPIO_SFN(2)); | 70 | base = S5P6450_GPC(0); |
74 | s3c_gpio_cfgpin(S5P6450_GPC(1), S3C_GPIO_SFN(2)); | ||
75 | s3c_gpio_cfgpin(S5P6450_GPC(2), S3C_GPIO_SFN(2)); | ||
76 | s3c_gpio_setpull(S5P6450_GPC(0), S3C_GPIO_PULL_UP); | ||
77 | s3c_gpio_setpull(S5P6450_GPC(1), S3C_GPIO_PULL_UP); | ||
78 | s3c_gpio_setpull(S5P6450_GPC(2), S3C_GPIO_PULL_UP); | ||
79 | break; | 71 | break; |
80 | 72 | ||
81 | case 1: | 73 | case 1: |
82 | s3c_gpio_cfgpin(S5P6450_GPC(4), S3C_GPIO_SFN(2)); | 74 | base = S5P6450_GPC(4); |
83 | s3c_gpio_cfgpin(S5P6450_GPC(5), S3C_GPIO_SFN(2)); | ||
84 | s3c_gpio_cfgpin(S5P6450_GPC(6), S3C_GPIO_SFN(2)); | ||
85 | s3c_gpio_setpull(S5P6450_GPC(4), S3C_GPIO_PULL_UP); | ||
86 | s3c_gpio_setpull(S5P6450_GPC(5), S3C_GPIO_PULL_UP); | ||
87 | s3c_gpio_setpull(S5P6450_GPC(6), S3C_GPIO_PULL_UP); | ||
88 | break; | 75 | break; |
89 | 76 | ||
90 | default: | 77 | default: |
@@ -92,6 +79,9 @@ static int s5p6450_spi_cfg_gpio(struct platform_device *pdev) | |||
92 | return -EINVAL; | 79 | return -EINVAL; |
93 | } | 80 | } |
94 | 81 | ||
82 | s3c_gpio_cfgall_range(base, 3, | ||
83 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
84 | |||
95 | return 0; | 85 | return 0; |
96 | } | 86 | } |
97 | 87 | ||
diff --git a/arch/arm/mach-s5p64x0/setup-i2c0.c b/arch/arm/mach-s5p64x0/setup-i2c0.c index dc4cc65a5019..46b463917c54 100644 --- a/arch/arm/mach-s5p64x0/setup-i2c0.c +++ b/arch/arm/mach-s5p64x0/setup-i2c0.c | |||
@@ -25,18 +25,14 @@ struct platform_device; /* don't need the contents */ | |||
25 | 25 | ||
26 | void s5p6440_i2c0_cfg_gpio(struct platform_device *dev) | 26 | void s5p6440_i2c0_cfg_gpio(struct platform_device *dev) |
27 | { | 27 | { |
28 | s3c_gpio_cfgpin(S5P6440_GPB(5), S3C_GPIO_SFN(2)); | 28 | s3c_gpio_cfgall_range(S5P6440_GPB(5), 2, |
29 | s3c_gpio_setpull(S5P6440_GPB(5), S3C_GPIO_PULL_UP); | 29 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); |
30 | s3c_gpio_cfgpin(S5P6440_GPB(6), S3C_GPIO_SFN(2)); | ||
31 | s3c_gpio_setpull(S5P6440_GPB(6), S3C_GPIO_PULL_UP); | ||
32 | } | 30 | } |
33 | 31 | ||
34 | void s5p6450_i2c0_cfg_gpio(struct platform_device *dev) | 32 | void s5p6450_i2c0_cfg_gpio(struct platform_device *dev) |
35 | { | 33 | { |
36 | s3c_gpio_cfgpin(S5P6450_GPB(5), S3C_GPIO_SFN(2)); | 34 | s3c_gpio_cfgall_range(S5P6450_GPB(5), 2, |
37 | s3c_gpio_setpull(S5P6450_GPB(5), S3C_GPIO_PULL_UP); | 35 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); |
38 | s3c_gpio_cfgpin(S5P6450_GPB(6), S3C_GPIO_SFN(2)); | ||
39 | s3c_gpio_setpull(S5P6450_GPB(6), S3C_GPIO_PULL_UP); | ||
40 | } | 36 | } |
41 | 37 | ||
42 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) { } | 38 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) { } |
diff --git a/arch/arm/mach-s5p64x0/setup-i2c1.c b/arch/arm/mach-s5p64x0/setup-i2c1.c index 2edd7912f8e4..6ad3b986021c 100644 --- a/arch/arm/mach-s5p64x0/setup-i2c1.c +++ b/arch/arm/mach-s5p64x0/setup-i2c1.c | |||
@@ -25,18 +25,14 @@ struct platform_device; /* don't need the contents */ | |||
25 | 25 | ||
26 | void s5p6440_i2c1_cfg_gpio(struct platform_device *dev) | 26 | void s5p6440_i2c1_cfg_gpio(struct platform_device *dev) |
27 | { | 27 | { |
28 | s3c_gpio_cfgpin(S5P6440_GPR(9), S3C_GPIO_SFN(6)); | 28 | s3c_gpio_cfgall_range(S5P6440_GPR(9), 2, |
29 | s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP); | 29 | S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP); |
30 | s3c_gpio_cfgpin(S5P6440_GPR(10), S3C_GPIO_SFN(6)); | ||
31 | s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP); | ||
32 | } | 30 | } |
33 | 31 | ||
34 | void s5p6450_i2c1_cfg_gpio(struct platform_device *dev) | 32 | void s5p6450_i2c1_cfg_gpio(struct platform_device *dev) |
35 | { | 33 | { |
36 | s3c_gpio_cfgpin(S5P6450_GPR(9), S3C_GPIO_SFN(6)); | 34 | s3c_gpio_cfgall_range(S5P6450_GPR(9), 2, |
37 | s3c_gpio_setpull(S5P6450_GPR(9), S3C_GPIO_PULL_UP); | 35 | S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP); |
38 | s3c_gpio_cfgpin(S5P6450_GPR(10), S3C_GPIO_SFN(6)); | ||
39 | s3c_gpio_setpull(S5P6450_GPR(10), S3C_GPIO_PULL_UP); | ||
40 | } | 36 | } |
41 | 37 | ||
42 | void s3c_i2c1_cfg_gpio(struct platform_device *dev) { } | 38 | void s3c_i2c1_cfg_gpio(struct platform_device *dev) { } |