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-rw-r--r--arch/arm/mach-s5p64x0/include/mach/debug-macro.S33
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/dma.h26
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/entry-macro.S16
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/gpio.h139
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/hardware.h18
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/i2c.h17
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/io.h25
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/irqs.h142
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/map.h83
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/memory.h19
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/pwm-clock.h68
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/regs-clock.h63
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/regs-gpio.h62
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/regs-irq.h19
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h46
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/spi-clocks.h20
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/system.h23
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/tick.h29
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/timex.h27
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/uncompress.h212
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/vmalloc.h20
21 files changed, 1107 insertions, 0 deletions
diff --git a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
new file mode 100644
index 000000000000..79b04e6a6f8e
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
@@ -0,0 +1,33 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11/* pull in the relevant register and map files. */
12
13#include <plat/map-base.h>
14#include <plat/map-s5p.h>
15
16#include <plat/regs-serial.h>
17
18 .macro addruart, rp, rv
19 mov \rp, #0xE0000000
20 orr \rp, \rp, #0x00100000
21 ldr \rp, [\rp, #0x118 ]
22 and \rp, \rp, #0xff000
23 teq \rp, #0x50000 @@ S5P6450
24 ldreq \rp, =0xEC800000
25 movne \rp, #0xEC000000 @@ S5P6440
26 ldrne \rv, = S3C_VA_UART
27#if CONFIG_DEBUG_S3C_UART != 0
28 add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART)
29 add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART)
30#endif
31 .endm
32
33#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5p64x0/include/mach/dma.h b/arch/arm/mach-s5p64x0/include/mach/dma.h
new file mode 100644
index 000000000000..81209eb1409b
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/dma.h
@@ -0,0 +1,26 @@
1/*
2 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
3 * Jaswinder Singh <jassi.brar@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#ifndef __MACH_DMA_H
21#define __MACH_DMA_H
22
23/* This platform uses the common S3C DMA API driver for PL330 */
24#include <plat/s3c-dma-pl330.h>
25
26#endif /* __MACH_DMA_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
new file mode 100644
index 000000000000..10b62b4f8211
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
@@ -0,0 +1,16 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Low-level IRQ helper macros for the Samsung S5P64X0
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <mach/map.h>
14#include <plat/irqs.h>
15
16#include <asm/entry-macro-vic2.S>
diff --git a/arch/arm/mach-s5p64x0/include/mach/gpio.h b/arch/arm/mach-s5p64x0/include/mach/gpio.h
new file mode 100644
index 000000000000..5486c8f01f1d
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/gpio.h
@@ -0,0 +1,139 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/gpio.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 - GPIO lib support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_GPIO_H
14#define __ASM_ARCH_GPIO_H __FILE__
15
16#define gpio_get_value __gpio_get_value
17#define gpio_set_value __gpio_set_value
18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq
20
21/* GPIO bank sizes */
22
23#define S5P6440_GPIO_A_NR (6)
24#define S5P6440_GPIO_B_NR (7)
25#define S5P6440_GPIO_C_NR (8)
26#define S5P6440_GPIO_F_NR (2)
27#define S5P6440_GPIO_G_NR (7)
28#define S5P6440_GPIO_H_NR (10)
29#define S5P6440_GPIO_I_NR (16)
30#define S5P6440_GPIO_J_NR (12)
31#define S5P6440_GPIO_N_NR (16)
32#define S5P6440_GPIO_P_NR (8)
33#define S5P6440_GPIO_R_NR (15)
34
35#define S5P6450_GPIO_A_NR (6)
36#define S5P6450_GPIO_B_NR (7)
37#define S5P6450_GPIO_C_NR (8)
38#define S5P6450_GPIO_D_NR (8)
39#define S5P6450_GPIO_F_NR (2)
40#define S5P6450_GPIO_G_NR (14)
41#define S5P6450_GPIO_H_NR (10)
42#define S5P6450_GPIO_I_NR (16)
43#define S5P6450_GPIO_J_NR (12)
44#define S5P6450_GPIO_K_NR (5)
45#define S5P6450_GPIO_N_NR (16)
46#define S5P6450_GPIO_P_NR (11)
47#define S5P6450_GPIO_Q_NR (14)
48#define S5P6450_GPIO_R_NR (15)
49#define S5P6450_GPIO_S_NR (8)
50
51/* GPIO bank numbers */
52
53/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
54 * space for debugging purposes so that any accidental
55 * change from one gpio bank to another can be caught.
56*/
57
58#define S5P64X0_GPIO_NEXT(__gpio) \
59 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
60
61enum s5p6440_gpio_number {
62 S5P6440_GPIO_A_START = 0,
63 S5P6440_GPIO_B_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_A),
64 S5P6440_GPIO_C_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_B),
65 S5P6440_GPIO_F_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_C),
66 S5P6440_GPIO_G_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_F),
67 S5P6440_GPIO_H_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_G),
68 S5P6440_GPIO_I_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_H),
69 S5P6440_GPIO_J_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_I),
70 S5P6440_GPIO_N_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_J),
71 S5P6440_GPIO_P_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_N),
72 S5P6440_GPIO_R_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_P),
73};
74
75enum s5p6450_gpio_number {
76 S5P6450_GPIO_A_START = 0,
77 S5P6450_GPIO_B_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_A),
78 S5P6450_GPIO_C_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_B),
79 S5P6450_GPIO_D_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_C),
80 S5P6450_GPIO_F_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_D),
81 S5P6450_GPIO_G_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_F),
82 S5P6450_GPIO_H_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_G),
83 S5P6450_GPIO_I_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_H),
84 S5P6450_GPIO_J_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_I),
85 S5P6450_GPIO_K_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_J),
86 S5P6450_GPIO_N_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_K),
87 S5P6450_GPIO_P_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_N),
88 S5P6450_GPIO_Q_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_P),
89 S5P6450_GPIO_R_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_Q),
90 S5P6450_GPIO_S_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_R),
91};
92
93/* GPIO number definitions */
94
95#define S5P6440_GPA(_nr) (S5P6440_GPIO_A_START + (_nr))
96#define S5P6440_GPB(_nr) (S5P6440_GPIO_B_START + (_nr))
97#define S5P6440_GPC(_nr) (S5P6440_GPIO_C_START + (_nr))
98#define S5P6440_GPF(_nr) (S5P6440_GPIO_F_START + (_nr))
99#define S5P6440_GPG(_nr) (S5P6440_GPIO_G_START + (_nr))
100#define S5P6440_GPH(_nr) (S5P6440_GPIO_H_START + (_nr))
101#define S5P6440_GPI(_nr) (S5P6440_GPIO_I_START + (_nr))
102#define S5P6440_GPJ(_nr) (S5P6440_GPIO_J_START + (_nr))
103#define S5P6440_GPN(_nr) (S5P6440_GPIO_N_START + (_nr))
104#define S5P6440_GPP(_nr) (S5P6440_GPIO_P_START + (_nr))
105#define S5P6440_GPR(_nr) (S5P6440_GPIO_R_START + (_nr))
106
107#define S5P6450_GPA(_nr) (S5P6450_GPIO_A_START + (_nr))
108#define S5P6450_GPB(_nr) (S5P6450_GPIO_B_START + (_nr))
109#define S5P6450_GPC(_nr) (S5P6450_GPIO_C_START + (_nr))
110#define S5P6450_GPD(_nr) (S5P6450_GPIO_D_START + (_nr))
111#define S5P6450_GPF(_nr) (S5P6450_GPIO_F_START + (_nr))
112#define S5P6450_GPG(_nr) (S5P6450_GPIO_G_START + (_nr))
113#define S5P6450_GPH(_nr) (S5P6450_GPIO_H_START + (_nr))
114#define S5P6450_GPI(_nr) (S5P6450_GPIO_I_START + (_nr))
115#define S5P6450_GPJ(_nr) (S5P6450_GPIO_J_START + (_nr))
116#define S5P6450_GPK(_nr) (S5P6450_GPIO_K_START + (_nr))
117#define S5P6450_GPN(_nr) (S5P6450_GPIO_N_START + (_nr))
118#define S5P6450_GPP(_nr) (S5P6450_GPIO_P_START + (_nr))
119#define S5P6450_GPQ(_nr) (S5P6450_GPIO_Q_START + (_nr))
120#define S5P6450_GPR(_nr) (S5P6450_GPIO_R_START + (_nr))
121#define S5P6450_GPS(_nr) (S5P6450_GPIO_S_START + (_nr))
122
123/* the end of the S5P64X0 specific gpios */
124
125#define S5P6440_GPIO_END (S5P6440_GPR(S5P6440_GPIO_R_NR) + 1)
126#define S5P6450_GPIO_END (S5P6450_GPS(S5P6450_GPIO_S_NR) + 1)
127
128#define S5P64X0_GPIO_END (S5P6440_GPIO_END > S5P6450_GPIO_END ? \
129 S5P6440_GPIO_END : S5P6450_GPIO_END)
130
131#define S3C_GPIO_END S5P64X0_GPIO_END
132
133/* define the number of gpios we need to the one after the last GPIO range */
134
135#define ARCH_NR_GPIOS (S5P64X0_GPIO_END + CONFIG_SAMSUNG_GPIO_EXTRA)
136
137#include <asm-generic/gpio.h>
138
139#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/hardware.h b/arch/arm/mach-s5p64x0/include/mach/hardware.h
new file mode 100644
index 000000000000..d3e87996dd9a
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/hardware.h
@@ -0,0 +1,18 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/hardware.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 - Hardware support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_HARDWARE_H
14#define __ASM_ARCH_HARDWARE_H __FILE__
15
16/* currently nothing here, placeholder */
17
18#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/i2c.h b/arch/arm/mach-s5p64x0/include/mach/i2c.h
new file mode 100644
index 000000000000..887d25209e8e
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/i2c.h
@@ -0,0 +1,17 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/i2c.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 I2C configuration
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13extern void s5p6440_i2c0_cfg_gpio(struct platform_device *dev);
14extern void s5p6440_i2c1_cfg_gpio(struct platform_device *dev);
15
16extern void s5p6450_i2c0_cfg_gpio(struct platform_device *dev);
17extern void s5p6450_i2c1_cfg_gpio(struct platform_device *dev);
diff --git a/arch/arm/mach-s5p64x0/include/mach/io.h b/arch/arm/mach-s5p64x0/include/mach/io.h
new file mode 100644
index 000000000000..a3e095c02fb5
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/io.h
@@ -0,0 +1,25 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/io.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright 2008 Simtec Electronics
7 * Ben Dooks <ben-linux@fluff.org>
8 *
9 * Default IO routines for S5P64X0 based
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#ifndef __ASM_ARM_ARCH_IO_H
17#define __ASM_ARM_ARCH_IO_H
18
19/* No current ISA/PCI bus support. */
20#define __io(a) __typesafe_io(a)
21#define __mem_pci(a) (a)
22
23#define IO_SPACE_LIMIT (0xFFFFFFFF)
24
25#endif
diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
new file mode 100644
index 000000000000..513abffc7604
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
@@ -0,0 +1,142 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/irqs.h
2 *
3 * Copyright 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 - IRQ definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_IRQS_H
14#define __ASM_ARCH_IRQS_H __FILE__
15
16#include <plat/irqs.h>
17
18/* VIC0 */
19
20#define IRQ_EINT0_3 S5P_IRQ_VIC0(0)
21#define IRQ_EINT4_11 S5P_IRQ_VIC0(1)
22#define IRQ_RTC_TIC S5P_IRQ_VIC0(2)
23#define IRQ_IIS1 S5P_IRQ_VIC0(3) /* for only S5P6450 */
24#define IRQ_IIS2 S5P_IRQ_VIC0(4) /* for only S5P6450 */
25#define IRQ_IIC1 S5P_IRQ_VIC0(5)
26#define IRQ_I2SV40 S5P_IRQ_VIC0(6)
27#define IRQ_GPS S5P_IRQ_VIC0(7) /* for only S5P6450 */
28
29#define IRQ_2D S5P_IRQ_VIC0(11)
30#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(23)
31#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(24)
32#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(25)
33#define IRQ_WDT S5P_IRQ_VIC0(26)
34#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(27)
35#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(28)
36#define IRQ_DISPCON0 S5P_IRQ_VIC0(29)
37#define IRQ_DISPCON1 S5P_IRQ_VIC0(30)
38#define IRQ_DISPCON2 S5P_IRQ_VIC0(31)
39
40/* VIC1 */
41
42#define IRQ_EINT12_15 S5P_IRQ_VIC1(0)
43#define IRQ_PCM0 S5P_IRQ_VIC1(2)
44#define IRQ_PCM1 S5P_IRQ_VIC1(3) /* for only S5P6450 */
45#define IRQ_PCM2 S5P_IRQ_VIC1(4) /* for only S5P6450 */
46#define IRQ_UART0 S5P_IRQ_VIC1(5)
47#define IRQ_UART1 S5P_IRQ_VIC1(6)
48#define IRQ_UART2 S5P_IRQ_VIC1(7)
49#define IRQ_UART3 S5P_IRQ_VIC1(8)
50#define IRQ_DMA0 S5P_IRQ_VIC1(9)
51#define IRQ_UART4 S5P_IRQ_VIC1(10) /* S5P6450 */
52#define IRQ_UART5 S5P_IRQ_VIC1(11) /* S5P6450 */
53#define IRQ_NFC S5P_IRQ_VIC1(13)
54#define IRQ_USI S5P_IRQ_VIC1(15) /* S5P6450 */
55#define IRQ_SPI0 S5P_IRQ_VIC1(16)
56#define IRQ_SPI1 S5P_IRQ_VIC1(17)
57#define IRQ_HSMMC2 S5P_IRQ_VIC1(17) /* Shared */
58#define IRQ_IIC S5P_IRQ_VIC1(18)
59#define IRQ_DISPCON3 S5P_IRQ_VIC1(19)
60#define IRQ_EINT_GROUPS S5P_IRQ_VIC1(21)
61#define IRQ_PMU S5P_IRQ_VIC1(23) /* S5P6440 */
62#define IRQ_HSMMC0 S5P_IRQ_VIC1(24)
63#define IRQ_HSMMC1 S5P_IRQ_VIC1(25)
64#define IRQ_OTG S5P_IRQ_VIC1(26)
65#define IRQ_DSI S5P_IRQ_VIC1(27)
66#define IRQ_RTC_ALARM S5P_IRQ_VIC1(28)
67#define IRQ_TSI S5P_IRQ_VIC1(29)
68#define IRQ_PENDN S5P_IRQ_VIC1(30)
69#define IRQ_TC IRQ_PENDN
70#define IRQ_ADC S5P_IRQ_VIC1(31)
71
72/* UART interrupts, S5P6450 has 5 UARTs */
73#define IRQ_S5P_UART_BASE4 (96)
74#define IRQ_S5P_UART_BASE5 (100)
75
76#define IRQ_S5P_UART_RX4 (IRQ_S5P_UART_BASE4 + UART_IRQ_RXD)
77#define IRQ_S5P_UART_TX4 (IRQ_S5P_UART_BASE4 + UART_IRQ_TXD)
78#define IRQ_S5P_UART_ERR4 (IRQ_S5P_UART_BASE4 + UART_IRQ_ERR)
79
80#define IRQ_S5P_UART_RX5 (IRQ_S5P_UART_BASE5 + UART_IRQ_RXD)
81#define IRQ_S5P_UART_TX5 (IRQ_S5P_UART_BASE5 + UART_IRQ_TXD)
82#define IRQ_S5P_UART_ERR5 (IRQ_S5P_UART_BASE5 + UART_IRQ_ERR)
83
84/* S3C compatibilty defines */
85#define IRQ_S3CUART_RX4 IRQ_S5P_UART_RX4
86#define IRQ_S3CUART_RX5 IRQ_S5P_UART_RX5
87
88/* S5P6450 EINT feature will be added */
89
90/*
91 * Since the IRQ_EINT(x) are a linear mapping on s5p6440 we just defined
92 * them as an IRQ_EINT(x) macro from S5P_IRQ_EINT_BASE which we place
93 * after the pair of VICs.
94 */
95
96#define S5P_IRQ_EINT_BASE (S5P_IRQ_VIC1(31) + 6)
97
98#define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE)
99
100#define S5P_EINT_BASE1 (S5P_IRQ_EINT_BASE)
101/*
102 * S5P6440 has 0-15 external interrupts in group 0. Only these can be used
103 * to wake up from sleep. If request is beyond this range, by mistake, a large
104 * return value for an irq number should be indication of something amiss.
105 */
106#define S5P_EINT_BASE2 (0xf0000000)
107
108/*
109 * Next the external interrupt groups. These are similar to the IRQ_EINT(x)
110 * that they are sourced from the GPIO pins but with a different scheme for
111 * priority and source indication.
112 *
113 * The IRQ_EINT(x) can be thought of as 'group 0' of the available GPIO
114 * interrupts, but for historical reasons they are kept apart from these
115 * next interrupts.
116 *
117 * Use IRQ_EINT_GROUP(group, offset) to get the number for use in the
118 * machine specific support files.
119 */
120
121/* Actually, #6 and #7 are missing in the EINT_GROUP1 */
122#define IRQ_EINT_GROUP1_NR (15)
123#define IRQ_EINT_GROUP2_NR (8)
124#define IRQ_EINT_GROUP5_NR (7)
125#define IRQ_EINT_GROUP6_NR (10)
126/* Actually, #0, #1 and #2 are missing in the EINT_GROUP8 */
127#define IRQ_EINT_GROUP8_NR (11)
128
129#define IRQ_EINT_GROUP_BASE S5P_EINT(16)
130#define IRQ_EINT_GROUP1_BASE (IRQ_EINT_GROUP_BASE + 0)
131#define IRQ_EINT_GROUP2_BASE (IRQ_EINT_GROUP1_BASE + IRQ_EINT_GROUP1_NR)
132#define IRQ_EINT_GROUP5_BASE (IRQ_EINT_GROUP2_BASE + IRQ_EINT_GROUP2_NR)
133#define IRQ_EINT_GROUP6_BASE (IRQ_EINT_GROUP5_BASE + IRQ_EINT_GROUP5_NR)
134#define IRQ_EINT_GROUP8_BASE (IRQ_EINT_GROUP6_BASE + IRQ_EINT_GROUP6_NR)
135
136#define IRQ_EINT_GROUP(grp, x) (IRQ_EINT_GROUP##grp##_BASE + (x))
137
138/* Set the default NR_IRQS */
139
140#define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
141
142#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
new file mode 100644
index 000000000000..31e534156e06
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/map.h
@@ -0,0 +1,83 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/map.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MAP_H
14#define __ASM_ARCH_MAP_H __FILE__
15
16#include <plat/map-base.h>
17#include <plat/map-s5p.h>
18
19#define S5P64X0_PA_SDRAM (0x20000000)
20
21#define S5P64X0_PA_CHIPID (0xE0000000)
22#define S5P_PA_CHIPID S5P64X0_PA_CHIPID
23
24#define S5P64X0_PA_SYSCON (0xE0100000)
25#define S5P_PA_SYSCON S5P64X0_PA_SYSCON
26
27#define S5P64X0_PA_GPIO (0xE0308000)
28
29#define S5P64X0_PA_VIC0 (0xE4000000)
30#define S5P64X0_PA_VIC1 (0xE4100000)
31
32#define S5P64X0_PA_PDMA (0xE9000000)
33
34#define S5P64X0_PA_TIMER (0xEA000000)
35#define S5P_PA_TIMER S5P64X0_PA_TIMER
36
37#define S5P64X0_PA_RTC (0xEA100000)
38
39#define S5P64X0_PA_WDT (0xEA200000)
40
41#define S5P6440_PA_UART(x) (0xEC000000 + ((x) * S3C_UART_OFFSET))
42#define S5P6450_PA_UART(x) ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000))
43
44#define S5P_PA_UART0 S5P6450_PA_UART(0)
45#define S5P_PA_UART1 S5P6450_PA_UART(1)
46#define S5P_PA_UART2 S5P6450_PA_UART(2)
47#define S5P_PA_UART3 S5P6450_PA_UART(3)
48#define S5P_PA_UART4 S5P6450_PA_UART(4)
49#define S5P_PA_UART5 S5P6450_PA_UART(5)
50
51#define S5P_SZ_UART SZ_256
52
53#define S5P6440_PA_IIC0 (0xEC104000)
54#define S5P6440_PA_IIC1 (0xEC20F000)
55#define S5P6450_PA_IIC0 (0xEC100000)
56#define S5P6450_PA_IIC1 (0xEC200000)
57
58#define S5P64X0_PA_SPI0 (0xEC400000)
59#define S5P64X0_PA_SPI1 (0xEC500000)
60
61#define S5P64X0_PA_HSOTG (0xED100000)
62
63#define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))
64
65#define S5P64X0_PA_I2S (0xF2000000)
66
67#define S5P64X0_PA_PCM (0xF2100000)
68
69#define S5P64X0_PA_ADC (0xF3000000)
70
71/* compatibiltiy defines. */
72
73#define S3C_PA_HSMMC0 S5P64X0_PA_HSMMC(0)
74#define S3C_PA_HSMMC1 S5P64X0_PA_HSMMC(1)
75#define S3C_PA_HSMMC2 S5P64X0_PA_HSMMC(2)
76#define S3C_PA_IIC S5P6440_PA_IIC0
77#define S3C_PA_IIC1 S5P6440_PA_IIC1
78#define S3C_PA_RTC S5P64X0_PA_RTC
79#define S3C_PA_WDT S5P64X0_PA_WDT
80
81#define SAMSUNG_PA_ADC S5P64X0_PA_ADC
82
83#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/memory.h b/arch/arm/mach-s5p64x0/include/mach/memory.h
new file mode 100644
index 000000000000..1b036b0a24ce
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/memory.h
@@ -0,0 +1,19 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/memory.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 - Memory definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MEMORY_H
14#define __ASM_ARCH_MEMORY_H __FILE__
15
16#define PHYS_OFFSET UL(0x20000000)
17#define CONSISTENT_DMA_SIZE SZ_8M
18
19#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h b/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
new file mode 100644
index 000000000000..19fff8b701c0
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
@@ -0,0 +1,68 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright 2008 Openmoko, Inc.
7 * Copyright 2008 Simtec Electronics
8 * Ben Dooks <ben@simtec.co.uk>
9 * http://armlinux.simtec.co.uk/
10 *
11 * S5P64X0 - pwm clock and timer support
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16*/
17
18#ifndef __ASM_ARCH_PWMCLK_H
19#define __ASM_ARCH_PWMCLK_H __FILE__
20
21/**
22 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
23 * @tcfg: The timer TCFG1 register bits shifted down to 0.
24 *
25 * Return true if the given configuration from TCFG1 is a TCLK instead
26 * any of the TDIV clocks.
27 */
28static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
29{
30 return 0;
31}
32
33/**
34 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
35 * @tcfg1: The tcfg1 setting, shifted down.
36 *
37 * Get the divisor value for the given tcfg1 setting. We assume the
38 * caller has already checked to see if this is not a TCLK source.
39 */
40static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
41{
42 return 1 << tcfg1;
43}
44
45/**
46 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
47 *
48 * Return true if we have a /1 in the tdiv setting.
49 */
50static inline unsigned int pwm_tdiv_has_div1(void)
51{
52 return 1;
53}
54
55/**
56 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
57 * @div: The divisor to calculate the bit information for.
58 *
59 * Turn a divisor into the necessary bit field for TCFG1.
60 */
61static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
62{
63 return ilog2(div);
64}
65
66#define S3C_TCFG1_MUX_TCLK 0
67
68#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-clock.h b/arch/arm/mach-s5p64x0/include/mach/regs-clock.h
new file mode 100644
index 000000000000..58e1bc813804
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-clock.h
@@ -0,0 +1,63 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/regs-clock.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 - Clock register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_CLOCK_H
14#define __ASM_ARCH_REGS_CLOCK_H __FILE__
15
16#include <mach/map.h>
17
18#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
19
20#define S5P64X0_APLL_CON S5P_CLKREG(0x0C)
21#define S5P64X0_MPLL_CON S5P_CLKREG(0x10)
22#define S5P64X0_EPLL_CON S5P_CLKREG(0x14)
23#define S5P64X0_EPLL_CON_K S5P_CLKREG(0x18)
24
25#define S5P64X0_CLK_SRC0 S5P_CLKREG(0x1C)
26
27#define S5P64X0_CLK_DIV0 S5P_CLKREG(0x20)
28#define S5P64X0_CLK_DIV1 S5P_CLKREG(0x24)
29#define S5P64X0_CLK_DIV2 S5P_CLKREG(0x28)
30
31#define S5P64X0_CLK_GATE_HCLK0 S5P_CLKREG(0x30)
32#define S5P64X0_CLK_GATE_PCLK S5P_CLKREG(0x34)
33#define S5P64X0_CLK_GATE_SCLK0 S5P_CLKREG(0x38)
34#define S5P64X0_CLK_GATE_MEM0 S5P_CLKREG(0x3C)
35
36#define S5P64X0_CLK_DIV3 S5P_CLKREG(0x40)
37
38#define S5P64X0_CLK_GATE_HCLK1 S5P_CLKREG(0x44)
39#define S5P64X0_CLK_GATE_SCLK1 S5P_CLKREG(0x48)
40
41#define S5P6450_DPLL_CON S5P_CLKREG(0x50)
42#define S5P6450_DPLL_CON_K S5P_CLKREG(0x54)
43
44#define S5P64X0_CLK_SRC1 S5P_CLKREG(0x10C)
45
46#define S5P64X0_SYS_ID S5P_CLKREG(0x118)
47#define S5P64X0_SYS_OTHERS S5P_CLKREG(0x11C)
48
49#define S5P64X0_PWR_CFG S5P_CLKREG(0x804)
50#define S5P64X0_OTHERS S5P_CLKREG(0x900)
51
52#define S5P64X0_CLKDIV0_HCLK_SHIFT (8)
53#define S5P64X0_CLKDIV0_HCLK_MASK (0xF << S5P64X0_CLKDIV0_HCLK_SHIFT)
54
55#define S5P64X0_OTHERS_USB_SIG_MASK (1 << 16)
56
57/* Compatibility defines */
58
59#define ARM_CLK_DIV S5P64X0_CLK_DIV0
60#define ARM_DIV_RATIO_SHIFT 0
61#define ARM_DIV_MASK (0xF << ARM_DIV_RATIO_SHIFT)
62
63#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
new file mode 100644
index 000000000000..85f448e20a8b
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
@@ -0,0 +1,62 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 - GPIO register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_GPIO_H
14#define __ASM_ARCH_REGS_GPIO_H __FILE__
15
16#include <mach/map.h>
17
18/* Will be implemented S5P6442 GPIOlib */
19
20/* Base addresses for each of the banks */
21
22#define S5P6440_GPA_BASE (S5P_VA_GPIO + 0x0000)
23#define S5P6440_GPB_BASE (S5P_VA_GPIO + 0x0020)
24#define S5P6440_GPC_BASE (S5P_VA_GPIO + 0x0040)
25#define S5P6440_GPF_BASE (S5P_VA_GPIO + 0x00A0)
26#define S5P6440_GPG_BASE (S5P_VA_GPIO + 0x00C0)
27#define S5P6440_GPH_BASE (S5P_VA_GPIO + 0x00E0)
28#define S5P6440_GPI_BASE (S5P_VA_GPIO + 0x0100)
29#define S5P6440_GPJ_BASE (S5P_VA_GPIO + 0x0120)
30#define S5P6440_GPN_BASE (S5P_VA_GPIO + 0x0830)
31#define S5P6440_GPP_BASE (S5P_VA_GPIO + 0x0160)
32#define S5P6440_GPR_BASE (S5P_VA_GPIO + 0x0290)
33
34#define S5P6440_EINT0CON0 (S5P_VA_GPIO + 0x900)
35#define S5P6440_EINT0FLTCON0 (S5P_VA_GPIO + 0x910)
36#define S5P6440_EINT0FLTCON1 (S5P_VA_GPIO + 0x914)
37#define S5P6440_EINT0MASK (S5P_VA_GPIO + 0x920)
38#define S5P6440_EINT0PEND (S5P_VA_GPIO + 0x924)
39
40/* for LCD */
41
42#define S5P6440_SPCON_LCD_SEL_RGB (1 << 0)
43#define S5P6440_SPCON_LCD_SEL_MASK (3 << 0)
44
45/*
46 * These set of macros are not really useful for the
47 * GPF/GPI/GPJ/GPN/GPP, useful for others set of GPIO's (4 bit)
48 */
49
50#define S5P6440_GPIO_CONMASK(__gpio) (0xf << ((__gpio) * 4))
51#define S5P6440_GPIO_INPUT(__gpio) (0x0 << ((__gpio) * 4))
52#define S5P6440_GPIO_OUTPUT(__gpio) (0x1 << ((__gpio) * 4))
53
54/*
55 * Use these macros for GPF/GPI/GPJ/GPN/GPP set of GPIO (2 bit)
56 */
57
58#define S5P6440_GPIO2_CONMASK(__gpio) (0x3 << ((__gpio) * 2))
59#define S5P6440_GPIO2_INPUT(__gpio) (0x0 << ((__gpio) * 2))
60#define S5P6440_GPIO2_OUTPUT(__gpio) (0x1 << ((__gpio) * 2))
61
62#endif /* __ASM_ARCH_REGS_GPIO_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-irq.h b/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
new file mode 100644
index 000000000000..4aaebdace55f
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
@@ -0,0 +1,19 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 - IRQ register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_IRQ_H
14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15
16#include <asm/hardware/vic.h>
17#include <mach/map.h>
18
19#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h b/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h
new file mode 100644
index 000000000000..ff85b4b6e8d9
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h
@@ -0,0 +1,46 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Header file for s5p64x0 clock support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_CLOCK_H
14#define __ASM_ARCH_CLOCK_H __FILE__
15
16#include <linux/clk.h>
17
18extern struct clksrc_clk clk_mout_apll;
19extern struct clksrc_clk clk_mout_mpll;
20extern struct clksrc_clk clk_mout_epll;
21
22extern int s5p64x0_epll_enable(struct clk *clk, int enable);
23extern unsigned long s5p64x0_epll_get_rate(struct clk *clk);
24
25extern unsigned long s5p64x0_armclk_get_rate(struct clk *clk);
26extern unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate);
27extern int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate);
28
29extern struct clk_ops s5p64x0_clkarm_ops;
30
31extern struct clksrc_clk clk_armclk;
32extern struct clksrc_clk clk_dout_mpll;
33
34extern struct clk *clkset_hclk_low_list[];
35extern struct clksrc_sources clkset_hclk_low;
36
37extern int s5p64x0_pclk_ctrl(struct clk *clk, int enable);
38extern int s5p64x0_hclk0_ctrl(struct clk *clk, int enable);
39extern int s5p64x0_hclk1_ctrl(struct clk *clk, int enable);
40extern int s5p64x0_sclk_ctrl(struct clk *clk, int enable);
41extern int s5p64x0_sclk1_ctrl(struct clk *clk, int enable);
42extern int s5p64x0_mem_ctrl(struct clk *clk, int enable);
43
44extern int s5p64x0_clk48m_ctrl(struct clk *clk, int enable);
45
46#endif /* __ASM_ARCH_CLOCK_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
new file mode 100644
index 000000000000..170a20a9643a
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
@@ -0,0 +1,20 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
7 * Jaswinder Singh <jassi.brar@samsung.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __ASM_ARCH_SPI_CLKS_H
15#define __ASM_ARCH_SPI_CLKS_H __FILE__
16
17#define S5P64X0_SPI_SRCCLK_PCLK 0
18#define S5P64X0_SPI_SRCCLK_SCLK 1
19
20#endif /* __ASM_ARCH_SPI_CLKS_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h
new file mode 100644
index 000000000000..60f57532c970
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/system.h
@@ -0,0 +1,23 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/system.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 - system support header
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__
15
16#include <plat/system-reset.h>
17
18static void arch_idle(void)
19{
20 /* nothing here yet */
21}
22
23#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/tick.h b/arch/arm/mach-s5p64x0/include/mach/tick.h
new file mode 100644
index 000000000000..00aa7f1d8e51
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/tick.h
@@ -0,0 +1,29 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/tick.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright 2008 Openmoko, Inc.
7 * Copyright 2008 Simtec Electronics
8 * http://armlinux.simtec.co.uk/
9 * Ben Dooks <ben@simtec.co.uk>
10 *
11 * S5P64X0 - Timer tick support definitions
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16*/
17
18#ifndef __ASM_ARCH_TICK_H
19#define __ASM_ARCH_TICK_H __FILE__
20
21static inline u32 s3c24xx_ostimer_pending(void)
22{
23 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
24 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
25}
26
27#define TICK_MAX (0xffffffff)
28
29#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/timex.h b/arch/arm/mach-s5p64x0/include/mach/timex.h
new file mode 100644
index 000000000000..4b91faa195a8
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/timex.h
@@ -0,0 +1,27 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/timex.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright (c) 2003-2005 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * S5P64X0 - time parameters
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#ifndef __ASM_ARCH_TIMEX_H
17#define __ASM_ARCH_TIMEX_H
18
19/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
20 * a variable is useless. It seems as long as we make our timers an
21 * exact multiple of HZ, any value that makes a 1->1 correspondence
22 * for the time conversion functions to/from jiffies is acceptable.
23*/
24
25#define CLOCK_TICK_RATE 12000000
26
27#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/uncompress.h b/arch/arm/mach-s5p64x0/include/mach/uncompress.h
new file mode 100644
index 000000000000..c65b229aab23
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/uncompress.h
@@ -0,0 +1,212 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/uncompress.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 - uncompress code
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_UNCOMPRESS_H
14#define __ASM_ARCH_UNCOMPRESS_H
15
16#include <mach/map.h>
17
18/*
19 * cannot use commonly <plat/uncompress.h>
20 * because uart base of S5P6440 and S5P6450 is different
21 */
22
23typedef unsigned int upf_t; /* cannot include linux/serial_core.h */
24
25/* uart setup */
26
27static unsigned int fifo_mask;
28static unsigned int fifo_max;
29
30/* forward declerations */
31
32static void arch_detect_cpu(void);
33
34/* defines for UART registers */
35
36#include <plat/regs-serial.h>
37#include <plat/regs-watchdog.h>
38
39/* working in physical space... */
40#undef S3C2410_WDOGREG
41#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
42
43/* how many bytes we allow into the FIFO at a time in FIFO mode */
44#define FIFO_MAX (14)
45
46static unsigned long uart_base;
47
48static __inline__ void get_uart_base(void)
49{
50 unsigned int chipid;
51
52 chipid = *(const volatile unsigned int __force *) 0xE0100118;
53
54 uart_base = S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT;
55
56 if ((chipid & 0xff000) == 0x50000)
57 uart_base += 0xEC800000;
58 else
59 uart_base += 0xEC000000;
60}
61
62static __inline__ void uart_wr(unsigned int reg, unsigned int val)
63{
64 volatile unsigned int *ptr;
65
66 get_uart_base();
67 ptr = (volatile unsigned int *)(reg + uart_base);
68 *ptr = val;
69}
70
71static __inline__ unsigned int uart_rd(unsigned int reg)
72{
73 volatile unsigned int *ptr;
74
75 get_uart_base();
76 ptr = (volatile unsigned int *)(reg + uart_base);
77 return *ptr;
78}
79
80/*
81 * we can deal with the case the UARTs are being run
82 * in FIFO mode, so that we don't hold up our execution
83 * waiting for tx to happen...
84 */
85
86static void putc(int ch)
87{
88 if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
89 int level;
90
91 while (1) {
92 level = uart_rd(S3C2410_UFSTAT);
93 level &= fifo_mask;
94
95 if (level < fifo_max)
96 break;
97 }
98
99 } else {
100 /* not using fifos */
101
102 while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
103 barrier();
104 }
105
106 /* write byte to transmission register */
107 uart_wr(S3C2410_UTXH, ch);
108}
109
110static inline void flush(void)
111{
112}
113
114#define __raw_writel(d, ad) \
115 do { \
116 *((volatile unsigned int __force *)(ad)) = (d); \
117 } while (0)
118
119/*
120 * CONFIG_S3C_BOOT_WATCHDOG
121 *
122 * Simple boot-time watchdog setup, to reboot the system if there is
123 * any problem with the boot process
124 */
125
126#ifdef CONFIG_S3C_BOOT_WATCHDOG
127
128#define WDOG_COUNT (0xff00)
129
130static inline void arch_decomp_wdog(void)
131{
132 __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
133}
134
135static void arch_decomp_wdog_start(void)
136{
137 __raw_writel(WDOG_COUNT, S3C2410_WTDAT);
138 __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
139 __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON);
140}
141
142#else
143#define arch_decomp_wdog_start()
144#define arch_decomp_wdog()
145#endif
146
147#ifdef CONFIG_S3C_BOOT_ERROR_RESET
148
149static void arch_decomp_error(const char *x)
150{
151 putstr("\n\n");
152 putstr(x);
153 putstr("\n\n -- System resetting\n");
154
155 __raw_writel(0x4000, S3C2410_WTDAT);
156 __raw_writel(0x4000, S3C2410_WTCNT);
157 __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
158
159 while(1);
160}
161
162#define arch_error arch_decomp_error
163#endif
164
165#ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO
166static inline void arch_enable_uart_fifo(void)
167{
168 u32 fifocon = uart_rd(S3C2410_UFCON);
169
170 if (!(fifocon & S3C2410_UFCON_FIFOMODE)) {
171 fifocon |= S3C2410_UFCON_RESETBOTH;
172 uart_wr(S3C2410_UFCON, fifocon);
173
174 /* wait for fifo reset to complete */
175 while (1) {
176 fifocon = uart_rd(S3C2410_UFCON);
177 if (!(fifocon & S3C2410_UFCON_RESETBOTH))
178 break;
179 }
180 }
181}
182#else
183#define arch_enable_uart_fifo() do { } while(0)
184#endif
185
186static void arch_decomp_setup(void)
187{
188 /*
189 * we may need to setup the uart(s) here if we are not running
190 * on an BAST... the BAST will have left the uarts configured
191 * after calling linux.
192 */
193
194 arch_detect_cpu();
195 arch_decomp_wdog_start();
196
197 /*
198 * Enable the UART FIFOs if they where not enabled and our
199 * configuration says we should turn them on.
200 */
201
202 arch_enable_uart_fifo();
203}
204
205
206
207static void arch_detect_cpu(void)
208{
209 /* we do not need to do any cpu detection here at the moment. */
210}
211
212#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/vmalloc.h b/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
new file mode 100644
index 000000000000..97a9df38f1cf
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
@@ -0,0 +1,20 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * S3C6400 vmalloc definition
13*/
14
15#ifndef __ASM_ARCH_VMALLOC_H
16#define __ASM_ARCH_VMALLOC_H
17
18#define VMALLOC_END 0xE0000000UL
19
20#endif /* __ASM_ARCH_VMALLOC_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 06:28:05 -0500