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Diffstat (limited to 'arch/arm/mach-s5p64x0/clock-s5p6450.c')
-rw-r--r--arch/arm/mach-s5p64x0/clock-s5p6450.c19
1 files changed, 11 insertions, 8 deletions
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index f9afb05b217c..7dbf3c968f53 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -80,13 +80,16 @@ static int s5p6450_epll_set_rate(struct clk *clk, unsigned long rate)
80 __raw_writel(epll_con, S5P64X0_EPLL_CON); 80 __raw_writel(epll_con, S5P64X0_EPLL_CON);
81 __raw_writel(epll_con_k, S5P64X0_EPLL_CON_K); 81 __raw_writel(epll_con_k, S5P64X0_EPLL_CON_K);
82 82
83 printk(KERN_WARNING "EPLL Rate changes from %lu to %lu\n",
84 clk->rate, rate);
85
83 clk->rate = rate; 86 clk->rate = rate;
84 87
85 return 0; 88 return 0;
86} 89}
87 90
88static struct clk_ops s5p6450_epll_ops = { 91static struct clk_ops s5p6450_epll_ops = {
89 .get_rate = s5p64x0_epll_get_rate, 92 .get_rate = s5p_epll_get_rate,
90 .set_rate = s5p6450_epll_set_rate, 93 .set_rate = s5p6450_epll_set_rate,
91}; 94};
92 95
@@ -186,6 +189,12 @@ static struct clk init_clocks_disable[] = {
186 .enable = s5p64x0_hclk0_ctrl, 189 .enable = s5p64x0_hclk0_ctrl,
187 .ctrlbit = (1 << 3), 190 .ctrlbit = (1 << 3),
188 }, { 191 }, {
192 .name = "pdma",
193 .id = -1,
194 .parent = &clk_hclk_low.clk,
195 .enable = s5p64x0_hclk0_ctrl,
196 .ctrlbit = (1 << 12),
197 }, {
189 .name = "hsmmc", 198 .name = "hsmmc",
190 .id = 0, 199 .id = 0,
191 .parent = &clk_hclk_low.clk, 200 .parent = &clk_hclk_low.clk,
@@ -283,12 +292,6 @@ static struct clk init_clocks[] = {
283 .enable = s5p64x0_hclk0_ctrl, 292 .enable = s5p64x0_hclk0_ctrl,
284 .ctrlbit = (1 << 21), 293 .ctrlbit = (1 << 21),
285 }, { 294 }, {
286 .name = "dma",
287 .id = -1,
288 .parent = &clk_hclk_low.clk,
289 .enable = s5p64x0_hclk0_ctrl,
290 .ctrlbit = (1 << 12),
291 }, {
292 .name = "uart", 295 .name = "uart",
293 .id = 0, 296 .id = 0,
294 .parent = &clk_pclk_low.clk, 297 .parent = &clk_pclk_low.clk,
@@ -581,7 +584,7 @@ void __init_or_cpufreq s5p6450_setup_clocks(void)
581 584
582 /* Set S5P6450 functions for clk_fout_epll */ 585 /* Set S5P6450 functions for clk_fout_epll */
583 586
584 clk_fout_epll.enable = s5p64x0_epll_enable; 587 clk_fout_epll.enable = s5p_epll_enable;
585 clk_fout_epll.ops = &s5p6450_epll_ops; 588 clk_fout_epll.ops = &s5p6450_epll_ops;
586 589
587 clk_48m.enable = s5p64x0_clk48m_ctrl; 590 clk_48m.enable = s5p64x0_clk48m_ctrl;