diff options
Diffstat (limited to 'arch/arm/mach-s5p64x0/clock-s5p6440.c')
-rw-r--r-- | arch/arm/mach-s5p64x0/clock-s5p6440.c | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c index f93dcd8b4d6a..e4883dc1c8d7 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6440.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c | |||
@@ -79,13 +79,16 @@ static int s5p6440_epll_set_rate(struct clk *clk, unsigned long rate) | |||
79 | __raw_writel(epll_con, S5P64X0_EPLL_CON); | 79 | __raw_writel(epll_con, S5P64X0_EPLL_CON); |
80 | __raw_writel(epll_con_k, S5P64X0_EPLL_CON_K); | 80 | __raw_writel(epll_con_k, S5P64X0_EPLL_CON_K); |
81 | 81 | ||
82 | printk(KERN_WARNING "EPLL Rate changes from %lu to %lu\n", | ||
83 | clk->rate, rate); | ||
84 | |||
82 | clk->rate = rate; | 85 | clk->rate = rate; |
83 | 86 | ||
84 | return 0; | 87 | return 0; |
85 | } | 88 | } |
86 | 89 | ||
87 | static struct clk_ops s5p6440_epll_ops = { | 90 | static struct clk_ops s5p6440_epll_ops = { |
88 | .get_rate = s5p64x0_epll_get_rate, | 91 | .get_rate = s5p_epll_get_rate, |
89 | .set_rate = s5p6440_epll_set_rate, | 92 | .set_rate = s5p6440_epll_set_rate, |
90 | }; | 93 | }; |
91 | 94 | ||
@@ -150,6 +153,12 @@ static struct clk init_clocks_disable[] = { | |||
150 | .enable = s5p64x0_hclk0_ctrl, | 153 | .enable = s5p64x0_hclk0_ctrl, |
151 | .ctrlbit = (1 << 8), | 154 | .ctrlbit = (1 << 8), |
152 | }, { | 155 | }, { |
156 | .name = "pdma", | ||
157 | .id = -1, | ||
158 | .parent = &clk_hclk_low.clk, | ||
159 | .enable = s5p64x0_hclk0_ctrl, | ||
160 | .ctrlbit = (1 << 12), | ||
161 | }, { | ||
153 | .name = "hsmmc", | 162 | .name = "hsmmc", |
154 | .id = 0, | 163 | .id = 0, |
155 | .parent = &clk_hclk_low.clk, | 164 | .parent = &clk_hclk_low.clk, |
@@ -331,12 +340,6 @@ static struct clk init_clocks[] = { | |||
331 | .enable = s5p64x0_hclk0_ctrl, | 340 | .enable = s5p64x0_hclk0_ctrl, |
332 | .ctrlbit = (1 << 21), | 341 | .ctrlbit = (1 << 21), |
333 | }, { | 342 | }, { |
334 | .name = "dma", | ||
335 | .id = -1, | ||
336 | .parent = &clk_hclk_low.clk, | ||
337 | .enable = s5p64x0_hclk0_ctrl, | ||
338 | .ctrlbit = (1 << 12), | ||
339 | }, { | ||
340 | .name = "uart", | 343 | .name = "uart", |
341 | .id = 0, | 344 | .id = 0, |
342 | .parent = &clk_pclk_low.clk, | 345 | .parent = &clk_pclk_low.clk, |
@@ -548,7 +551,7 @@ void __init_or_cpufreq s5p6440_setup_clocks(void) | |||
548 | 551 | ||
549 | /* Set S5P6440 functions for clk_fout_epll */ | 552 | /* Set S5P6440 functions for clk_fout_epll */ |
550 | 553 | ||
551 | clk_fout_epll.enable = s5p64x0_epll_enable; | 554 | clk_fout_epll.enable = s5p_epll_enable; |
552 | clk_fout_epll.ops = &s5p6440_epll_ops; | 555 | clk_fout_epll.ops = &s5p6440_epll_ops; |
553 | 556 | ||
554 | clk_48m.enable = s5p64x0_clk48m_ctrl; | 557 | clk_48m.enable = s5p64x0_clk48m_ctrl; |