diff options
Diffstat (limited to 'arch/arm/mach-s5p6442')
29 files changed, 0 insertions, 2004 deletions
diff --git a/arch/arm/mach-s5p6442/Kconfig b/arch/arm/mach-s5p6442/Kconfig deleted file mode 100644 index 33569e4007c4..000000000000 --- a/arch/arm/mach-s5p6442/Kconfig +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | # arch/arm/mach-s5p6442/Kconfig | ||
2 | # | ||
3 | # Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | # http://www.samsung.com/ | ||
5 | # | ||
6 | # Licensed under GPLv2 | ||
7 | |||
8 | # Configuration options for the S5P6442 | ||
9 | |||
10 | if ARCH_S5P6442 | ||
11 | |||
12 | config CPU_S5P6442 | ||
13 | bool | ||
14 | select S3C_PL330_DMA | ||
15 | help | ||
16 | Enable S5P6442 CPU support | ||
17 | |||
18 | config MACH_SMDK6442 | ||
19 | bool "SMDK6442" | ||
20 | select CPU_S5P6442 | ||
21 | select S3C_DEV_WDT | ||
22 | help | ||
23 | Machine support for Samsung SMDK6442 | ||
24 | |||
25 | endif | ||
diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile deleted file mode 100644 index 90a3d8373416..000000000000 --- a/arch/arm/mach-s5p6442/Makefile +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | # arch/arm/mach-s5p6442/Makefile | ||
2 | # | ||
3 | # Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | # http://www.samsung.com/ | ||
5 | # | ||
6 | # Licensed under GPLv2 | ||
7 | |||
8 | obj-y := | ||
9 | obj-m := | ||
10 | obj-n := | ||
11 | obj- := | ||
12 | |||
13 | # Core support for S5P6442 system | ||
14 | |||
15 | obj-$(CONFIG_CPU_S5P6442) += cpu.o init.o clock.o dma.o | ||
16 | obj-$(CONFIG_CPU_S5P6442) += setup-i2c0.o | ||
17 | |||
18 | # machine support | ||
19 | |||
20 | obj-$(CONFIG_MACH_SMDK6442) += mach-smdk6442.o | ||
21 | |||
22 | # device support | ||
23 | obj-y += dev-audio.o | ||
24 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
diff --git a/arch/arm/mach-s5p6442/Makefile.boot b/arch/arm/mach-s5p6442/Makefile.boot deleted file mode 100644 index ff90aa13bd67..000000000000 --- a/arch/arm/mach-s5p6442/Makefile.boot +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | zreladdr-y := 0x20008000 | ||
2 | params_phys-y := 0x20000100 | ||
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c deleted file mode 100644 index fbbc7bede685..000000000000 --- a/arch/arm/mach-s5p6442/clock.c +++ /dev/null | |||
@@ -1,420 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/clock.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - Clock support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/list.h> | ||
17 | #include <linux/err.h> | ||
18 | #include <linux/clk.h> | ||
19 | #include <linux/io.h> | ||
20 | |||
21 | #include <mach/map.h> | ||
22 | |||
23 | #include <plat/cpu-freq.h> | ||
24 | #include <mach/regs-clock.h> | ||
25 | #include <plat/clock.h> | ||
26 | #include <plat/cpu.h> | ||
27 | #include <plat/pll.h> | ||
28 | #include <plat/s5p-clock.h> | ||
29 | #include <plat/clock-clksrc.h> | ||
30 | #include <plat/s5p6442.h> | ||
31 | |||
32 | static struct clksrc_clk clk_mout_apll = { | ||
33 | .clk = { | ||
34 | .name = "mout_apll", | ||
35 | .id = -1, | ||
36 | }, | ||
37 | .sources = &clk_src_apll, | ||
38 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 }, | ||
39 | }; | ||
40 | |||
41 | static struct clksrc_clk clk_mout_mpll = { | ||
42 | .clk = { | ||
43 | .name = "mout_mpll", | ||
44 | .id = -1, | ||
45 | }, | ||
46 | .sources = &clk_src_mpll, | ||
47 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 }, | ||
48 | }; | ||
49 | |||
50 | static struct clksrc_clk clk_mout_epll = { | ||
51 | .clk = { | ||
52 | .name = "mout_epll", | ||
53 | .id = -1, | ||
54 | }, | ||
55 | .sources = &clk_src_epll, | ||
56 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 }, | ||
57 | }; | ||
58 | |||
59 | /* Possible clock sources for ARM Mux */ | ||
60 | static struct clk *clk_src_arm_list[] = { | ||
61 | [1] = &clk_mout_apll.clk, | ||
62 | [2] = &clk_mout_mpll.clk, | ||
63 | }; | ||
64 | |||
65 | static struct clksrc_sources clk_src_arm = { | ||
66 | .sources = clk_src_arm_list, | ||
67 | .nr_sources = ARRAY_SIZE(clk_src_arm_list), | ||
68 | }; | ||
69 | |||
70 | static struct clksrc_clk clk_mout_arm = { | ||
71 | .clk = { | ||
72 | .name = "mout_arm", | ||
73 | .id = -1, | ||
74 | }, | ||
75 | .sources = &clk_src_arm, | ||
76 | .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 }, | ||
77 | }; | ||
78 | |||
79 | static struct clk clk_dout_a2m = { | ||
80 | .name = "dout_a2m", | ||
81 | .id = -1, | ||
82 | .parent = &clk_mout_apll.clk, | ||
83 | }; | ||
84 | |||
85 | /* Possible clock sources for D0 Mux */ | ||
86 | static struct clk *clk_src_d0_list[] = { | ||
87 | [1] = &clk_mout_mpll.clk, | ||
88 | [2] = &clk_dout_a2m, | ||
89 | }; | ||
90 | |||
91 | static struct clksrc_sources clk_src_d0 = { | ||
92 | .sources = clk_src_d0_list, | ||
93 | .nr_sources = ARRAY_SIZE(clk_src_d0_list), | ||
94 | }; | ||
95 | |||
96 | static struct clksrc_clk clk_mout_d0 = { | ||
97 | .clk = { | ||
98 | .name = "mout_d0", | ||
99 | .id = -1, | ||
100 | }, | ||
101 | .sources = &clk_src_d0, | ||
102 | .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 20, .size = 3 }, | ||
103 | }; | ||
104 | |||
105 | static struct clk clk_dout_apll = { | ||
106 | .name = "dout_apll", | ||
107 | .id = -1, | ||
108 | .parent = &clk_mout_arm.clk, | ||
109 | }; | ||
110 | |||
111 | /* Possible clock sources for D0SYNC Mux */ | ||
112 | static struct clk *clk_src_d0sync_list[] = { | ||
113 | [1] = &clk_mout_d0.clk, | ||
114 | [2] = &clk_dout_apll, | ||
115 | }; | ||
116 | |||
117 | static struct clksrc_sources clk_src_d0sync = { | ||
118 | .sources = clk_src_d0sync_list, | ||
119 | .nr_sources = ARRAY_SIZE(clk_src_d0sync_list), | ||
120 | }; | ||
121 | |||
122 | static struct clksrc_clk clk_mout_d0sync = { | ||
123 | .clk = { | ||
124 | .name = "mout_d0sync", | ||
125 | .id = -1, | ||
126 | }, | ||
127 | .sources = &clk_src_d0sync, | ||
128 | .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 }, | ||
129 | }; | ||
130 | |||
131 | /* Possible clock sources for D1 Mux */ | ||
132 | static struct clk *clk_src_d1_list[] = { | ||
133 | [1] = &clk_mout_mpll.clk, | ||
134 | [2] = &clk_dout_a2m, | ||
135 | }; | ||
136 | |||
137 | static struct clksrc_sources clk_src_d1 = { | ||
138 | .sources = clk_src_d1_list, | ||
139 | .nr_sources = ARRAY_SIZE(clk_src_d1_list), | ||
140 | }; | ||
141 | |||
142 | static struct clksrc_clk clk_mout_d1 = { | ||
143 | .clk = { | ||
144 | .name = "mout_d1", | ||
145 | .id = -1, | ||
146 | }, | ||
147 | .sources = &clk_src_d1, | ||
148 | .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 24, .size = 3 }, | ||
149 | }; | ||
150 | |||
151 | /* Possible clock sources for D1SYNC Mux */ | ||
152 | static struct clk *clk_src_d1sync_list[] = { | ||
153 | [1] = &clk_mout_d1.clk, | ||
154 | [2] = &clk_dout_apll, | ||
155 | }; | ||
156 | |||
157 | static struct clksrc_sources clk_src_d1sync = { | ||
158 | .sources = clk_src_d1sync_list, | ||
159 | .nr_sources = ARRAY_SIZE(clk_src_d1sync_list), | ||
160 | }; | ||
161 | |||
162 | static struct clksrc_clk clk_mout_d1sync = { | ||
163 | .clk = { | ||
164 | .name = "mout_d1sync", | ||
165 | .id = -1, | ||
166 | }, | ||
167 | .sources = &clk_src_d1sync, | ||
168 | .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 }, | ||
169 | }; | ||
170 | |||
171 | static struct clk clk_hclkd0 = { | ||
172 | .name = "hclkd0", | ||
173 | .id = -1, | ||
174 | .parent = &clk_mout_d0sync.clk, | ||
175 | }; | ||
176 | |||
177 | static struct clk clk_hclkd1 = { | ||
178 | .name = "hclkd1", | ||
179 | .id = -1, | ||
180 | .parent = &clk_mout_d1sync.clk, | ||
181 | }; | ||
182 | |||
183 | static struct clk clk_pclkd0 = { | ||
184 | .name = "pclkd0", | ||
185 | .id = -1, | ||
186 | .parent = &clk_hclkd0, | ||
187 | }; | ||
188 | |||
189 | static struct clk clk_pclkd1 = { | ||
190 | .name = "pclkd1", | ||
191 | .id = -1, | ||
192 | .parent = &clk_hclkd1, | ||
193 | }; | ||
194 | |||
195 | int s5p6442_clk_ip0_ctrl(struct clk *clk, int enable) | ||
196 | { | ||
197 | return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable); | ||
198 | } | ||
199 | |||
200 | int s5p6442_clk_ip3_ctrl(struct clk *clk, int enable) | ||
201 | { | ||
202 | return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable); | ||
203 | } | ||
204 | |||
205 | static struct clksrc_clk clksrcs[] = { | ||
206 | { | ||
207 | .clk = { | ||
208 | .name = "dout_a2m", | ||
209 | .id = -1, | ||
210 | .parent = &clk_mout_apll.clk, | ||
211 | }, | ||
212 | .sources = &clk_src_apll, | ||
213 | .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 }, | ||
214 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 }, | ||
215 | }, { | ||
216 | .clk = { | ||
217 | .name = "dout_apll", | ||
218 | .id = -1, | ||
219 | .parent = &clk_mout_arm.clk, | ||
220 | }, | ||
221 | .sources = &clk_src_arm, | ||
222 | .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 }, | ||
223 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 3 }, | ||
224 | }, { | ||
225 | .clk = { | ||
226 | .name = "hclkd1", | ||
227 | .id = -1, | ||
228 | .parent = &clk_mout_d1sync.clk, | ||
229 | }, | ||
230 | .sources = &clk_src_d1sync, | ||
231 | .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 }, | ||
232 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 24, .size = 4 }, | ||
233 | }, { | ||
234 | .clk = { | ||
235 | .name = "hclkd0", | ||
236 | .id = -1, | ||
237 | .parent = &clk_mout_d0sync.clk, | ||
238 | }, | ||
239 | .sources = &clk_src_d0sync, | ||
240 | .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 }, | ||
241 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 4 }, | ||
242 | }, { | ||
243 | .clk = { | ||
244 | .name = "pclkd0", | ||
245 | .id = -1, | ||
246 | .parent = &clk_hclkd0, | ||
247 | }, | ||
248 | .sources = &clk_src_d0sync, | ||
249 | .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 }, | ||
250 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 20, .size = 3 }, | ||
251 | }, { | ||
252 | .clk = { | ||
253 | .name = "pclkd1", | ||
254 | .id = -1, | ||
255 | .parent = &clk_hclkd1, | ||
256 | }, | ||
257 | .sources = &clk_src_d1sync, | ||
258 | .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 }, | ||
259 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 28, .size = 3 }, | ||
260 | } | ||
261 | }; | ||
262 | |||
263 | /* Clock initialisation code */ | ||
264 | static struct clksrc_clk *init_parents[] = { | ||
265 | &clk_mout_apll, | ||
266 | &clk_mout_mpll, | ||
267 | &clk_mout_epll, | ||
268 | &clk_mout_arm, | ||
269 | &clk_mout_d0, | ||
270 | &clk_mout_d0sync, | ||
271 | &clk_mout_d1, | ||
272 | &clk_mout_d1sync, | ||
273 | }; | ||
274 | |||
275 | void __init_or_cpufreq s5p6442_setup_clocks(void) | ||
276 | { | ||
277 | struct clk *pclkd0_clk; | ||
278 | struct clk *pclkd1_clk; | ||
279 | |||
280 | unsigned long xtal; | ||
281 | unsigned long arm; | ||
282 | unsigned long hclkd0 = 0; | ||
283 | unsigned long hclkd1 = 0; | ||
284 | unsigned long pclkd0 = 0; | ||
285 | unsigned long pclkd1 = 0; | ||
286 | |||
287 | unsigned long apll; | ||
288 | unsigned long mpll; | ||
289 | unsigned long epll; | ||
290 | unsigned int ptr; | ||
291 | |||
292 | printk(KERN_DEBUG "%s: registering clocks\n", __func__); | ||
293 | |||
294 | xtal = clk_get_rate(&clk_xtal); | ||
295 | |||
296 | printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); | ||
297 | |||
298 | apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508); | ||
299 | mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502); | ||
300 | epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500); | ||
301 | |||
302 | printk(KERN_INFO "S5P6442: PLL settings, A=%ld, M=%ld, E=%ld", | ||
303 | apll, mpll, epll); | ||
304 | |||
305 | clk_fout_apll.rate = apll; | ||
306 | clk_fout_mpll.rate = mpll; | ||
307 | clk_fout_epll.rate = epll; | ||
308 | |||
309 | for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++) | ||
310 | s3c_set_clksrc(init_parents[ptr], true); | ||
311 | |||
312 | for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) | ||
313 | s3c_set_clksrc(&clksrcs[ptr], true); | ||
314 | |||
315 | arm = clk_get_rate(&clk_dout_apll); | ||
316 | hclkd0 = clk_get_rate(&clk_hclkd0); | ||
317 | hclkd1 = clk_get_rate(&clk_hclkd1); | ||
318 | |||
319 | pclkd0_clk = clk_get(NULL, "pclkd0"); | ||
320 | BUG_ON(IS_ERR(pclkd0_clk)); | ||
321 | |||
322 | pclkd0 = clk_get_rate(pclkd0_clk); | ||
323 | clk_put(pclkd0_clk); | ||
324 | |||
325 | pclkd1_clk = clk_get(NULL, "pclkd1"); | ||
326 | BUG_ON(IS_ERR(pclkd1_clk)); | ||
327 | |||
328 | pclkd1 = clk_get_rate(pclkd1_clk); | ||
329 | clk_put(pclkd1_clk); | ||
330 | |||
331 | printk(KERN_INFO "S5P6442: HCLKD0=%ld, HCLKD1=%ld, PCLKD0=%ld, PCLKD1=%ld\n", | ||
332 | hclkd0, hclkd1, pclkd0, pclkd1); | ||
333 | |||
334 | /* For backward compatibility */ | ||
335 | clk_f.rate = arm; | ||
336 | clk_h.rate = hclkd1; | ||
337 | clk_p.rate = pclkd1; | ||
338 | |||
339 | clk_pclkd0.rate = pclkd0; | ||
340 | clk_pclkd1.rate = pclkd1; | ||
341 | } | ||
342 | |||
343 | static struct clk init_clocks_off[] = { | ||
344 | { | ||
345 | .name = "pdma", | ||
346 | .id = -1, | ||
347 | .parent = &clk_pclkd1, | ||
348 | .enable = s5p6442_clk_ip0_ctrl, | ||
349 | .ctrlbit = (1 << 3), | ||
350 | }, | ||
351 | }; | ||
352 | |||
353 | static struct clk init_clocks[] = { | ||
354 | { | ||
355 | .name = "systimer", | ||
356 | .id = -1, | ||
357 | .parent = &clk_pclkd1, | ||
358 | .enable = s5p6442_clk_ip3_ctrl, | ||
359 | .ctrlbit = (1<<16), | ||
360 | }, { | ||
361 | .name = "uart", | ||
362 | .id = 0, | ||
363 | .parent = &clk_pclkd1, | ||
364 | .enable = s5p6442_clk_ip3_ctrl, | ||
365 | .ctrlbit = (1<<17), | ||
366 | }, { | ||
367 | .name = "uart", | ||
368 | .id = 1, | ||
369 | .parent = &clk_pclkd1, | ||
370 | .enable = s5p6442_clk_ip3_ctrl, | ||
371 | .ctrlbit = (1<<18), | ||
372 | }, { | ||
373 | .name = "uart", | ||
374 | .id = 2, | ||
375 | .parent = &clk_pclkd1, | ||
376 | .enable = s5p6442_clk_ip3_ctrl, | ||
377 | .ctrlbit = (1<<19), | ||
378 | }, { | ||
379 | .name = "watchdog", | ||
380 | .id = -1, | ||
381 | .parent = &clk_pclkd1, | ||
382 | .enable = s5p6442_clk_ip3_ctrl, | ||
383 | .ctrlbit = (1 << 22), | ||
384 | }, { | ||
385 | .name = "timers", | ||
386 | .id = -1, | ||
387 | .parent = &clk_pclkd1, | ||
388 | .enable = s5p6442_clk_ip3_ctrl, | ||
389 | .ctrlbit = (1<<23), | ||
390 | }, | ||
391 | }; | ||
392 | |||
393 | static struct clk *clks[] __initdata = { | ||
394 | &clk_ext, | ||
395 | &clk_epll, | ||
396 | &clk_mout_apll.clk, | ||
397 | &clk_mout_mpll.clk, | ||
398 | &clk_mout_epll.clk, | ||
399 | &clk_mout_d0.clk, | ||
400 | &clk_mout_d0sync.clk, | ||
401 | &clk_mout_d1.clk, | ||
402 | &clk_mout_d1sync.clk, | ||
403 | &clk_hclkd0, | ||
404 | &clk_pclkd0, | ||
405 | &clk_hclkd1, | ||
406 | &clk_pclkd1, | ||
407 | }; | ||
408 | |||
409 | void __init s5p6442_register_clocks(void) | ||
410 | { | ||
411 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | ||
412 | |||
413 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | ||
414 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | ||
415 | |||
416 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | ||
417 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); | ||
418 | |||
419 | s3c_pwmclk_init(); | ||
420 | } | ||
diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c deleted file mode 100644 index 842af86bda6d..000000000000 --- a/arch/arm/mach-s5p6442/cpu.c +++ /dev/null | |||
@@ -1,143 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/cpu.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/types.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/list.h> | ||
15 | #include <linux/timer.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/clk.h> | ||
18 | #include <linux/io.h> | ||
19 | #include <linux/sysdev.h> | ||
20 | #include <linux/serial_core.h> | ||
21 | #include <linux/platform_device.h> | ||
22 | #include <linux/sched.h> | ||
23 | |||
24 | #include <asm/mach/arch.h> | ||
25 | #include <asm/mach/map.h> | ||
26 | #include <asm/mach/irq.h> | ||
27 | |||
28 | #include <asm/proc-fns.h> | ||
29 | |||
30 | #include <mach/hardware.h> | ||
31 | #include <mach/map.h> | ||
32 | #include <asm/irq.h> | ||
33 | |||
34 | #include <plat/regs-serial.h> | ||
35 | #include <mach/regs-clock.h> | ||
36 | |||
37 | #include <plat/cpu.h> | ||
38 | #include <plat/devs.h> | ||
39 | #include <plat/clock.h> | ||
40 | #include <plat/s5p6442.h> | ||
41 | |||
42 | /* Initial IO mappings */ | ||
43 | |||
44 | static struct map_desc s5p6442_iodesc[] __initdata = { | ||
45 | { | ||
46 | .virtual = (unsigned long)S5P_VA_SYSTIMER, | ||
47 | .pfn = __phys_to_pfn(S5P6442_PA_SYSTIMER), | ||
48 | .length = SZ_16K, | ||
49 | .type = MT_DEVICE, | ||
50 | }, { | ||
51 | .virtual = (unsigned long)S5P_VA_GPIO, | ||
52 | .pfn = __phys_to_pfn(S5P6442_PA_GPIO), | ||
53 | .length = SZ_4K, | ||
54 | .type = MT_DEVICE, | ||
55 | }, { | ||
56 | .virtual = (unsigned long)VA_VIC0, | ||
57 | .pfn = __phys_to_pfn(S5P6442_PA_VIC0), | ||
58 | .length = SZ_16K, | ||
59 | .type = MT_DEVICE, | ||
60 | }, { | ||
61 | .virtual = (unsigned long)VA_VIC1, | ||
62 | .pfn = __phys_to_pfn(S5P6442_PA_VIC1), | ||
63 | .length = SZ_16K, | ||
64 | .type = MT_DEVICE, | ||
65 | }, { | ||
66 | .virtual = (unsigned long)VA_VIC2, | ||
67 | .pfn = __phys_to_pfn(S5P6442_PA_VIC2), | ||
68 | .length = SZ_16K, | ||
69 | .type = MT_DEVICE, | ||
70 | }, { | ||
71 | .virtual = (unsigned long)S3C_VA_UART, | ||
72 | .pfn = __phys_to_pfn(S3C_PA_UART), | ||
73 | .length = SZ_512K, | ||
74 | .type = MT_DEVICE, | ||
75 | } | ||
76 | }; | ||
77 | |||
78 | static void s5p6442_idle(void) | ||
79 | { | ||
80 | if (!need_resched()) | ||
81 | cpu_do_idle(); | ||
82 | |||
83 | local_irq_enable(); | ||
84 | } | ||
85 | |||
86 | /* | ||
87 | * s5p6442_map_io | ||
88 | * | ||
89 | * register the standard cpu IO areas | ||
90 | */ | ||
91 | |||
92 | void __init s5p6442_map_io(void) | ||
93 | { | ||
94 | iotable_init(s5p6442_iodesc, ARRAY_SIZE(s5p6442_iodesc)); | ||
95 | } | ||
96 | |||
97 | void __init s5p6442_init_clocks(int xtal) | ||
98 | { | ||
99 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); | ||
100 | |||
101 | s3c24xx_register_baseclocks(xtal); | ||
102 | s5p_register_clocks(xtal); | ||
103 | s5p6442_register_clocks(); | ||
104 | s5p6442_setup_clocks(); | ||
105 | } | ||
106 | |||
107 | void __init s5p6442_init_irq(void) | ||
108 | { | ||
109 | /* S5P6442 supports 3 VIC */ | ||
110 | u32 vic[3]; | ||
111 | |||
112 | /* VIC0, VIC1, and VIC2: some interrupt reserved */ | ||
113 | vic[0] = 0x7fefffff; | ||
114 | vic[1] = 0X7f389c81; | ||
115 | vic[2] = 0X1bbbcfff; | ||
116 | |||
117 | s5p_init_irq(vic, ARRAY_SIZE(vic)); | ||
118 | } | ||
119 | |||
120 | struct sysdev_class s5p6442_sysclass = { | ||
121 | .name = "s5p6442-core", | ||
122 | }; | ||
123 | |||
124 | static struct sys_device s5p6442_sysdev = { | ||
125 | .cls = &s5p6442_sysclass, | ||
126 | }; | ||
127 | |||
128 | static int __init s5p6442_core_init(void) | ||
129 | { | ||
130 | return sysdev_class_register(&s5p6442_sysclass); | ||
131 | } | ||
132 | |||
133 | core_initcall(s5p6442_core_init); | ||
134 | |||
135 | int __init s5p6442_init(void) | ||
136 | { | ||
137 | printk(KERN_INFO "S5P6442: Initializing architecture\n"); | ||
138 | |||
139 | /* set idle function */ | ||
140 | pm_idle = s5p6442_idle; | ||
141 | |||
142 | return sysdev_register(&s5p6442_sysdev); | ||
143 | } | ||
diff --git a/arch/arm/mach-s5p6442/dev-audio.c b/arch/arm/mach-s5p6442/dev-audio.c deleted file mode 100644 index 8719dc41fe32..000000000000 --- a/arch/arm/mach-s5p6442/dev-audio.c +++ /dev/null | |||
@@ -1,217 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/dev-audio.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co. Ltd | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/dma-mapping.h> | ||
13 | #include <linux/gpio.h> | ||
14 | |||
15 | #include <plat/gpio-cfg.h> | ||
16 | #include <plat/audio.h> | ||
17 | |||
18 | #include <mach/map.h> | ||
19 | #include <mach/dma.h> | ||
20 | #include <mach/irqs.h> | ||
21 | |||
22 | static int s5p6442_cfg_i2s(struct platform_device *pdev) | ||
23 | { | ||
24 | unsigned int base; | ||
25 | |||
26 | /* configure GPIO for i2s port */ | ||
27 | switch (pdev->id) { | ||
28 | case 1: | ||
29 | base = S5P6442_GPC1(0); | ||
30 | break; | ||
31 | |||
32 | case 0: | ||
33 | base = S5P6442_GPC0(0); | ||
34 | break; | ||
35 | |||
36 | default: | ||
37 | printk(KERN_ERR "Invalid Device %d\n", pdev->id); | ||
38 | return -EINVAL; | ||
39 | } | ||
40 | |||
41 | s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(2)); | ||
42 | return 0; | ||
43 | } | ||
44 | |||
45 | static const char *rclksrc_v35[] = { | ||
46 | [0] = "busclk", | ||
47 | [1] = "i2sclk", | ||
48 | }; | ||
49 | |||
50 | static struct s3c_audio_pdata i2sv35_pdata = { | ||
51 | .cfg_gpio = s5p6442_cfg_i2s, | ||
52 | .type = { | ||
53 | .i2s = { | ||
54 | .quirks = QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR, | ||
55 | .src_clk = rclksrc_v35, | ||
56 | }, | ||
57 | }, | ||
58 | }; | ||
59 | |||
60 | static struct resource s5p6442_iis0_resource[] = { | ||
61 | [0] = { | ||
62 | .start = S5P6442_PA_I2S0, | ||
63 | .end = S5P6442_PA_I2S0 + 0x100 - 1, | ||
64 | .flags = IORESOURCE_MEM, | ||
65 | }, | ||
66 | [1] = { | ||
67 | .start = DMACH_I2S0_TX, | ||
68 | .end = DMACH_I2S0_TX, | ||
69 | .flags = IORESOURCE_DMA, | ||
70 | }, | ||
71 | [2] = { | ||
72 | .start = DMACH_I2S0_RX, | ||
73 | .end = DMACH_I2S0_RX, | ||
74 | .flags = IORESOURCE_DMA, | ||
75 | }, | ||
76 | [3] = { | ||
77 | .start = DMACH_I2S0S_TX, | ||
78 | .end = DMACH_I2S0S_TX, | ||
79 | .flags = IORESOURCE_DMA, | ||
80 | }, | ||
81 | }; | ||
82 | |||
83 | struct platform_device s5p6442_device_iis0 = { | ||
84 | .name = "samsung-i2s", | ||
85 | .id = 0, | ||
86 | .num_resources = ARRAY_SIZE(s5p6442_iis0_resource), | ||
87 | .resource = s5p6442_iis0_resource, | ||
88 | .dev = { | ||
89 | .platform_data = &i2sv35_pdata, | ||
90 | }, | ||
91 | }; | ||
92 | |||
93 | static const char *rclksrc_v3[] = { | ||
94 | [0] = "iis", | ||
95 | [1] = "sclk_audio", | ||
96 | }; | ||
97 | |||
98 | static struct s3c_audio_pdata i2sv3_pdata = { | ||
99 | .cfg_gpio = s5p6442_cfg_i2s, | ||
100 | .type = { | ||
101 | .i2s = { | ||
102 | .src_clk = rclksrc_v3, | ||
103 | }, | ||
104 | }, | ||
105 | }; | ||
106 | |||
107 | static struct resource s5p6442_iis1_resource[] = { | ||
108 | [0] = { | ||
109 | .start = S5P6442_PA_I2S1, | ||
110 | .end = S5P6442_PA_I2S1 + 0x100 - 1, | ||
111 | .flags = IORESOURCE_MEM, | ||
112 | }, | ||
113 | [1] = { | ||
114 | .start = DMACH_I2S1_TX, | ||
115 | .end = DMACH_I2S1_TX, | ||
116 | .flags = IORESOURCE_DMA, | ||
117 | }, | ||
118 | [2] = { | ||
119 | .start = DMACH_I2S1_RX, | ||
120 | .end = DMACH_I2S1_RX, | ||
121 | .flags = IORESOURCE_DMA, | ||
122 | }, | ||
123 | }; | ||
124 | |||
125 | struct platform_device s5p6442_device_iis1 = { | ||
126 | .name = "samsung-i2s", | ||
127 | .id = 1, | ||
128 | .num_resources = ARRAY_SIZE(s5p6442_iis1_resource), | ||
129 | .resource = s5p6442_iis1_resource, | ||
130 | .dev = { | ||
131 | .platform_data = &i2sv3_pdata, | ||
132 | }, | ||
133 | }; | ||
134 | |||
135 | /* PCM Controller platform_devices */ | ||
136 | |||
137 | static int s5p6442_pcm_cfg_gpio(struct platform_device *pdev) | ||
138 | { | ||
139 | unsigned int base; | ||
140 | |||
141 | switch (pdev->id) { | ||
142 | case 0: | ||
143 | base = S5P6442_GPC0(0); | ||
144 | break; | ||
145 | |||
146 | case 1: | ||
147 | base = S5P6442_GPC1(0); | ||
148 | break; | ||
149 | |||
150 | default: | ||
151 | printk(KERN_DEBUG "Invalid PCM Controller number!"); | ||
152 | return -EINVAL; | ||
153 | } | ||
154 | |||
155 | s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(3)); | ||
156 | return 0; | ||
157 | } | ||
158 | |||
159 | static struct s3c_audio_pdata s3c_pcm_pdata = { | ||
160 | .cfg_gpio = s5p6442_pcm_cfg_gpio, | ||
161 | }; | ||
162 | |||
163 | static struct resource s5p6442_pcm0_resource[] = { | ||
164 | [0] = { | ||
165 | .start = S5P6442_PA_PCM0, | ||
166 | .end = S5P6442_PA_PCM0 + 0x100 - 1, | ||
167 | .flags = IORESOURCE_MEM, | ||
168 | }, | ||
169 | [1] = { | ||
170 | .start = DMACH_PCM0_TX, | ||
171 | .end = DMACH_PCM0_TX, | ||
172 | .flags = IORESOURCE_DMA, | ||
173 | }, | ||
174 | [2] = { | ||
175 | .start = DMACH_PCM0_RX, | ||
176 | .end = DMACH_PCM0_RX, | ||
177 | .flags = IORESOURCE_DMA, | ||
178 | }, | ||
179 | }; | ||
180 | |||
181 | struct platform_device s5p6442_device_pcm0 = { | ||
182 | .name = "samsung-pcm", | ||
183 | .id = 0, | ||
184 | .num_resources = ARRAY_SIZE(s5p6442_pcm0_resource), | ||
185 | .resource = s5p6442_pcm0_resource, | ||
186 | .dev = { | ||
187 | .platform_data = &s3c_pcm_pdata, | ||
188 | }, | ||
189 | }; | ||
190 | |||
191 | static struct resource s5p6442_pcm1_resource[] = { | ||
192 | [0] = { | ||
193 | .start = S5P6442_PA_PCM1, | ||
194 | .end = S5P6442_PA_PCM1 + 0x100 - 1, | ||
195 | .flags = IORESOURCE_MEM, | ||
196 | }, | ||
197 | [1] = { | ||
198 | .start = DMACH_PCM1_TX, | ||
199 | .end = DMACH_PCM1_TX, | ||
200 | .flags = IORESOURCE_DMA, | ||
201 | }, | ||
202 | [2] = { | ||
203 | .start = DMACH_PCM1_RX, | ||
204 | .end = DMACH_PCM1_RX, | ||
205 | .flags = IORESOURCE_DMA, | ||
206 | }, | ||
207 | }; | ||
208 | |||
209 | struct platform_device s5p6442_device_pcm1 = { | ||
210 | .name = "samsung-pcm", | ||
211 | .id = 1, | ||
212 | .num_resources = ARRAY_SIZE(s5p6442_pcm1_resource), | ||
213 | .resource = s5p6442_pcm1_resource, | ||
214 | .dev = { | ||
215 | .platform_data = &s3c_pcm_pdata, | ||
216 | }, | ||
217 | }; | ||
diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c deleted file mode 100644 index cce8c2470709..000000000000 --- a/arch/arm/mach-s5p6442/dev-spi.c +++ /dev/null | |||
@@ -1,121 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/dev-spi.c | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/dma-mapping.h> | ||
13 | #include <linux/gpio.h> | ||
14 | |||
15 | #include <mach/dma.h> | ||
16 | #include <mach/map.h> | ||
17 | #include <mach/irqs.h> | ||
18 | #include <mach/spi-clocks.h> | ||
19 | |||
20 | #include <plat/s3c64xx-spi.h> | ||
21 | #include <plat/gpio-cfg.h> | ||
22 | |||
23 | static char *spi_src_clks[] = { | ||
24 | [S5P6442_SPI_SRCCLK_PCLK] = "pclk", | ||
25 | [S5P6442_SPI_SRCCLK_SCLK] = "spi_epll", | ||
26 | }; | ||
27 | |||
28 | /* SPI Controller platform_devices */ | ||
29 | |||
30 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
31 | * The emulated CS is toggled by board specific mechanism, as it can | ||
32 | * be either some immediate GPIO or some signal out of some other | ||
33 | * chip in between ... or some yet another way. | ||
34 | * We simply do not assume anything about CS. | ||
35 | */ | ||
36 | static int s5p6442_spi_cfg_gpio(struct platform_device *pdev) | ||
37 | { | ||
38 | switch (pdev->id) { | ||
39 | case 0: | ||
40 | s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2)); | ||
41 | s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP); | ||
42 | s3c_gpio_cfgall_range(S5P6442_GPB(2), 2, | ||
43 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
44 | break; | ||
45 | |||
46 | default: | ||
47 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
48 | return -EINVAL; | ||
49 | } | ||
50 | |||
51 | return 0; | ||
52 | } | ||
53 | |||
54 | static struct resource s5p6442_spi0_resource[] = { | ||
55 | [0] = { | ||
56 | .start = S5P6442_PA_SPI, | ||
57 | .end = S5P6442_PA_SPI + 0x100 - 1, | ||
58 | .flags = IORESOURCE_MEM, | ||
59 | }, | ||
60 | [1] = { | ||
61 | .start = DMACH_SPI0_TX, | ||
62 | .end = DMACH_SPI0_TX, | ||
63 | .flags = IORESOURCE_DMA, | ||
64 | }, | ||
65 | [2] = { | ||
66 | .start = DMACH_SPI0_RX, | ||
67 | .end = DMACH_SPI0_RX, | ||
68 | .flags = IORESOURCE_DMA, | ||
69 | }, | ||
70 | [3] = { | ||
71 | .start = IRQ_SPI0, | ||
72 | .end = IRQ_SPI0, | ||
73 | .flags = IORESOURCE_IRQ, | ||
74 | }, | ||
75 | }; | ||
76 | |||
77 | static struct s3c64xx_spi_info s5p6442_spi0_pdata = { | ||
78 | .cfg_gpio = s5p6442_spi_cfg_gpio, | ||
79 | .fifo_lvl_mask = 0x1ff, | ||
80 | .rx_lvl_offset = 15, | ||
81 | }; | ||
82 | |||
83 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
84 | |||
85 | struct platform_device s5p6442_device_spi = { | ||
86 | .name = "s3c64xx-spi", | ||
87 | .id = 0, | ||
88 | .num_resources = ARRAY_SIZE(s5p6442_spi0_resource), | ||
89 | .resource = s5p6442_spi0_resource, | ||
90 | .dev = { | ||
91 | .dma_mask = &spi_dmamask, | ||
92 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
93 | .platform_data = &s5p6442_spi0_pdata, | ||
94 | }, | ||
95 | }; | ||
96 | |||
97 | void __init s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
98 | { | ||
99 | struct s3c64xx_spi_info *pd; | ||
100 | |||
101 | /* Reject invalid configuration */ | ||
102 | if (!num_cs || src_clk_nr < 0 | ||
103 | || src_clk_nr > S5P6442_SPI_SRCCLK_SCLK) { | ||
104 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
105 | return; | ||
106 | } | ||
107 | |||
108 | switch (cntrlr) { | ||
109 | case 0: | ||
110 | pd = &s5p6442_spi0_pdata; | ||
111 | break; | ||
112 | default: | ||
113 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
114 | __func__, cntrlr); | ||
115 | return; | ||
116 | } | ||
117 | |||
118 | pd->num_cs = num_cs; | ||
119 | pd->src_clk_nr = src_clk_nr; | ||
120 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
121 | } | ||
diff --git a/arch/arm/mach-s5p6442/dma.c b/arch/arm/mach-s5p6442/dma.c deleted file mode 100644 index 7dfb13654f8a..000000000000 --- a/arch/arm/mach-s5p6442/dma.c +++ /dev/null | |||
@@ -1,105 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
3 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
18 | */ | ||
19 | |||
20 | #include <linux/platform_device.h> | ||
21 | #include <linux/dma-mapping.h> | ||
22 | |||
23 | #include <plat/devs.h> | ||
24 | #include <plat/irqs.h> | ||
25 | |||
26 | #include <mach/map.h> | ||
27 | #include <mach/irqs.h> | ||
28 | |||
29 | #include <plat/s3c-pl330-pdata.h> | ||
30 | |||
31 | static u64 dma_dmamask = DMA_BIT_MASK(32); | ||
32 | |||
33 | static struct resource s5p6442_pdma_resource[] = { | ||
34 | [0] = { | ||
35 | .start = S5P6442_PA_PDMA, | ||
36 | .end = S5P6442_PA_PDMA + SZ_4K, | ||
37 | .flags = IORESOURCE_MEM, | ||
38 | }, | ||
39 | [1] = { | ||
40 | .start = IRQ_PDMA, | ||
41 | .end = IRQ_PDMA, | ||
42 | .flags = IORESOURCE_IRQ, | ||
43 | }, | ||
44 | }; | ||
45 | |||
46 | static struct s3c_pl330_platdata s5p6442_pdma_pdata = { | ||
47 | .peri = { | ||
48 | [0] = DMACH_UART0_RX, | ||
49 | [1] = DMACH_UART0_TX, | ||
50 | [2] = DMACH_UART1_RX, | ||
51 | [3] = DMACH_UART1_TX, | ||
52 | [4] = DMACH_UART2_RX, | ||
53 | [5] = DMACH_UART2_TX, | ||
54 | [6] = DMACH_MAX, | ||
55 | [7] = DMACH_MAX, | ||
56 | [8] = DMACH_MAX, | ||
57 | [9] = DMACH_I2S0_RX, | ||
58 | [10] = DMACH_I2S0_TX, | ||
59 | [11] = DMACH_I2S0S_TX, | ||
60 | [12] = DMACH_I2S1_RX, | ||
61 | [13] = DMACH_I2S1_TX, | ||
62 | [14] = DMACH_MAX, | ||
63 | [15] = DMACH_MAX, | ||
64 | [16] = DMACH_SPI0_RX, | ||
65 | [17] = DMACH_SPI0_TX, | ||
66 | [18] = DMACH_MAX, | ||
67 | [19] = DMACH_MAX, | ||
68 | [20] = DMACH_PCM0_RX, | ||
69 | [21] = DMACH_PCM0_TX, | ||
70 | [22] = DMACH_PCM1_RX, | ||
71 | [23] = DMACH_PCM1_TX, | ||
72 | [24] = DMACH_MAX, | ||
73 | [25] = DMACH_MAX, | ||
74 | [26] = DMACH_MAX, | ||
75 | [27] = DMACH_MSM_REQ0, | ||
76 | [28] = DMACH_MSM_REQ1, | ||
77 | [29] = DMACH_MSM_REQ2, | ||
78 | [30] = DMACH_MSM_REQ3, | ||
79 | [31] = DMACH_MAX, | ||
80 | }, | ||
81 | }; | ||
82 | |||
83 | static struct platform_device s5p6442_device_pdma = { | ||
84 | .name = "s3c-pl330", | ||
85 | .id = -1, | ||
86 | .num_resources = ARRAY_SIZE(s5p6442_pdma_resource), | ||
87 | .resource = s5p6442_pdma_resource, | ||
88 | .dev = { | ||
89 | .dma_mask = &dma_dmamask, | ||
90 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
91 | .platform_data = &s5p6442_pdma_pdata, | ||
92 | }, | ||
93 | }; | ||
94 | |||
95 | static struct platform_device *s5p6442_dmacs[] __initdata = { | ||
96 | &s5p6442_device_pdma, | ||
97 | }; | ||
98 | |||
99 | static int __init s5p6442_dma_init(void) | ||
100 | { | ||
101 | platform_add_devices(s5p6442_dmacs, ARRAY_SIZE(s5p6442_dmacs)); | ||
102 | |||
103 | return 0; | ||
104 | } | ||
105 | arch_initcall(s5p6442_dma_init); | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/debug-macro.S b/arch/arm/mach-s5p6442/include/mach/debug-macro.S deleted file mode 100644 index e2213205d780..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/debug-macro.S +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/debug-macro.S | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* pull in the relevant register and map files. */ | ||
14 | |||
15 | #include <mach/map.h> | ||
16 | #include <plat/regs-serial.h> | ||
17 | |||
18 | .macro addruart, rp, rv | ||
19 | ldr \rp, = S3C_PA_UART | ||
20 | ldr \rv, = S3C_VA_UART | ||
21 | #if CONFIG_DEBUG_S3C_UART != 0 | ||
22 | add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) | ||
23 | add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) | ||
24 | #endif | ||
25 | .endm | ||
26 | |||
27 | #define fifo_full fifo_full_s5pv210 | ||
28 | #define fifo_level fifo_level_s5pv210 | ||
29 | |||
30 | /* include the reset of the code which will do the work, we're only | ||
31 | * compiling for a single cpu processor type so the default of s3c2440 | ||
32 | * will be fine with us. | ||
33 | */ | ||
34 | |||
35 | #include <plat/debug-macro.S> | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/dma.h b/arch/arm/mach-s5p6442/include/mach/dma.h deleted file mode 100644 index 81209eb1409b..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/dma.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
3 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
18 | */ | ||
19 | |||
20 | #ifndef __MACH_DMA_H | ||
21 | #define __MACH_DMA_H | ||
22 | |||
23 | /* This platform uses the common S3C DMA API driver for PL330 */ | ||
24 | #include <plat/s3c-dma-pl330.h> | ||
25 | |||
26 | #endif /* __MACH_DMA_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/entry-macro.S b/arch/arm/mach-s5p6442/include/mach/entry-macro.S deleted file mode 100644 index 6d574edbf1ae..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Low-level IRQ helper macros for the Samsung S5P6442 | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <asm/hardware/vic.h> | ||
14 | #include <mach/map.h> | ||
15 | #include <plat/irqs.h> | ||
16 | |||
17 | .macro disable_fiq | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_preamble, base, tmp | ||
21 | ldr \base, =VA_VIC0 | ||
22 | .endm | ||
23 | |||
24 | .macro arch_ret_to_user, tmp1, tmp2 | ||
25 | .endm | ||
26 | |||
27 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
28 | |||
29 | @ check the vic0 | ||
30 | mov \irqnr, # S5P_IRQ_OFFSET + 31 | ||
31 | ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] | ||
32 | teq \irqstat, #0 | ||
33 | |||
34 | @ otherwise try vic1 | ||
35 | addeq \tmp, \base, #(VA_VIC1 - VA_VIC0) | ||
36 | addeq \irqnr, \irqnr, #32 | ||
37 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] | ||
38 | teqeq \irqstat, #0 | ||
39 | |||
40 | @ otherwise try vic2 | ||
41 | addeq \tmp, \base, #(VA_VIC2 - VA_VIC0) | ||
42 | addeq \irqnr, \irqnr, #32 | ||
43 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] | ||
44 | teqeq \irqstat, #0 | ||
45 | |||
46 | clzne \irqstat, \irqstat | ||
47 | subne \irqnr, \irqnr, \irqstat | ||
48 | .endm | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/gpio.h b/arch/arm/mach-s5p6442/include/mach/gpio.h deleted file mode 100644 index b8715df2fdab..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/gpio.h +++ /dev/null | |||
@@ -1,123 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/gpio.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - GPIO lib support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_GPIO_H | ||
14 | #define __ASM_ARCH_GPIO_H __FILE__ | ||
15 | |||
16 | #define gpio_get_value __gpio_get_value | ||
17 | #define gpio_set_value __gpio_set_value | ||
18 | #define gpio_cansleep __gpio_cansleep | ||
19 | #define gpio_to_irq __gpio_to_irq | ||
20 | |||
21 | /* GPIO bank sizes */ | ||
22 | #define S5P6442_GPIO_A0_NR (8) | ||
23 | #define S5P6442_GPIO_A1_NR (2) | ||
24 | #define S5P6442_GPIO_B_NR (4) | ||
25 | #define S5P6442_GPIO_C0_NR (5) | ||
26 | #define S5P6442_GPIO_C1_NR (5) | ||
27 | #define S5P6442_GPIO_D0_NR (2) | ||
28 | #define S5P6442_GPIO_D1_NR (6) | ||
29 | #define S5P6442_GPIO_E0_NR (8) | ||
30 | #define S5P6442_GPIO_E1_NR (5) | ||
31 | #define S5P6442_GPIO_F0_NR (8) | ||
32 | #define S5P6442_GPIO_F1_NR (8) | ||
33 | #define S5P6442_GPIO_F2_NR (8) | ||
34 | #define S5P6442_GPIO_F3_NR (6) | ||
35 | #define S5P6442_GPIO_G0_NR (7) | ||
36 | #define S5P6442_GPIO_G1_NR (7) | ||
37 | #define S5P6442_GPIO_G2_NR (7) | ||
38 | #define S5P6442_GPIO_H0_NR (8) | ||
39 | #define S5P6442_GPIO_H1_NR (8) | ||
40 | #define S5P6442_GPIO_H2_NR (8) | ||
41 | #define S5P6442_GPIO_H3_NR (8) | ||
42 | #define S5P6442_GPIO_J0_NR (8) | ||
43 | #define S5P6442_GPIO_J1_NR (6) | ||
44 | #define S5P6442_GPIO_J2_NR (8) | ||
45 | #define S5P6442_GPIO_J3_NR (8) | ||
46 | #define S5P6442_GPIO_J4_NR (5) | ||
47 | |||
48 | /* GPIO bank numbers */ | ||
49 | |||
50 | /* CONFIG_S3C_GPIO_SPACE allows the user to select extra | ||
51 | * space for debugging purposes so that any accidental | ||
52 | * change from one gpio bank to another can be caught. | ||
53 | */ | ||
54 | |||
55 | #define S5P6442_GPIO_NEXT(__gpio) \ | ||
56 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) | ||
57 | |||
58 | enum s5p_gpio_number { | ||
59 | S5P6442_GPIO_A0_START = 0, | ||
60 | S5P6442_GPIO_A1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_A0), | ||
61 | S5P6442_GPIO_B_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_A1), | ||
62 | S5P6442_GPIO_C0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_B), | ||
63 | S5P6442_GPIO_C1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_C0), | ||
64 | S5P6442_GPIO_D0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_C1), | ||
65 | S5P6442_GPIO_D1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_D0), | ||
66 | S5P6442_GPIO_E0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_D1), | ||
67 | S5P6442_GPIO_E1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_E0), | ||
68 | S5P6442_GPIO_F0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_E1), | ||
69 | S5P6442_GPIO_F1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F0), | ||
70 | S5P6442_GPIO_F2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F1), | ||
71 | S5P6442_GPIO_F3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F2), | ||
72 | S5P6442_GPIO_G0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F3), | ||
73 | S5P6442_GPIO_G1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G0), | ||
74 | S5P6442_GPIO_G2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G1), | ||
75 | S5P6442_GPIO_H0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G2), | ||
76 | S5P6442_GPIO_H1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H0), | ||
77 | S5P6442_GPIO_H2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H1), | ||
78 | S5P6442_GPIO_H3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H2), | ||
79 | S5P6442_GPIO_J0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H3), | ||
80 | S5P6442_GPIO_J1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J0), | ||
81 | S5P6442_GPIO_J2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J1), | ||
82 | S5P6442_GPIO_J3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J2), | ||
83 | S5P6442_GPIO_J4_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J3), | ||
84 | }; | ||
85 | |||
86 | /* S5P6442 GPIO number definitions. */ | ||
87 | #define S5P6442_GPA0(_nr) (S5P6442_GPIO_A0_START + (_nr)) | ||
88 | #define S5P6442_GPA1(_nr) (S5P6442_GPIO_A1_START + (_nr)) | ||
89 | #define S5P6442_GPB(_nr) (S5P6442_GPIO_B_START + (_nr)) | ||
90 | #define S5P6442_GPC0(_nr) (S5P6442_GPIO_C0_START + (_nr)) | ||
91 | #define S5P6442_GPC1(_nr) (S5P6442_GPIO_C1_START + (_nr)) | ||
92 | #define S5P6442_GPD0(_nr) (S5P6442_GPIO_D0_START + (_nr)) | ||
93 | #define S5P6442_GPD1(_nr) (S5P6442_GPIO_D1_START + (_nr)) | ||
94 | #define S5P6442_GPE0(_nr) (S5P6442_GPIO_E0_START + (_nr)) | ||
95 | #define S5P6442_GPE1(_nr) (S5P6442_GPIO_E1_START + (_nr)) | ||
96 | #define S5P6442_GPF0(_nr) (S5P6442_GPIO_F0_START + (_nr)) | ||
97 | #define S5P6442_GPF1(_nr) (S5P6442_GPIO_F1_START + (_nr)) | ||
98 | #define S5P6442_GPF2(_nr) (S5P6442_GPIO_F2_START + (_nr)) | ||
99 | #define S5P6442_GPF3(_nr) (S5P6442_GPIO_F3_START + (_nr)) | ||
100 | #define S5P6442_GPG0(_nr) (S5P6442_GPIO_G0_START + (_nr)) | ||
101 | #define S5P6442_GPG1(_nr) (S5P6442_GPIO_G1_START + (_nr)) | ||
102 | #define S5P6442_GPG2(_nr) (S5P6442_GPIO_G2_START + (_nr)) | ||
103 | #define S5P6442_GPH0(_nr) (S5P6442_GPIO_H0_START + (_nr)) | ||
104 | #define S5P6442_GPH1(_nr) (S5P6442_GPIO_H1_START + (_nr)) | ||
105 | #define S5P6442_GPH2(_nr) (S5P6442_GPIO_H2_START + (_nr)) | ||
106 | #define S5P6442_GPH3(_nr) (S5P6442_GPIO_H3_START + (_nr)) | ||
107 | #define S5P6442_GPJ0(_nr) (S5P6442_GPIO_J0_START + (_nr)) | ||
108 | #define S5P6442_GPJ1(_nr) (S5P6442_GPIO_J1_START + (_nr)) | ||
109 | #define S5P6442_GPJ2(_nr) (S5P6442_GPIO_J2_START + (_nr)) | ||
110 | #define S5P6442_GPJ3(_nr) (S5P6442_GPIO_J3_START + (_nr)) | ||
111 | #define S5P6442_GPJ4(_nr) (S5P6442_GPIO_J4_START + (_nr)) | ||
112 | |||
113 | /* the end of the S5P6442 specific gpios */ | ||
114 | #define S5P6442_GPIO_END (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + 1) | ||
115 | #define S3C_GPIO_END S5P6442_GPIO_END | ||
116 | |||
117 | /* define the number of gpios we need to the one after the GPJ4() range */ | ||
118 | #define ARCH_NR_GPIOS (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + \ | ||
119 | CONFIG_SAMSUNG_GPIO_EXTRA + 1) | ||
120 | |||
121 | #include <asm-generic/gpio.h> | ||
122 | |||
123 | #endif /* __ASM_ARCH_GPIO_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/hardware.h b/arch/arm/mach-s5p6442/include/mach/hardware.h deleted file mode 100644 index 8cd7b67b49d4..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/hardware.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/hardware.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - Hardware support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_HARDWARE_H | ||
14 | #define __ASM_ARCH_HARDWARE_H __FILE__ | ||
15 | |||
16 | /* currently nothing here, placeholder */ | ||
17 | |||
18 | #endif /* __ASM_ARCH_HARDWARE_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/io.h b/arch/arm/mach-s5p6442/include/mach/io.h deleted file mode 100644 index 5d2195ad0b67..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/io.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* arch/arm/mach-s5p6442/include/mach/io.h | ||
2 | * | ||
3 | * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org> | ||
4 | * | ||
5 | * Default IO routines for S5P6442 | ||
6 | */ | ||
7 | |||
8 | #ifndef __ASM_ARM_ARCH_IO_H | ||
9 | #define __ASM_ARM_ARCH_IO_H | ||
10 | |||
11 | /* No current ISA/PCI bus support. */ | ||
12 | #define __io(a) __typesafe_io(a) | ||
13 | #define __mem_pci(a) (a) | ||
14 | |||
15 | #define IO_SPACE_LIMIT (0xFFFFFFFF) | ||
16 | |||
17 | #endif | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h deleted file mode 100644 index 3fbc6c3ad2da..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/irqs.h +++ /dev/null | |||
@@ -1,87 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/irqs.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - IRQ definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_IRQS_H | ||
14 | #define __ASM_ARCH_IRQS_H __FILE__ | ||
15 | |||
16 | #include <plat/irqs.h> | ||
17 | |||
18 | /* VIC0 */ | ||
19 | #define IRQ_EINT16_31 S5P_IRQ_VIC0(16) | ||
20 | #define IRQ_BATF S5P_IRQ_VIC0(17) | ||
21 | #define IRQ_MDMA S5P_IRQ_VIC0(18) | ||
22 | #define IRQ_PDMA S5P_IRQ_VIC0(19) | ||
23 | #define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21) | ||
24 | #define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22) | ||
25 | #define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23) | ||
26 | #define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24) | ||
27 | #define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25) | ||
28 | #define IRQ_SYSTIMER S5P_IRQ_VIC0(26) | ||
29 | #define IRQ_WDT S5P_IRQ_VIC0(27) | ||
30 | #define IRQ_RTC_ALARM S5P_IRQ_VIC0(28) | ||
31 | #define IRQ_RTC_TIC S5P_IRQ_VIC0(29) | ||
32 | #define IRQ_GPIOINT S5P_IRQ_VIC0(30) | ||
33 | |||
34 | /* VIC1 */ | ||
35 | #define IRQ_PMU S5P_IRQ_VIC1(0) | ||
36 | #define IRQ_ONENAND S5P_IRQ_VIC1(7) | ||
37 | #define IRQ_UART0 S5P_IRQ_VIC1(10) | ||
38 | #define IRQ_UART1 S5P_IRQ_VIC1(11) | ||
39 | #define IRQ_UART2 S5P_IRQ_VIC1(12) | ||
40 | #define IRQ_SPI0 S5P_IRQ_VIC1(15) | ||
41 | #define IRQ_IIC S5P_IRQ_VIC1(19) | ||
42 | #define IRQ_IIC1 S5P_IRQ_VIC1(20) | ||
43 | #define IRQ_IIC2 S5P_IRQ_VIC1(21) | ||
44 | #define IRQ_OTG S5P_IRQ_VIC1(24) | ||
45 | #define IRQ_MSM S5P_IRQ_VIC1(25) | ||
46 | #define IRQ_HSMMC0 S5P_IRQ_VIC1(26) | ||
47 | #define IRQ_HSMMC1 S5P_IRQ_VIC1(27) | ||
48 | #define IRQ_HSMMC2 S5P_IRQ_VIC1(28) | ||
49 | #define IRQ_COMMRX S5P_IRQ_VIC1(29) | ||
50 | #define IRQ_COMMTX S5P_IRQ_VIC1(30) | ||
51 | |||
52 | /* VIC2 */ | ||
53 | #define IRQ_LCD0 S5P_IRQ_VIC2(0) | ||
54 | #define IRQ_LCD1 S5P_IRQ_VIC2(1) | ||
55 | #define IRQ_LCD2 S5P_IRQ_VIC2(2) | ||
56 | #define IRQ_LCD3 S5P_IRQ_VIC2(3) | ||
57 | #define IRQ_ROTATOR S5P_IRQ_VIC2(4) | ||
58 | #define IRQ_FIMC0 S5P_IRQ_VIC2(5) | ||
59 | #define IRQ_FIMC1 S5P_IRQ_VIC2(6) | ||
60 | #define IRQ_FIMC2 S5P_IRQ_VIC2(7) | ||
61 | #define IRQ_JPEG S5P_IRQ_VIC2(8) | ||
62 | #define IRQ_3D S5P_IRQ_VIC2(10) | ||
63 | #define IRQ_Mixer S5P_IRQ_VIC2(11) | ||
64 | #define IRQ_MFC S5P_IRQ_VIC2(14) | ||
65 | #define IRQ_TVENC S5P_IRQ_VIC2(15) | ||
66 | #define IRQ_I2S0 S5P_IRQ_VIC2(16) | ||
67 | #define IRQ_I2S1 S5P_IRQ_VIC2(17) | ||
68 | #define IRQ_RP S5P_IRQ_VIC2(19) | ||
69 | #define IRQ_PCM0 S5P_IRQ_VIC2(20) | ||
70 | #define IRQ_PCM1 S5P_IRQ_VIC2(21) | ||
71 | #define IRQ_ADC S5P_IRQ_VIC2(23) | ||
72 | #define IRQ_PENDN S5P_IRQ_VIC2(24) | ||
73 | #define IRQ_KEYPAD S5P_IRQ_VIC2(25) | ||
74 | #define IRQ_SSS_INT S5P_IRQ_VIC2(27) | ||
75 | #define IRQ_SSS_HASH S5P_IRQ_VIC2(28) | ||
76 | #define IRQ_VIC_END S5P_IRQ_VIC2(31) | ||
77 | |||
78 | #define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) | ||
79 | |||
80 | #define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) | ||
81 | #define S5P_EINT_BASE2 (S5P_IRQ_EINT_BASE) | ||
82 | |||
83 | /* Set the default NR_IRQS */ | ||
84 | |||
85 | #define NR_IRQS (IRQ_EINT(31) + 1) | ||
86 | |||
87 | #endif /* __ASM_ARCH_IRQS_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h deleted file mode 100644 index 058dab4482a1..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/map.h +++ /dev/null | |||
@@ -1,76 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/map.h | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - Memory map definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_MAP_H | ||
14 | #define __ASM_ARCH_MAP_H __FILE__ | ||
15 | |||
16 | #include <plat/map-base.h> | ||
17 | #include <plat/map-s5p.h> | ||
18 | |||
19 | #define S5P6442_PA_SDRAM 0x20000000 | ||
20 | |||
21 | #define S5P6442_PA_I2S0 0xC0B00000 | ||
22 | #define S5P6442_PA_I2S1 0xF2200000 | ||
23 | |||
24 | #define S5P6442_PA_CHIPID 0xE0000000 | ||
25 | |||
26 | #define S5P6442_PA_SYSCON 0xE0100000 | ||
27 | |||
28 | #define S5P6442_PA_GPIO 0xE0200000 | ||
29 | |||
30 | #define S5P6442_PA_VIC0 0xE4000000 | ||
31 | #define S5P6442_PA_VIC1 0xE4100000 | ||
32 | #define S5P6442_PA_VIC2 0xE4200000 | ||
33 | |||
34 | #define S5P6442_PA_SROMC 0xE7000000 | ||
35 | |||
36 | #define S5P6442_PA_MDMA 0xE8000000 | ||
37 | #define S5P6442_PA_PDMA 0xE9000000 | ||
38 | |||
39 | #define S5P6442_PA_TIMER 0xEA000000 | ||
40 | |||
41 | #define S5P6442_PA_SYSTIMER 0xEA100000 | ||
42 | |||
43 | #define S5P6442_PA_WATCHDOG 0xEA200000 | ||
44 | |||
45 | #define S5P6442_PA_UART 0xEC000000 | ||
46 | |||
47 | #define S5P6442_PA_IIC0 0xEC100000 | ||
48 | |||
49 | #define S5P6442_PA_SPI 0xEC300000 | ||
50 | |||
51 | #define S5P6442_PA_PCM0 0xF2400000 | ||
52 | #define S5P6442_PA_PCM1 0xF2500000 | ||
53 | |||
54 | /* Compatibiltiy Defines */ | ||
55 | |||
56 | #define S3C_PA_IIC S5P6442_PA_IIC0 | ||
57 | #define S3C_PA_WDT S5P6442_PA_WATCHDOG | ||
58 | |||
59 | #define S5P_PA_CHIPID S5P6442_PA_CHIPID | ||
60 | #define S5P_PA_SDRAM S5P6442_PA_SDRAM | ||
61 | #define S5P_PA_SROMC S5P6442_PA_SROMC | ||
62 | #define S5P_PA_SYSCON S5P6442_PA_SYSCON | ||
63 | #define S5P_PA_TIMER S5P6442_PA_TIMER | ||
64 | |||
65 | /* UART */ | ||
66 | |||
67 | #define S3C_PA_UART S5P6442_PA_UART | ||
68 | |||
69 | #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) | ||
70 | #define S5P_PA_UART0 S5P_PA_UART(0) | ||
71 | #define S5P_PA_UART1 S5P_PA_UART(1) | ||
72 | #define S5P_PA_UART2 S5P_PA_UART(2) | ||
73 | |||
74 | #define S5P_SZ_UART SZ_256 | ||
75 | |||
76 | #endif /* __ASM_ARCH_MAP_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/memory.h b/arch/arm/mach-s5p6442/include/mach/memory.h deleted file mode 100644 index cfe259dded33..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/memory.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/memory.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - Memory definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_MEMORY_H | ||
14 | #define __ASM_ARCH_MEMORY_H | ||
15 | |||
16 | #define PLAT_PHYS_OFFSET UL(0x20000000) | ||
17 | #define CONSISTENT_DMA_SIZE SZ_8M | ||
18 | |||
19 | #endif /* __ASM_ARCH_MEMORY_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h deleted file mode 100644 index 2724b37def31..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Copyright 2008 Openmoko, Inc. | ||
7 | * Copyright 2008 Simtec Electronics | ||
8 | * Ben Dooks <ben@simtec.co.uk> | ||
9 | * http://armlinux.simtec.co.uk/ | ||
10 | * | ||
11 | * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h | ||
12 | * | ||
13 | * S5P6442 - pwm clock and timer support | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License version 2 as | ||
17 | * published by the Free Software Foundation. | ||
18 | */ | ||
19 | |||
20 | #ifndef __ASM_ARCH_PWMCLK_H | ||
21 | #define __ASM_ARCH_PWMCLK_H __FILE__ | ||
22 | |||
23 | /** | ||
24 | * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk | ||
25 | * @tcfg: The timer TCFG1 register bits shifted down to 0. | ||
26 | * | ||
27 | * Return true if the given configuration from TCFG1 is a TCLK instead | ||
28 | * any of the TDIV clocks. | ||
29 | */ | ||
30 | static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) | ||
31 | { | ||
32 | return tcfg == S3C64XX_TCFG1_MUX_TCLK; | ||
33 | } | ||
34 | |||
35 | /** | ||
36 | * tcfg_to_divisor() - convert tcfg1 setting to a divisor | ||
37 | * @tcfg1: The tcfg1 setting, shifted down. | ||
38 | * | ||
39 | * Get the divisor value for the given tcfg1 setting. We assume the | ||
40 | * caller has already checked to see if this is not a TCLK source. | ||
41 | */ | ||
42 | static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) | ||
43 | { | ||
44 | return 1 << tcfg1; | ||
45 | } | ||
46 | |||
47 | /** | ||
48 | * pwm_tdiv_has_div1() - does the tdiv setting have a /1 | ||
49 | * | ||
50 | * Return true if we have a /1 in the tdiv setting. | ||
51 | */ | ||
52 | static inline unsigned int pwm_tdiv_has_div1(void) | ||
53 | { | ||
54 | return 1; | ||
55 | } | ||
56 | |||
57 | /** | ||
58 | * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. | ||
59 | * @div: The divisor to calculate the bit information for. | ||
60 | * | ||
61 | * Turn a divisor into the necessary bit field for TCFG1. | ||
62 | */ | ||
63 | static inline unsigned long pwm_tdiv_div_bits(unsigned int div) | ||
64 | { | ||
65 | return ilog2(div); | ||
66 | } | ||
67 | |||
68 | #define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK | ||
69 | |||
70 | #endif /* __ASM_ARCH_PWMCLK_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-clock.h b/arch/arm/mach-s5p6442/include/mach/regs-clock.h deleted file mode 100644 index 00828a336991..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/regs-clock.h +++ /dev/null | |||
@@ -1,104 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/regs-clock.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - Clock register definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_CLOCK_H | ||
14 | #define __ASM_ARCH_REGS_CLOCK_H __FILE__ | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | |||
18 | #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) | ||
19 | |||
20 | #define S5P_APLL_LOCK S5P_CLKREG(0x00) | ||
21 | #define S5P_MPLL_LOCK S5P_CLKREG(0x08) | ||
22 | #define S5P_EPLL_LOCK S5P_CLKREG(0x10) | ||
23 | #define S5P_VPLL_LOCK S5P_CLKREG(0x20) | ||
24 | |||
25 | #define S5P_APLL_CON S5P_CLKREG(0x100) | ||
26 | #define S5P_MPLL_CON S5P_CLKREG(0x108) | ||
27 | #define S5P_EPLL_CON S5P_CLKREG(0x110) | ||
28 | #define S5P_VPLL_CON S5P_CLKREG(0x120) | ||
29 | |||
30 | #define S5P_CLK_SRC0 S5P_CLKREG(0x200) | ||
31 | #define S5P_CLK_SRC1 S5P_CLKREG(0x204) | ||
32 | #define S5P_CLK_SRC2 S5P_CLKREG(0x208) | ||
33 | #define S5P_CLK_SRC3 S5P_CLKREG(0x20C) | ||
34 | #define S5P_CLK_SRC4 S5P_CLKREG(0x210) | ||
35 | #define S5P_CLK_SRC5 S5P_CLKREG(0x214) | ||
36 | #define S5P_CLK_SRC6 S5P_CLKREG(0x218) | ||
37 | |||
38 | #define S5P_CLK_SRC_MASK0 S5P_CLKREG(0x280) | ||
39 | #define S5P_CLK_SRC_MASK1 S5P_CLKREG(0x284) | ||
40 | |||
41 | #define S5P_CLK_DIV0 S5P_CLKREG(0x300) | ||
42 | #define S5P_CLK_DIV1 S5P_CLKREG(0x304) | ||
43 | #define S5P_CLK_DIV2 S5P_CLKREG(0x308) | ||
44 | #define S5P_CLK_DIV3 S5P_CLKREG(0x30C) | ||
45 | #define S5P_CLK_DIV4 S5P_CLKREG(0x310) | ||
46 | #define S5P_CLK_DIV5 S5P_CLKREG(0x314) | ||
47 | #define S5P_CLK_DIV6 S5P_CLKREG(0x318) | ||
48 | |||
49 | #define S5P_CLKGATE_IP0 S5P_CLKREG(0x460) | ||
50 | #define S5P_CLKGATE_IP3 S5P_CLKREG(0x46C) | ||
51 | |||
52 | /* CLK_OUT */ | ||
53 | #define S5P_CLK_OUT_SHIFT (12) | ||
54 | #define S5P_CLK_OUT_MASK (0x1F << S5P_CLK_OUT_SHIFT) | ||
55 | #define S5P_CLK_OUT S5P_CLKREG(0x500) | ||
56 | |||
57 | #define S5P_CLK_DIV_STAT0 S5P_CLKREG(0x1000) | ||
58 | #define S5P_CLK_DIV_STAT1 S5P_CLKREG(0x1004) | ||
59 | |||
60 | #define S5P_CLK_MUX_STAT0 S5P_CLKREG(0x1100) | ||
61 | #define S5P_CLK_MUX_STAT1 S5P_CLKREG(0x1104) | ||
62 | |||
63 | #define S5P_MDNIE_SEL S5P_CLKREG(0x7008) | ||
64 | |||
65 | /* Register Bit definition */ | ||
66 | #define S5P_EPLL_EN (1<<31) | ||
67 | #define S5P_EPLL_MASK 0xffffffff | ||
68 | #define S5P_EPLLVAL(_m, _p, _s) ((_m) << 16 | ((_p) << 8) | ((_s))) | ||
69 | |||
70 | /* CLKDIV0 */ | ||
71 | #define S5P_CLKDIV0_APLL_SHIFT (0) | ||
72 | #define S5P_CLKDIV0_APLL_MASK (0x7 << S5P_CLKDIV0_APLL_SHIFT) | ||
73 | #define S5P_CLKDIV0_A2M_SHIFT (4) | ||
74 | #define S5P_CLKDIV0_A2M_MASK (0x7 << S5P_CLKDIV0_A2M_SHIFT) | ||
75 | #define S5P_CLKDIV0_D0CLK_SHIFT (16) | ||
76 | #define S5P_CLKDIV0_D0CLK_MASK (0xF << S5P_CLKDIV0_D0CLK_SHIFT) | ||
77 | #define S5P_CLKDIV0_P0CLK_SHIFT (20) | ||
78 | #define S5P_CLKDIV0_P0CLK_MASK (0x7 << S5P_CLKDIV0_P0CLK_SHIFT) | ||
79 | #define S5P_CLKDIV0_D1CLK_SHIFT (24) | ||
80 | #define S5P_CLKDIV0_D1CLK_MASK (0xF << S5P_CLKDIV0_D1CLK_SHIFT) | ||
81 | #define S5P_CLKDIV0_P1CLK_SHIFT (28) | ||
82 | #define S5P_CLKDIV0_P1CLK_MASK (0x7 << S5P_CLKDIV0_P1CLK_SHIFT) | ||
83 | |||
84 | /* Clock MUX status Registers */ | ||
85 | #define S5P_CLK_MUX_STAT0_APLL_SHIFT (0) | ||
86 | #define S5P_CLK_MUX_STAT0_APLL_MASK (0x7 << S5P_CLK_MUX_STAT0_APLL_SHIFT) | ||
87 | #define S5P_CLK_MUX_STAT0_MPLL_SHIFT (4) | ||
88 | #define S5P_CLK_MUX_STAT0_MPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_MPLL_SHIFT) | ||
89 | #define S5P_CLK_MUX_STAT0_EPLL_SHIFT (8) | ||
90 | #define S5P_CLK_MUX_STAT0_EPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_EPLL_SHIFT) | ||
91 | #define S5P_CLK_MUX_STAT0_VPLL_SHIFT (12) | ||
92 | #define S5P_CLK_MUX_STAT0_VPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_VPLL_SHIFT) | ||
93 | #define S5P_CLK_MUX_STAT0_MUXARM_SHIFT (16) | ||
94 | #define S5P_CLK_MUX_STAT0_MUXARM_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXARM_SHIFT) | ||
95 | #define S5P_CLK_MUX_STAT0_MUXD0_SHIFT (20) | ||
96 | #define S5P_CLK_MUX_STAT0_MUXD0_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXD0_SHIFT) | ||
97 | #define S5P_CLK_MUX_STAT0_MUXD1_SHIFT (24) | ||
98 | #define S5P_CLK_MUX_STAT0_MUXD1_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXD1_SHIFT) | ||
99 | #define S5P_CLK_MUX_STAT1_D1SYNC_SHIFT (24) | ||
100 | #define S5P_CLK_MUX_STAT1_D1SYNC_MASK (0x7 << S5P_CLK_MUX_STAT1_D1SYNC_SHIFT) | ||
101 | #define S5P_CLK_MUX_STAT1_D0SYNC_SHIFT (28) | ||
102 | #define S5P_CLK_MUX_STAT1_D0SYNC_MASK (0x7 << S5P_CLK_MUX_STAT1_D0SYNC_SHIFT) | ||
103 | |||
104 | #endif /* __ASM_ARCH_REGS_CLOCK_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-irq.h b/arch/arm/mach-s5p6442/include/mach/regs-irq.h deleted file mode 100644 index 73782b52a83b..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/regs-irq.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/regs-irq.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - IRQ register definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_IRQ_H | ||
14 | #define __ASM_ARCH_REGS_IRQ_H __FILE__ | ||
15 | |||
16 | #include <asm/hardware/vic.h> | ||
17 | #include <mach/map.h> | ||
18 | |||
19 | #endif /* __ASM_ARCH_REGS_IRQ_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/spi-clocks.h b/arch/arm/mach-s5p6442/include/mach/spi-clocks.h deleted file mode 100644 index 7fd88205a97c..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/spi-clocks.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/spi-clocks.h | ||
2 | * | ||
3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __S5P6442_PLAT_SPI_CLKS_H | ||
12 | #define __S5P6442_PLAT_SPI_CLKS_H __FILE__ | ||
13 | |||
14 | #define S5P6442_SPI_SRCCLK_PCLK 0 | ||
15 | #define S5P6442_SPI_SRCCLK_SCLK 1 | ||
16 | |||
17 | #endif /* __S5P6442_PLAT_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/system.h b/arch/arm/mach-s5p6442/include/mach/system.h deleted file mode 100644 index c30c1cc1b97e..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/system.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - system support header | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | ||
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
15 | |||
16 | #include <plat/system-reset.h> | ||
17 | |||
18 | static void arch_idle(void) | ||
19 | { | ||
20 | /* nothing here yet */ | ||
21 | } | ||
22 | |||
23 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/tick.h b/arch/arm/mach-s5p6442/include/mach/tick.h deleted file mode 100644 index e1d4cabf8297..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/tick.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/tick.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Based on arch/arm/mach-s3c6400/include/mach/tick.h | ||
7 | * | ||
8 | * S5P6442 - Timer tick support definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifndef __ASM_ARCH_TICK_H | ||
16 | #define __ASM_ARCH_TICK_H __FILE__ | ||
17 | |||
18 | static inline u32 s3c24xx_ostimer_pending(void) | ||
19 | { | ||
20 | u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); | ||
21 | return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); | ||
22 | } | ||
23 | |||
24 | #define TICK_MAX (0xffffffff) | ||
25 | |||
26 | #endif /* __ASM_ARCH_TICK_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/timex.h b/arch/arm/mach-s5p6442/include/mach/timex.h deleted file mode 100644 index ff8f2fcadeb7..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/timex.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* arch/arm/mach-s5p6442/include/mach/timex.h | ||
2 | * | ||
3 | * Copyright (c) 2003-2010 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S5P6442 - time parameters | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_TIMEX_H | ||
14 | #define __ASM_ARCH_TIMEX_H | ||
15 | |||
16 | /* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it | ||
17 | * a variable is useless. It seems as long as we make our timers an | ||
18 | * exact multiple of HZ, any value that makes a 1->1 correspondence | ||
19 | * for the time conversion functions to/from jiffies is acceptable. | ||
20 | */ | ||
21 | |||
22 | #define CLOCK_TICK_RATE 12000000 | ||
23 | |||
24 | #endif /* __ASM_ARCH_TIMEX_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/uncompress.h b/arch/arm/mach-s5p6442/include/mach/uncompress.h deleted file mode 100644 index 5ac7cbeeb987..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/uncompress.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/include/mach/uncompress.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P6442 - uncompress code | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_UNCOMPRESS_H | ||
14 | #define __ASM_ARCH_UNCOMPRESS_H | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | #include <plat/uncompress.h> | ||
18 | |||
19 | static void arch_detect_cpu(void) | ||
20 | { | ||
21 | /* we do not need to do any cpu detection here at the moment. */ | ||
22 | } | ||
23 | |||
24 | #endif /* __ASM_ARCH_UNCOMPRESS_H */ | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/vmalloc.h b/arch/arm/mach-s5p6442/include/mach/vmalloc.h deleted file mode 100644 index 4aa55e55ac47..000000000000 --- a/arch/arm/mach-s5p6442/include/mach/vmalloc.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* arch/arm/mach-s5p6442/include/mach/vmalloc.h | ||
2 | * | ||
3 | * Copyright 2010 Ben Dooks <ben-linux@fluff.org> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | * S5P6442 vmalloc definition | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_ARCH_VMALLOC_H | ||
13 | #define __ASM_ARCH_VMALLOC_H | ||
14 | |||
15 | #define VMALLOC_END 0xF6000000UL | ||
16 | |||
17 | #endif /* __ASM_ARCH_VMALLOC_H */ | ||
diff --git a/arch/arm/mach-s5p6442/init.c b/arch/arm/mach-s5p6442/init.c deleted file mode 100644 index 1874bdb71e1d..000000000000 --- a/arch/arm/mach-s5p6442/init.c +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/s5p6442-init.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/types.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/serial_core.h> | ||
15 | |||
16 | #include <plat/cpu.h> | ||
17 | #include <plat/devs.h> | ||
18 | #include <plat/s5p6442.h> | ||
19 | #include <plat/regs-serial.h> | ||
20 | |||
21 | static struct s3c24xx_uart_clksrc s5p6442_serial_clocks[] = { | ||
22 | [0] = { | ||
23 | .name = "pclk", | ||
24 | .divisor = 1, | ||
25 | .min_baud = 0, | ||
26 | .max_baud = 0, | ||
27 | }, | ||
28 | }; | ||
29 | |||
30 | /* uart registration process */ | ||
31 | void __init s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) | ||
32 | { | ||
33 | struct s3c2410_uartcfg *tcfg = cfg; | ||
34 | u32 ucnt; | ||
35 | |||
36 | for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { | ||
37 | if (!tcfg->clocks) { | ||
38 | tcfg->clocks = s5p6442_serial_clocks; | ||
39 | tcfg->clocks_size = ARRAY_SIZE(s5p6442_serial_clocks); | ||
40 | } | ||
41 | } | ||
42 | |||
43 | s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); | ||
44 | } | ||
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c deleted file mode 100644 index eaf6b9c489ff..000000000000 --- a/arch/arm/mach-s5p6442/mach-smdk6442.c +++ /dev/null | |||
@@ -1,102 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/mach-smdk6442.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/types.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/serial_core.h> | ||
15 | #include <linux/i2c.h> | ||
16 | |||
17 | #include <asm/mach/arch.h> | ||
18 | #include <asm/mach/map.h> | ||
19 | #include <asm/setup.h> | ||
20 | #include <asm/mach-types.h> | ||
21 | |||
22 | #include <mach/map.h> | ||
23 | #include <mach/regs-clock.h> | ||
24 | |||
25 | #include <plat/regs-serial.h> | ||
26 | #include <plat/s5p6442.h> | ||
27 | #include <plat/devs.h> | ||
28 | #include <plat/cpu.h> | ||
29 | #include <plat/iic.h> | ||
30 | |||
31 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
32 | #define SMDK6442_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
33 | S3C2410_UCON_RXILEVEL | \ | ||
34 | S3C2410_UCON_TXIRQMODE | \ | ||
35 | S3C2410_UCON_RXIRQMODE | \ | ||
36 | S3C2410_UCON_RXFIFO_TOI | \ | ||
37 | S3C2443_UCON_RXERR_IRQEN) | ||
38 | |||
39 | #define SMDK6442_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
40 | |||
41 | #define SMDK6442_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
42 | S5PV210_UFCON_TXTRIG4 | \ | ||
43 | S5PV210_UFCON_RXTRIG4) | ||
44 | |||
45 | static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = { | ||
46 | [0] = { | ||
47 | .hwport = 0, | ||
48 | .flags = 0, | ||
49 | .ucon = SMDK6442_UCON_DEFAULT, | ||
50 | .ulcon = SMDK6442_ULCON_DEFAULT, | ||
51 | .ufcon = SMDK6442_UFCON_DEFAULT, | ||
52 | }, | ||
53 | [1] = { | ||
54 | .hwport = 1, | ||
55 | .flags = 0, | ||
56 | .ucon = SMDK6442_UCON_DEFAULT, | ||
57 | .ulcon = SMDK6442_ULCON_DEFAULT, | ||
58 | .ufcon = SMDK6442_UFCON_DEFAULT, | ||
59 | }, | ||
60 | [2] = { | ||
61 | .hwport = 2, | ||
62 | .flags = 0, | ||
63 | .ucon = SMDK6442_UCON_DEFAULT, | ||
64 | .ulcon = SMDK6442_ULCON_DEFAULT, | ||
65 | .ufcon = SMDK6442_UFCON_DEFAULT, | ||
66 | }, | ||
67 | }; | ||
68 | |||
69 | static struct platform_device *smdk6442_devices[] __initdata = { | ||
70 | &s3c_device_i2c0, | ||
71 | &samsung_asoc_dma, | ||
72 | &s5p6442_device_iis0, | ||
73 | &s3c_device_wdt, | ||
74 | }; | ||
75 | |||
76 | static struct i2c_board_info smdk6442_i2c_devs0[] __initdata = { | ||
77 | { I2C_BOARD_INFO("wm8580", 0x1b), }, | ||
78 | }; | ||
79 | |||
80 | static void __init smdk6442_map_io(void) | ||
81 | { | ||
82 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
83 | s3c24xx_init_clocks(12000000); | ||
84 | s3c24xx_init_uarts(smdk6442_uartcfgs, ARRAY_SIZE(smdk6442_uartcfgs)); | ||
85 | } | ||
86 | |||
87 | static void __init smdk6442_machine_init(void) | ||
88 | { | ||
89 | s3c_i2c0_set_platdata(NULL); | ||
90 | i2c_register_board_info(0, smdk6442_i2c_devs0, | ||
91 | ARRAY_SIZE(smdk6442_i2c_devs0)); | ||
92 | platform_add_devices(smdk6442_devices, ARRAY_SIZE(smdk6442_devices)); | ||
93 | } | ||
94 | |||
95 | MACHINE_START(SMDK6442, "SMDK6442") | ||
96 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ | ||
97 | .boot_params = S5P_PA_SDRAM + 0x100, | ||
98 | .init_irq = s5p6442_init_irq, | ||
99 | .map_io = smdk6442_map_io, | ||
100 | .init_machine = smdk6442_machine_init, | ||
101 | .timer = &s3c24xx_timer, | ||
102 | MACHINE_END | ||
diff --git a/arch/arm/mach-s5p6442/setup-i2c0.c b/arch/arm/mach-s5p6442/setup-i2c0.c deleted file mode 100644 index aad85656b0cc..000000000000 --- a/arch/arm/mach-s5p6442/setup-i2c0.c +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p6442/setup-i2c0.c | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * I2C0 GPIO configuration. | ||
7 | * | ||
8 | * Based on plat-s3c64xx/setup-i2c0.c | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/types.h> | ||
17 | #include <linux/gpio.h> | ||
18 | |||
19 | struct platform_device; /* don't need the contents */ | ||
20 | |||
21 | #include <plat/gpio-cfg.h> | ||
22 | #include <plat/iic.h> | ||
23 | |||
24 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) | ||
25 | { | ||
26 | s3c_gpio_cfgall_range(S5P6442_GPD1(0), 2, | ||
27 | S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); | ||
28 | } | ||