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-rw-r--r--arch/arm/mach-s3c64xx/dma.c1
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/dma.h57
2 files changed, 57 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index 0e0edf75e8ed..b62bdf18dca4 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -27,7 +27,6 @@
27#include <mach/map.h> 27#include <mach/map.h>
28#include <mach/irqs.h> 28#include <mach/irqs.h>
29 29
30#include <plat/dma-plat.h>
31#include <mach/regs-sys.h> 30#include <mach/regs-sys.h>
32 31
33#include <asm/hardware/pl080.h> 32#include <asm/hardware/pl080.h>
diff --git a/arch/arm/mach-s3c64xx/include/mach/dma.h b/arch/arm/mach-s3c64xx/include/mach/dma.h
index 6723860748be..0a5d9268a23e 100644
--- a/arch/arm/mach-s3c64xx/include/mach/dma.h
+++ b/arch/arm/mach-s3c64xx/include/mach/dma.h
@@ -67,4 +67,61 @@ static __inline__ bool s3c_dma_has_circular(void)
67 67
68#include <plat/dma.h> 68#include <plat/dma.h>
69 69
70#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */
71
72struct s3c64xx_dma_buff;
73
74/** s3c64xx_dma_buff - S3C64XX DMA buffer descriptor
75 * @next: Pointer to next buffer in queue or ring.
76 * @pw: Client provided identifier
77 * @lli: Pointer to hardware descriptor this buffer is associated with.
78 * @lli_dma: Hardare address of the descriptor.
79 */
80struct s3c64xx_dma_buff {
81 struct s3c64xx_dma_buff *next;
82
83 void *pw;
84 struct pl080s_lli *lli;
85 dma_addr_t lli_dma;
86};
87
88struct s3c64xx_dmac;
89
90struct s3c2410_dma_chan {
91 unsigned char number; /* number of this dma channel */
92 unsigned char in_use; /* channel allocated */
93 unsigned char bit; /* bit for enable/disable/etc */
94 unsigned char hw_width;
95 unsigned char peripheral;
96
97 unsigned int flags;
98 enum s3c2410_dmasrc source;
99
100
101 dma_addr_t dev_addr;
102
103 struct s3c2410_dma_client *client;
104 struct s3c64xx_dmac *dmac; /* pointer to controller */
105
106 void __iomem *regs;
107
108 /* cdriver callbacks */
109 s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */
110 s3c2410_dma_opfn_t op_fn; /* channel op callback */
111
112 /* buffer list and information */
113 struct s3c64xx_dma_buff *curr; /* current dma buffer */
114 struct s3c64xx_dma_buff *next; /* next buffer to load */
115 struct s3c64xx_dma_buff *end; /* end of queue */
116
117 /* note, when channel is running in circular mode, curr is the
118 * first buffer enqueued, end is the last and curr is where the
119 * last buffer-done event is set-at. The buffers are not freed
120 * and the last buffer hardware descriptor points back to the
121 * first.
122 */
123};
124
125#include <plat/dma-core.h>
126
70#endif /* __ASM_ARCH_IRQ_H */ 127#endif /* __ASM_ARCH_IRQ_H */