aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s3c64xx/s3c6410.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-s3c64xx/s3c6410.c')
-rw-r--r--arch/arm/mach-s3c64xx/s3c6410.c91
1 files changed, 91 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c
new file mode 100644
index 000000000000..59635d19466a
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/s3c6410.c
@@ -0,0 +1,91 @@
1/* linux/arch/arm/mach-s3c64xx/s3c6410.c
2 *
3 * Copyright 2008 Simtec Electronics
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
19#include <linux/clk.h>
20#include <linux/io.h>
21#include <linux/sysdev.h>
22#include <linux/serial_core.h>
23#include <linux/platform_device.h>
24
25#include <asm/mach/arch.h>
26#include <asm/mach/map.h>
27#include <asm/mach/irq.h>
28
29#include <mach/hardware.h>
30#include <asm/irq.h>
31
32#include <plat/cpu-freq.h>
33#include <plat/regs-serial.h>
34#include <mach/regs-clock.h>
35
36#include <plat/cpu.h>
37#include <plat/devs.h>
38#include <plat/clock.h>
39#include <plat/sdhci.h>
40#include <plat/iic-core.h>
41#include <mach/s3c6400.h>
42#include <mach/s3c6410.h>
43
44void __init s3c6410_map_io(void)
45{
46 /* initialise device information early */
47 s3c6410_default_sdhci0();
48 s3c6410_default_sdhci1();
49 s3c6410_default_sdhci2();
50
51 /* the i2c devices are directly compatible with s3c2440 */
52 s3c_i2c0_setname("s3c2440-i2c");
53 s3c_i2c1_setname("s3c2440-i2c");
54
55 s3c_device_nand.name = "s3c6400-nand";
56}
57
58void __init s3c6410_init_clocks(int xtal)
59{
60 printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
61 s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK);
62 s3c6400_setup_clocks();
63}
64
65void __init s3c6410_init_irq(void)
66{
67 /* VIC0 is missing IRQ7, VIC1 is fully populated. */
68 s3c64xx_init_irq(~0 & ~(1 << 7), ~0);
69}
70
71struct sysdev_class s3c6410_sysclass = {
72 .name = "s3c6410-core",
73};
74
75static struct sys_device s3c6410_sysdev = {
76 .cls = &s3c6410_sysclass,
77};
78
79static int __init s3c6410_core_init(void)
80{
81 return sysdev_class_register(&s3c6410_sysclass);
82}
83
84core_initcall(s3c6410_core_init);
85
86int __init s3c6410_init(void)
87{
88 printk("S3C6410: Initialising architecture\n");
89
90 return sysdev_register(&s3c6410_sysdev);
91}