diff options
Diffstat (limited to 'arch/arm/mach-s3c64xx/clock.c')
-rw-r--r-- | arch/arm/mach-s3c64xx/clock.c | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index fbd85a9b7bbf..7e03f0ae2fc8 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c | |||
@@ -133,6 +133,12 @@ static struct clk init_clocks_disable[] = { | |||
133 | .id = -1, | 133 | .id = -1, |
134 | .parent = &clk_h, | 134 | .parent = &clk_h, |
135 | }, { | 135 | }, { |
136 | .name = "rtc", | ||
137 | .id = -1, | ||
138 | .parent = &clk_p, | ||
139 | .enable = s3c64xx_pclk_ctrl, | ||
140 | .ctrlbit = S3C_CLKCON_PCLK_RTC, | ||
141 | }, { | ||
136 | .name = "adc", | 142 | .name = "adc", |
137 | .id = -1, | 143 | .id = -1, |
138 | .parent = &clk_p, | 144 | .parent = &clk_p, |
@@ -165,6 +171,12 @@ static struct clk init_clocks_disable[] = { | |||
165 | .ctrlbit = S3C6410_CLKCON_PCLK_IIS2, | 171 | .ctrlbit = S3C6410_CLKCON_PCLK_IIS2, |
166 | }, { | 172 | }, { |
167 | #endif | 173 | #endif |
174 | .name = "keypad", | ||
175 | .id = -1, | ||
176 | .parent = &clk_p, | ||
177 | .enable = s3c64xx_pclk_ctrl, | ||
178 | .ctrlbit = S3C_CLKCON_PCLK_KEYPAD, | ||
179 | }, { | ||
168 | .name = "spi", | 180 | .name = "spi", |
169 | .id = 0, | 181 | .id = 0, |
170 | .parent = &clk_p, | 182 | .parent = &clk_p, |
@@ -295,12 +307,6 @@ static struct clk init_clocks[] = { | |||
295 | .enable = s3c64xx_pclk_ctrl, | 307 | .enable = s3c64xx_pclk_ctrl, |
296 | .ctrlbit = S3C_CLKCON_PCLK_UART3, | 308 | .ctrlbit = S3C_CLKCON_PCLK_UART3, |
297 | }, { | 309 | }, { |
298 | .name = "rtc", | ||
299 | .id = -1, | ||
300 | .parent = &clk_p, | ||
301 | .enable = s3c64xx_pclk_ctrl, | ||
302 | .ctrlbit = S3C_CLKCON_PCLK_RTC, | ||
303 | }, { | ||
304 | .name = "watchdog", | 310 | .name = "watchdog", |
305 | .id = -1, | 311 | .id = -1, |
306 | .parent = &clk_p, | 312 | .parent = &clk_p, |
@@ -310,6 +316,12 @@ static struct clk init_clocks[] = { | |||
310 | .id = -1, | 316 | .id = -1, |
311 | .parent = &clk_p, | 317 | .parent = &clk_p, |
312 | .ctrlbit = S3C_CLKCON_PCLK_AC97, | 318 | .ctrlbit = S3C_CLKCON_PCLK_AC97, |
319 | }, { | ||
320 | .name = "cfcon", | ||
321 | .id = -1, | ||
322 | .parent = &clk_h, | ||
323 | .enable = s3c64xx_hclk_ctrl, | ||
324 | .ctrlbit = S3C_CLKCON_HCLK_IHOST, | ||
313 | } | 325 | } |
314 | }; | 326 | }; |
315 | 327 | ||