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-rw-r--r--arch/arm/mach-s3c6410/Kconfig34
-rw-r--r--arch/arm/mach-s3c6410/Makefile4
-rw-r--r--arch/arm/mach-s3c6410/mach-anw6410.c245
-rw-r--r--arch/arm/mach-s3c6410/mach-ncp.c107
-rw-r--r--arch/arm/mach-s3c6410/mach-smdk6410.c196
5 files changed, 586 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c6410/Kconfig b/arch/arm/mach-s3c6410/Kconfig
index 4f7ffc7ce859..9c163f365c80 100644
--- a/arch/arm/mach-s3c6410/Kconfig
+++ b/arch/arm/mach-s3c6410/Kconfig
@@ -20,6 +20,14 @@ config S3C6410_SETUP_SDHCI
20 help 20 help
21 Internal helper functions for S3C6410 based SDHCI systems 21 Internal helper functions for S3C6410 based SDHCI systems
22 22
23config MACH_ANW6410
24 bool "A&W6410"
25 select CPU_S3C6410
26 select S3C_DEV_FB
27 select S3C64XX_SETUP_FB_24BPP
28 help
29 Machine support for the A&W6410
30
23config MACH_SMDK6410 31config MACH_SMDK6410
24 bool "SMDK6410" 32 bool "SMDK6410"
25 select CPU_S3C6410 33 select CPU_S3C6410
@@ -62,3 +70,29 @@ config SMDK6410_SD_CH1
62 channels 0 and 1 are the same. 70 channels 0 and 1 are the same.
63 71
64endchoice 72endchoice
73
74config SMDK6410_WM1190_EV1
75 bool "Support Wolfson Microelectronics 1190-EV1 PMIC card"
76 depends on MACH_SMDK6410
77 select REGULATOR
78 select REGULATOR_WM8350
79 select MFD_WM8350_I2C
80 select MFD_WM8350_CONFIG_MODE_0
81 select MFD_WM8350_CONFIG_MODE_3
82 select MFD_WM8352_CONFIG_MODE_0
83 help
84 The Wolfson Microelectronics 1190-EV1 is a WM835x based PMIC
85 and audio daughtercard for the Samsung SMDK6410 reference
86 platform. Enabling this option will build support for this
87 module into the kernel. The presence of the module will be
88 detected at runtime so the the resulting kernel can be used
89 with or without the 1190-EV1 fitted.
90
91config MACH_NCP
92 bool "NCP"
93 select CPU_S3C6410
94 select S3C_DEV_I2C1
95 select S3C_DEV_HSMMC1
96 select S3C64XX_SETUP_I2C1
97 help
98 Machine support for the Samsung NCP
diff --git a/arch/arm/mach-s3c6410/Makefile b/arch/arm/mach-s3c6410/Makefile
index 2cd4f189036b..6f9deac88612 100644
--- a/arch/arm/mach-s3c6410/Makefile
+++ b/arch/arm/mach-s3c6410/Makefile
@@ -20,4 +20,8 @@ obj-$(CONFIG_S3C6410_SETUP_SDHCI) += setup-sdhci.o
20 20
21# machine support 21# machine support
22 22
23obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o
23obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o 24obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o
25obj-$(CONFIG_MACH_NCP) += mach-ncp.o
26
27
diff --git a/arch/arm/mach-s3c6410/mach-anw6410.c b/arch/arm/mach-s3c6410/mach-anw6410.c
new file mode 100644
index 000000000000..661cca63de25
--- /dev/null
+++ b/arch/arm/mach-s3c6410/mach-anw6410.c
@@ -0,0 +1,245 @@
1/* linux/arch/arm/mach-s3c6410/mach-anw6410.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 * Copyright 2009 Kwangwoo Lee
8 * Kwangwoo Lee <kwangwoo.lee@gmail.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14*/
15
16#include <linux/kernel.h>
17#include <linux/types.h>
18#include <linux/interrupt.h>
19#include <linux/list.h>
20#include <linux/timer.h>
21#include <linux/init.h>
22#include <linux/serial_core.h>
23#include <linux/platform_device.h>
24#include <linux/io.h>
25#include <linux/i2c.h>
26#include <linux/fb.h>
27#include <linux/gpio.h>
28#include <linux/delay.h>
29#include <linux/dm9000.h>
30
31#include <video/platform_lcd.h>
32
33#include <asm/mach/arch.h>
34#include <asm/mach/map.h>
35#include <asm/mach/irq.h>
36
37#include <mach/hardware.h>
38#include <mach/regs-fb.h>
39#include <mach/map.h>
40
41#include <asm/irq.h>
42#include <asm/mach-types.h>
43
44#include <plat/regs-serial.h>
45#include <plat/iic.h>
46#include <plat/fb.h>
47
48#include <plat/s3c6410.h>
49#include <plat/clock.h>
50#include <plat/devs.h>
51#include <plat/cpu.h>
52#include <plat/regs-gpio.h>
53#include <plat/regs-modem.h>
54
55/* DM9000 */
56#define ANW6410_PA_DM9000 (0x18000000)
57
58/* A hardware buffer to control external devices is mapped at 0x30000000.
59 * It can not be read. So current status must be kept in anw6410_extdev_status.
60 */
61#define ANW6410_VA_EXTDEV S3C_ADDR(0x02000000)
62#define ANW6410_PA_EXTDEV (0x30000000)
63
64#define ANW6410_EN_DM9000 (1<<11)
65#define ANW6410_EN_LCD (1<<14)
66
67static __u32 anw6410_extdev_status;
68
69static struct s3c2410_uartcfg anw6410_uartcfgs[] __initdata = {
70 [0] = {
71 .hwport = 0,
72 .flags = 0,
73 .ucon = 0x3c5,
74 .ulcon = 0x03,
75 .ufcon = 0x51,
76 },
77 [1] = {
78 .hwport = 1,
79 .flags = 0,
80 .ucon = 0x3c5,
81 .ulcon = 0x03,
82 .ufcon = 0x51,
83 },
84};
85
86/* framebuffer and LCD setup. */
87static void __init anw6410_lcd_mode_set(void)
88{
89 u32 tmp;
90
91 /* set the LCD type */
92 tmp = __raw_readl(S3C64XX_SPCON);
93 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
94 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
95 __raw_writel(tmp, S3C64XX_SPCON);
96
97 /* remove the LCD bypass */
98 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
99 tmp &= ~MIFPCON_LCD_BYPASS;
100 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
101}
102
103/* GPF1 = LCD panel power
104 * GPF4 = LCD backlight control
105 */
106static void anw6410_lcd_power_set(struct plat_lcd_data *pd,
107 unsigned int power)
108{
109 if (power) {
110 anw6410_extdev_status |= (ANW6410_EN_LCD << 16);
111 __raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV);
112
113 gpio_direction_output(S3C64XX_GPF(1), 1);
114 gpio_direction_output(S3C64XX_GPF(4), 1);
115 } else {
116 anw6410_extdev_status &= ~(ANW6410_EN_LCD << 16);
117 __raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV);
118
119 gpio_direction_output(S3C64XX_GPF(1), 0);
120 gpio_direction_output(S3C64XX_GPF(4), 0);
121 }
122}
123
124static struct plat_lcd_data anw6410_lcd_power_data = {
125 .set_power = anw6410_lcd_power_set,
126};
127
128static struct platform_device anw6410_lcd_powerdev = {
129 .name = "platform-lcd",
130 .dev.parent = &s3c_device_fb.dev,
131 .dev.platform_data = &anw6410_lcd_power_data,
132};
133
134static struct s3c_fb_pd_win anw6410_fb_win0 = {
135 /* this is to ensure we use win0 */
136 .win_mode = {
137 .pixclock = 41094,
138 .left_margin = 8,
139 .right_margin = 13,
140 .upper_margin = 7,
141 .lower_margin = 5,
142 .hsync_len = 3,
143 .vsync_len = 1,
144 .xres = 800,
145 .yres = 480,
146 },
147 .max_bpp = 32,
148 .default_bpp = 16,
149};
150
151/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
152static struct s3c_fb_platdata anw6410_lcd_pdata __initdata = {
153 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
154 .win[0] = &anw6410_fb_win0,
155 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
156 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
157};
158
159/* DM9000AEP 10/100 ethernet controller */
160static void __init anw6410_dm9000_enable(void)
161{
162 anw6410_extdev_status |= (ANW6410_EN_DM9000 << 16);
163 __raw_writel(anw6410_extdev_status, ANW6410_VA_EXTDEV);
164}
165
166static struct resource anw6410_dm9000_resource[] = {
167 [0] = {
168 .start = ANW6410_PA_DM9000,
169 .end = ANW6410_PA_DM9000 + 3,
170 .flags = IORESOURCE_MEM,
171 },
172 [1] = {
173 .start = ANW6410_PA_DM9000 + 4,
174 .end = ANW6410_PA_DM9000 + 4 + 500,
175 .flags = IORESOURCE_MEM,
176 },
177 [2] = {
178 .start = IRQ_EINT(15),
179 .end = IRQ_EINT(15),
180 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
181 },
182};
183
184static struct dm9000_plat_data anw6410_dm9000_pdata = {
185 .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
186 /* dev_addr can be set to provide hwaddr. */
187};
188
189static struct platform_device anw6410_device_eth = {
190 .name = "dm9000",
191 .id = -1,
192 .num_resources = ARRAY_SIZE(anw6410_dm9000_resource),
193 .resource = anw6410_dm9000_resource,
194 .dev = {
195 .platform_data = &anw6410_dm9000_pdata,
196 },
197};
198
199static struct map_desc anw6410_iodesc[] __initdata = {
200 {
201 .virtual = (unsigned long)ANW6410_VA_EXTDEV,
202 .pfn = __phys_to_pfn(ANW6410_PA_EXTDEV),
203 .length = SZ_64K,
204 .type = MT_DEVICE,
205 },
206};
207
208static struct platform_device *anw6410_devices[] __initdata = {
209 &s3c_device_fb,
210 &anw6410_lcd_powerdev,
211 &anw6410_device_eth,
212};
213
214static void __init anw6410_map_io(void)
215{
216 s3c64xx_init_io(anw6410_iodesc, ARRAY_SIZE(anw6410_iodesc));
217 s3c24xx_init_clocks(12000000);
218 s3c24xx_init_uarts(anw6410_uartcfgs, ARRAY_SIZE(anw6410_uartcfgs));
219
220 anw6410_lcd_mode_set();
221}
222
223static void __init anw6410_machine_init(void)
224{
225 s3c_fb_set_platdata(&anw6410_lcd_pdata);
226
227 gpio_request(S3C64XX_GPF(1), "panel power");
228 gpio_request(S3C64XX_GPF(4), "LCD backlight");
229
230 anw6410_dm9000_enable();
231
232 platform_add_devices(anw6410_devices, ARRAY_SIZE(anw6410_devices));
233}
234
235MACHINE_START(ANW6410, "A&W6410")
236 /* Maintainer: Kwangwoo Lee <kwangwoo.lee@gmail.com> */
237 .phys_io = S3C_PA_UART & 0xfff00000,
238 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
239 .boot_params = S3C64XX_PA_SDRAM + 0x100,
240
241 .init_irq = s3c6410_init_irq,
242 .map_io = anw6410_map_io,
243 .init_machine = anw6410_machine_init,
244 .timer = &s3c24xx_timer,
245MACHINE_END
diff --git a/arch/arm/mach-s3c6410/mach-ncp.c b/arch/arm/mach-s3c6410/mach-ncp.c
new file mode 100644
index 000000000000..6030636f8548
--- /dev/null
+++ b/arch/arm/mach-s3c6410/mach-ncp.c
@@ -0,0 +1,107 @@
1/*
2 * linux/arch/arm/mach-s3c6410/mach-ncp.c
3 *
4 * Copyright (C) 2008-2009 Samsung Electronics
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/interrupt.h>
15#include <linux/list.h>
16#include <linux/timer.h>
17#include <linux/init.h>
18#include <linux/serial_core.h>
19#include <linux/platform_device.h>
20#include <linux/io.h>
21#include <linux/i2c.h>
22#include <linux/fb.h>
23#include <linux/gpio.h>
24#include <linux/delay.h>
25
26#include <video/platform_lcd.h>
27
28#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30#include <asm/mach/irq.h>
31
32#include <mach/hardware.h>
33#include <mach/regs-fb.h>
34#include <mach/map.h>
35
36#include <asm/irq.h>
37#include <asm/mach-types.h>
38
39#include <plat/regs-serial.h>
40#include <plat/iic.h>
41#include <plat/fb.h>
42
43#include <plat/s3c6410.h>
44#include <plat/clock.h>
45#include <plat/devs.h>
46#include <plat/cpu.h>
47
48#define UCON S3C2410_UCON_DEFAULT
49#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
50#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
51
52static struct s3c2410_uartcfg ncp_uartcfgs[] __initdata = {
53 /* REVISIT: NCP uses only serial 1, 2 */
54 [0] = {
55 .hwport = 0,
56 .flags = 0,
57 .ucon = UCON,
58 .ulcon = ULCON,
59 .ufcon = UFCON,
60 },
61 [1] = {
62 .hwport = 1,
63 .flags = 0,
64 .ucon = UCON,
65 .ulcon = ULCON,
66 .ufcon = UFCON,
67 },
68 [2] = {
69 .hwport = 2,
70 .flags = 0,
71 .ucon = UCON,
72 .ulcon = ULCON,
73 .ufcon = UFCON,
74 },
75};
76
77static struct platform_device *ncp_devices[] __initdata = {
78 &s3c_device_hsmmc1,
79 &s3c_device_i2c0,
80};
81
82struct map_desc ncp_iodesc[] = {};
83
84static void __init ncp_map_io(void)
85{
86 s3c64xx_init_io(ncp_iodesc, ARRAY_SIZE(ncp_iodesc));
87 s3c24xx_init_clocks(12000000);
88 s3c24xx_init_uarts(ncp_uartcfgs, ARRAY_SIZE(ncp_uartcfgs));
89}
90
91static void __init ncp_machine_init(void)
92{
93 s3c_i2c0_set_platdata(NULL);
94
95 platform_add_devices(ncp_devices, ARRAY_SIZE(ncp_devices));
96}
97
98MACHINE_START(NCP, "NCP")
99 /* Maintainer: Samsung Electronics */
100 .phys_io = S3C_PA_UART & 0xfff00000,
101 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
102 .boot_params = S3C64XX_PA_SDRAM + 0x100,
103 .init_irq = s3c6410_init_irq,
104 .map_io = ncp_map_io,
105 .init_machine = ncp_machine_init,
106 .timer = &s3c24xx_timer,
107MACHINE_END
diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c6410/mach-smdk6410.c
index 678b728fee12..8fd7632735df 100644
--- a/arch/arm/mach-s3c6410/mach-smdk6410.c
+++ b/arch/arm/mach-s3c6410/mach-smdk6410.c
@@ -24,6 +24,12 @@
24#include <linux/fb.h> 24#include <linux/fb.h>
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/delay.h> 26#include <linux/delay.h>
27#include <linux/smsc911x.h>
28
29#ifdef CONFIG_SMDK6410_WM1190_EV1
30#include <linux/mfd/wm8350/core.h>
31#include <linux/mfd/wm8350/pmic.h>
32#endif
27 33
28#include <video/platform_lcd.h> 34#include <video/platform_lcd.h>
29 35
@@ -39,8 +45,12 @@
39#include <asm/mach-types.h> 45#include <asm/mach-types.h>
40 46
41#include <plat/regs-serial.h> 47#include <plat/regs-serial.h>
48#include <plat/regs-modem.h>
49#include <plat/regs-gpio.h>
50#include <plat/regs-sys.h>
42#include <plat/iic.h> 51#include <plat/iic.h>
43#include <plat/fb.h> 52#include <plat/fb.h>
53#include <plat/gpio-cfg.h>
44 54
45#include <plat/s3c6410.h> 55#include <plat/s3c6410.h>
46#include <plat/clock.h> 56#include <plat/clock.h>
@@ -129,6 +139,37 @@ static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
129 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, 139 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
130}; 140};
131 141
142static struct resource smdk6410_smsc911x_resources[] = {
143 [0] = {
144 .start = 0x18000000,
145 .end = 0x18000000 + SZ_64K - 1,
146 .flags = IORESOURCE_MEM,
147 },
148 [1] = {
149 .start = S3C_EINT(10),
150 .end = S3C_EINT(10),
151 .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
152 },
153};
154
155static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
156 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
157 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
158 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
159 .phy_interface = PHY_INTERFACE_MODE_MII,
160};
161
162
163static struct platform_device smdk6410_smsc911x = {
164 .name = "smsc911x",
165 .id = -1,
166 .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
167 .resource = &smdk6410_smsc911x_resources[0],
168 .dev = {
169 .platform_data = &smdk6410_smsc911x_pdata,
170 },
171};
172
132static struct map_desc smdk6410_iodesc[] = {}; 173static struct map_desc smdk6410_iodesc[] = {};
133 174
134static struct platform_device *smdk6410_devices[] __initdata = { 175static struct platform_device *smdk6410_devices[] __initdata = {
@@ -143,11 +184,152 @@ static struct platform_device *smdk6410_devices[] __initdata = {
143 &s3c_device_fb, 184 &s3c_device_fb,
144 &s3c_device_usb, 185 &s3c_device_usb,
145 &smdk6410_lcd_powerdev, 186 &smdk6410_lcd_powerdev,
187
188 &smdk6410_smsc911x,
189};
190
191#ifdef CONFIG_SMDK6410_WM1190_EV1
192/* S3C64xx internal logic & PLL */
193static struct regulator_init_data wm8350_dcdc1_data = {
194 .constraints = {
195 .name = "PVDD_INT/PVDD_PLL",
196 .min_uV = 1200000,
197 .max_uV = 1200000,
198 .always_on = 1,
199 .apply_uV = 1,
200 },
201};
202
203/* Memory */
204static struct regulator_init_data wm8350_dcdc3_data = {
205 .constraints = {
206 .name = "PVDD_MEM",
207 .min_uV = 1800000,
208 .max_uV = 1800000,
209 .always_on = 1,
210 .state_mem = {
211 .uV = 1800000,
212 .mode = REGULATOR_MODE_NORMAL,
213 .enabled = 1,
214 },
215 .initial_state = PM_SUSPEND_MEM,
216 },
217};
218
219/* USB, EXT, PCM, ADC/DAC, USB, MMC */
220static struct regulator_init_data wm8350_dcdc4_data = {
221 .constraints = {
222 .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
223 .min_uV = 3000000,
224 .max_uV = 3000000,
225 .always_on = 1,
226 },
227};
228
229/* ARM core */
230static struct regulator_consumer_supply dcdc6_consumers[] = {
231 {
232 .supply = "vddarm",
233 }
234};
235
236static struct regulator_init_data wm8350_dcdc6_data = {
237 .constraints = {
238 .name = "PVDD_ARM",
239 .min_uV = 1000000,
240 .max_uV = 1300000,
241 .always_on = 1,
242 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
243 },
244 .num_consumer_supplies = ARRAY_SIZE(dcdc6_consumers),
245 .consumer_supplies = dcdc6_consumers,
146}; 246};
147 247
248/* Alive */
249static struct regulator_init_data wm8350_ldo1_data = {
250 .constraints = {
251 .name = "PVDD_ALIVE",
252 .min_uV = 1200000,
253 .max_uV = 1200000,
254 .always_on = 1,
255 .apply_uV = 1,
256 },
257};
258
259/* OTG */
260static struct regulator_init_data wm8350_ldo2_data = {
261 .constraints = {
262 .name = "PVDD_OTG",
263 .min_uV = 3300000,
264 .max_uV = 3300000,
265 .always_on = 1,
266 },
267};
268
269/* LCD */
270static struct regulator_init_data wm8350_ldo3_data = {
271 .constraints = {
272 .name = "PVDD_LCD",
273 .min_uV = 3000000,
274 .max_uV = 3000000,
275 .always_on = 1,
276 },
277};
278
279/* OTGi/1190-EV1 HPVDD & AVDD */
280static struct regulator_init_data wm8350_ldo4_data = {
281 .constraints = {
282 .name = "PVDD_OTGI/HPVDD/AVDD",
283 .min_uV = 1200000,
284 .max_uV = 1200000,
285 .apply_uV = 1,
286 .always_on = 1,
287 },
288};
289
290static struct {
291 int regulator;
292 struct regulator_init_data *initdata;
293} wm1190_regulators[] = {
294 { WM8350_DCDC_1, &wm8350_dcdc1_data },
295 { WM8350_DCDC_3, &wm8350_dcdc3_data },
296 { WM8350_DCDC_4, &wm8350_dcdc4_data },
297 { WM8350_DCDC_6, &wm8350_dcdc6_data },
298 { WM8350_LDO_1, &wm8350_ldo1_data },
299 { WM8350_LDO_2, &wm8350_ldo2_data },
300 { WM8350_LDO_3, &wm8350_ldo3_data },
301 { WM8350_LDO_4, &wm8350_ldo4_data },
302};
303
304static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
305{
306 int i;
307
308 /* Instantiate the regulators */
309 for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
310 wm8350_register_regulator(wm8350,
311 wm1190_regulators[i].regulator,
312 wm1190_regulators[i].initdata);
313
314 return 0;
315}
316
317static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
318 .init = smdk6410_wm8350_init,
319 .irq_high = 1,
320};
321#endif
322
148static struct i2c_board_info i2c_devs0[] __initdata = { 323static struct i2c_board_info i2c_devs0[] __initdata = {
149 { I2C_BOARD_INFO("24c08", 0x50), }, 324 { I2C_BOARD_INFO("24c08", 0x50), },
150 { I2C_BOARD_INFO("wm8580", 0x1b), }, 325 { I2C_BOARD_INFO("wm8580", 0x1b), },
326
327#ifdef CONFIG_SMDK6410_WM1190_EV1
328 { I2C_BOARD_INFO("wm8350", 0x1a),
329 .platform_data = &smdk6410_wm8350_pdata,
330 .irq = S3C_EINT(12),
331 },
332#endif
151}; 333};
152 334
153static struct i2c_board_info i2c_devs1[] __initdata = { 335static struct i2c_board_info i2c_devs1[] __initdata = {
@@ -156,9 +338,23 @@ static struct i2c_board_info i2c_devs1[] __initdata = {
156 338
157static void __init smdk6410_map_io(void) 339static void __init smdk6410_map_io(void)
158{ 340{
341 u32 tmp;
342
159 s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc)); 343 s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
160 s3c24xx_init_clocks(12000000); 344 s3c24xx_init_clocks(12000000);
161 s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs)); 345 s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
346
347 /* set the LCD type */
348
349 tmp = __raw_readl(S3C64XX_SPCON);
350 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
351 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
352 __raw_writel(tmp, S3C64XX_SPCON);
353
354 /* remove the lcd bypass */
355 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
356 tmp &= ~MIFPCON_LCD_BYPASS;
357 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
162} 358}
163 359
164static void __init smdk6410_machine_init(void) 360static void __init smdk6410_machine_init(void)
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-07 22:22:25 -0500