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-rw-r--r--arch/arm/mach-s3c6400/Kconfig30
-rw-r--r--arch/arm/mach-s3c6400/Makefile23
-rw-r--r--arch/arm/mach-s3c6400/Makefile.boot2
-rw-r--r--arch/arm/mach-s3c6400/include/mach/debug-macro.S39
-rw-r--r--arch/arm/mach-s3c6400/include/mach/dma.h70
-rw-r--r--arch/arm/mach-s3c6400/include/mach/entry-macro.S18
-rw-r--r--arch/arm/mach-s3c6400/include/mach/gpio.h96
-rw-r--r--arch/arm/mach-s3c6400/include/mach/hardware.h16
-rw-r--r--arch/arm/mach-s3c6400/include/mach/irqs.h16
-rw-r--r--arch/arm/mach-s3c6400/include/mach/map.h107
-rw-r--r--arch/arm/mach-s3c6400/include/mach/memory.h18
-rw-r--r--arch/arm/mach-s3c6400/include/mach/pwm-clock.h56
-rw-r--r--arch/arm/mach-s3c6400/include/mach/regs-clock.h16
-rw-r--r--arch/arm/mach-s3c6400/include/mach/regs-fb.h41
-rw-r--r--arch/arm/mach-s3c6400/include/mach/regs-irq.h20
-rw-r--r--arch/arm/mach-s3c6400/include/mach/system.h30
-rw-r--r--arch/arm/mach-s3c6400/include/mach/tick.h29
-rw-r--r--arch/arm/mach-s3c6400/include/mach/uncompress.h28
-rw-r--r--arch/arm/mach-s3c6400/mach-smdk6400.c96
-rw-r--r--arch/arm/mach-s3c6400/s3c6400.c92
-rw-r--r--arch/arm/mach-s3c6400/setup-sdhci.c63
21 files changed, 0 insertions, 906 deletions
diff --git a/arch/arm/mach-s3c6400/Kconfig b/arch/arm/mach-s3c6400/Kconfig
deleted file mode 100644
index a250bf68709f..000000000000
--- a/arch/arm/mach-s3c6400/Kconfig
+++ /dev/null
@@ -1,30 +0,0 @@
1# Copyright 2008 Openmoko, Inc.
2# Simtec Electronics, Ben Dooks <ben@simtec.co.uk>
3#
4# Licensed under GPLv2
5
6# Configuration options for the S3C6410 CPU
7
8config CPU_S3C6400
9 bool
10 select CPU_S3C6400_INIT
11 select CPU_S3C6400_CLOCK
12 help
13 Enable S3C6400 CPU support
14
15config S3C6400_SETUP_SDHCI
16 bool
17 help
18 Internal configuration for default SDHCI
19 setup for S3C6400.
20
21# S36400 Macchine support
22
23config MACH_SMDK6400
24 bool "SMDK6400"
25 select CPU_S3C6400
26 select S3C_DEV_HSMMC
27 select S3C_DEV_NAND
28 select S3C6400_SETUP_SDHCI
29 help
30 Machine support for the Samsung SMDK6400
diff --git a/arch/arm/mach-s3c6400/Makefile b/arch/arm/mach-s3c6400/Makefile
deleted file mode 100644
index df1ce4aa03e5..000000000000
--- a/arch/arm/mach-s3c6400/Makefile
+++ /dev/null
@@ -1,23 +0,0 @@
1# arch/arm/mach-s3c6400/Makefile
2#
3# Copyright 2008 Openmoko, Inc.
4# Copyright 2008 Simtec Electronics
5#
6# Licensed under GPLv2
7
8obj-y :=
9obj-m :=
10obj-n :=
11obj- :=
12
13# Core support for S3C6400 system
14
15obj-$(CONFIG_CPU_S3C6400) += s3c6400.o
16
17# setup support
18
19obj-$(CONFIG_S3C6400_SETUP_SDHCI) += setup-sdhci.o
20
21# Machine support
22
23obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o
diff --git a/arch/arm/mach-s3c6400/Makefile.boot b/arch/arm/mach-s3c6400/Makefile.boot
deleted file mode 100644
index ba41fdc0a586..000000000000
--- a/arch/arm/mach-s3c6400/Makefile.boot
+++ /dev/null
@@ -1,2 +0,0 @@
1 zreladdr-y := 0x50008000
2params_phys-y := 0x50000100
diff --git a/arch/arm/mach-s3c6400/include/mach/debug-macro.S b/arch/arm/mach-s3c6400/include/mach/debug-macro.S
deleted file mode 100644
index b18ac5266dfc..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/debug-macro.S
+++ /dev/null
@@ -1,39 +0,0 @@
1/* arch/arm/mach-s3c6400/include/mach/debug-macro.S
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* pull in the relevant register and map files. */
14
15#include <mach/map.h>
16#include <plat/regs-serial.h>
17
18 /* note, for the boot process to work we have to keep the UART
19 * virtual address aligned to an 1MiB boundary for the L1
20 * mapping the head code makes. We keep the UART virtual address
21 * aligned and add in the offset when we load the value here.
22 */
23
24 .macro addruart, rx
25 mrc p15, 0, \rx, c1, c0
26 tst \rx, #1
27 ldreq \rx, = S3C_PA_UART
28 ldrne \rx, = (S3C_VA_UART + S3C_PA_UART & 0xfffff)
29#if CONFIG_DEBUG_S3C_UART != 0
30 add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
31#endif
32 .endm
33
34/* include the reset of the code which will do the work, we're only
35 * compiling for a single cpu processor type so the default of s3c2440
36 * will be fine with us.
37 */
38
39#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s3c6400/include/mach/dma.h b/arch/arm/mach-s3c6400/include/mach/dma.h
deleted file mode 100644
index 6723860748be..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/dma.h
+++ /dev/null
@@ -1,70 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/dma.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6400 - DMA support
9 */
10
11#ifndef __ASM_ARCH_DMA_H
12#define __ASM_ARCH_DMA_H __FILE__
13
14#define S3C_DMA_CHANNELS (16)
15
16/* see mach-s3c2410/dma.h for notes on dma channel numbers */
17
18/* Note, for the S3C64XX architecture we keep the DMACH_
19 * defines in the order they are allocated to [S]DMA0/[S]DMA1
20 * so that is easy to do DHACH_ -> DMA controller conversion
21 */
22enum dma_ch {
23 /* DMA0/SDMA0 */
24 DMACH_UART0 = 0,
25 DMACH_UART0_SRC2,
26 DMACH_UART1,
27 DMACH_UART1_SRC2,
28 DMACH_UART2,
29 DMACH_UART2_SRC2,
30 DMACH_UART3,
31 DMACH_UART3_SRC2,
32 DMACH_PCM0_TX,
33 DMACH_PCM0_RX,
34 DMACH_I2S0_OUT,
35 DMACH_I2S0_IN,
36 DMACH_SPI0_TX,
37 DMACH_SPI0_RX,
38 DMACH_HSI_I2SV40_TX,
39 DMACH_HSI_I2SV40_RX,
40
41 /* DMA1/SDMA1 */
42 DMACH_PCM1_TX = 16,
43 DMACH_PCM1_RX,
44 DMACH_I2S1_OUT,
45 DMACH_I2S1_IN,
46 DMACH_SPI1_TX,
47 DMACH_SPI1_RX,
48 DMACH_AC97_PCMOUT,
49 DMACH_AC97_PCMIN,
50 DMACH_AC97_MICIN,
51 DMACH_PWM,
52 DMACH_IRDA,
53 DMACH_EXTERNAL,
54 DMACH_RES1,
55 DMACH_RES2,
56 DMACH_SECURITY_RX, /* SDMA1 only */
57 DMACH_SECURITY_TX, /* SDMA1 only */
58 DMACH_MAX /* the end */
59};
60
61static __inline__ bool s3c_dma_has_circular(void)
62{
63 return true;
64}
65
66#define S3C2410_DMAF_CIRCULAR (1 << 0)
67
68#include <plat/dma.h>
69
70#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/entry-macro.S b/arch/arm/mach-s3c6400/include/mach/entry-macro.S
deleted file mode 100644
index 33a8fe240882..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/entry-macro.S
+++ /dev/null
@@ -1,18 +0,0 @@
1/* arch/arm/mach-s3c6400/include/mach/entry-macro.S
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * Low-level IRQ helper macros for the Samsung S3C64XX series
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
13*/
14
15#include <mach/map.h>
16#include <plat/irqs.h>
17
18#include <asm/entry-macro-vic2.S>
diff --git a/arch/arm/mach-s3c6400/include/mach/gpio.h b/arch/arm/mach-s3c6400/include/mach/gpio.h
deleted file mode 100644
index e8e35e8fe731..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/gpio.h
+++ /dev/null
@@ -1,96 +0,0 @@
1/* arch/arm/mach-s3c6400/include/mach/gpio.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C6400 - GPIO lib support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#define gpio_get_value __gpio_get_value
16#define gpio_set_value __gpio_set_value
17#define gpio_cansleep __gpio_cansleep
18#define gpio_to_irq __gpio_to_irq
19
20/* GPIO bank sizes */
21#define S3C64XX_GPIO_A_NR (8)
22#define S3C64XX_GPIO_B_NR (7)
23#define S3C64XX_GPIO_C_NR (8)
24#define S3C64XX_GPIO_D_NR (5)
25#define S3C64XX_GPIO_E_NR (5)
26#define S3C64XX_GPIO_F_NR (16)
27#define S3C64XX_GPIO_G_NR (7)
28#define S3C64XX_GPIO_H_NR (10)
29#define S3C64XX_GPIO_I_NR (16)
30#define S3C64XX_GPIO_J_NR (12)
31#define S3C64XX_GPIO_K_NR (16)
32#define S3C64XX_GPIO_L_NR (15)
33#define S3C64XX_GPIO_M_NR (6)
34#define S3C64XX_GPIO_N_NR (16)
35#define S3C64XX_GPIO_O_NR (16)
36#define S3C64XX_GPIO_P_NR (15)
37#define S3C64XX_GPIO_Q_NR (9)
38
39/* GPIO bank numbes */
40
41/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
42 * space for debugging purposes so that any accidental
43 * change from one gpio bank to another can be caught.
44*/
45
46#define S3C64XX_GPIO_NEXT(__gpio) \
47 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
48
49enum s3c_gpio_number {
50 S3C64XX_GPIO_A_START = 0,
51 S3C64XX_GPIO_B_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_A),
52 S3C64XX_GPIO_C_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_B),
53 S3C64XX_GPIO_D_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_C),
54 S3C64XX_GPIO_E_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_D),
55 S3C64XX_GPIO_F_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_E),
56 S3C64XX_GPIO_G_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_F),
57 S3C64XX_GPIO_H_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_G),
58 S3C64XX_GPIO_I_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_H),
59 S3C64XX_GPIO_J_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_I),
60 S3C64XX_GPIO_K_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_J),
61 S3C64XX_GPIO_L_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_K),
62 S3C64XX_GPIO_M_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_L),
63 S3C64XX_GPIO_N_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_M),
64 S3C64XX_GPIO_O_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_N),
65 S3C64XX_GPIO_P_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_O),
66 S3C64XX_GPIO_Q_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_P),
67};
68
69/* S3C64XX GPIO number definitions. */
70
71#define S3C64XX_GPA(_nr) (S3C64XX_GPIO_A_START + (_nr))
72#define S3C64XX_GPB(_nr) (S3C64XX_GPIO_B_START + (_nr))
73#define S3C64XX_GPC(_nr) (S3C64XX_GPIO_C_START + (_nr))
74#define S3C64XX_GPD(_nr) (S3C64XX_GPIO_D_START + (_nr))
75#define S3C64XX_GPE(_nr) (S3C64XX_GPIO_E_START + (_nr))
76#define S3C64XX_GPF(_nr) (S3C64XX_GPIO_F_START + (_nr))
77#define S3C64XX_GPG(_nr) (S3C64XX_GPIO_G_START + (_nr))
78#define S3C64XX_GPH(_nr) (S3C64XX_GPIO_H_START + (_nr))
79#define S3C64XX_GPI(_nr) (S3C64XX_GPIO_I_START + (_nr))
80#define S3C64XX_GPJ(_nr) (S3C64XX_GPIO_J_START + (_nr))
81#define S3C64XX_GPK(_nr) (S3C64XX_GPIO_K_START + (_nr))
82#define S3C64XX_GPL(_nr) (S3C64XX_GPIO_L_START + (_nr))
83#define S3C64XX_GPM(_nr) (S3C64XX_GPIO_M_START + (_nr))
84#define S3C64XX_GPN(_nr) (S3C64XX_GPIO_N_START + (_nr))
85#define S3C64XX_GPO(_nr) (S3C64XX_GPIO_O_START + (_nr))
86#define S3C64XX_GPP(_nr) (S3C64XX_GPIO_P_START + (_nr))
87#define S3C64XX_GPQ(_nr) (S3C64XX_GPIO_Q_START + (_nr))
88
89/* the end of the S3C64XX specific gpios */
90#define S3C64XX_GPIO_END (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
91#define S3C_GPIO_END S3C64XX_GPIO_END
92
93/* define the number of gpios we need to the one after the GPQ() range */
94#define ARCH_NR_GPIOS (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
95
96#include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-s3c6400/include/mach/hardware.h b/arch/arm/mach-s3c6400/include/mach/hardware.h
deleted file mode 100644
index 862d033e57a4..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/hardware.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/hardware.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6400 - Hardware support
9 */
10
11#ifndef __ASM_ARCH_HARDWARE_H
12#define __ASM_ARCH_HARDWARE_H __FILE__
13
14/* currently nothing here, placeholder */
15
16#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/irqs.h b/arch/arm/mach-s3c6400/include/mach/irqs.h
deleted file mode 100644
index 4c97f9a4370b..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/irqs.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/irqs.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6400 - IRQ definitions
9 */
10
11#ifndef __ASM_ARCH_IRQS_H
12#define __ASM_ARCH_IRQS_H __FILE__
13
14#include <plat/irqs.h>
15
16#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c6400/include/mach/map.h
deleted file mode 100644
index 801c1c0f3a95..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/map.h
+++ /dev/null
@@ -1,107 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/map.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C64XX - Memory map definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_MAP_H
16#define __ASM_ARCH_MAP_H __FILE__
17
18#include <plat/map-base.h>
19
20/*
21 * Post-mux Chip Select Regions Xm0CSn_
22 * These may be used by SROM, NAND or CF depending on settings
23 */
24
25#define S3C64XX_PA_XM0CSN0 (0x10000000)
26#define S3C64XX_PA_XM0CSN1 (0x18000000)
27#define S3C64XX_PA_XM0CSN2 (0x20000000)
28#define S3C64XX_PA_XM0CSN3 (0x28000000)
29#define S3C64XX_PA_XM0CSN4 (0x30000000)
30#define S3C64XX_PA_XM0CSN5 (0x38000000)
31
32/* HSMMC units */
33#define S3C64XX_PA_HSMMC(x) (0x7C200000 + ((x) * 0x100000))
34#define S3C64XX_PA_HSMMC0 S3C64XX_PA_HSMMC(0)
35#define S3C64XX_PA_HSMMC1 S3C64XX_PA_HSMMC(1)
36#define S3C64XX_PA_HSMMC2 S3C64XX_PA_HSMMC(2)
37
38#define S3C_PA_UART (0x7F005000)
39#define S3C_PA_UART0 (S3C_PA_UART + 0x00)
40#define S3C_PA_UART1 (S3C_PA_UART + 0x400)
41#define S3C_PA_UART2 (S3C_PA_UART + 0x800)
42#define S3C_PA_UART3 (S3C_PA_UART + 0xC00)
43#define S3C_UART_OFFSET (0x400)
44
45/* See notes on UART VA mapping in debug-macro.S */
46#define S3C_VA_UARTx(x) (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET))
47
48#define S3C_VA_UART0 S3C_VA_UARTx(0)
49#define S3C_VA_UART1 S3C_VA_UARTx(1)
50#define S3C_VA_UART2 S3C_VA_UARTx(2)
51#define S3C_VA_UART3 S3C_VA_UARTx(3)
52
53#define S3C64XX_PA_SROM (0x70000000)
54
55#define S3C64XX_PA_NAND (0x70200000)
56#define S3C64XX_PA_FB (0x77100000)
57#define S3C64XX_PA_USB_HSOTG (0x7C000000)
58#define S3C64XX_PA_WATCHDOG (0x7E004000)
59#define S3C64XX_PA_RTC (0x7E005000)
60#define S3C64XX_PA_ADC (0x7E00B000)
61#define S3C64XX_PA_SYSCON (0x7E00F000)
62#define S3C64XX_PA_AC97 (0x7F001000)
63#define S3C64XX_PA_IIS0 (0x7F002000)
64#define S3C64XX_PA_IIS1 (0x7F003000)
65#define S3C64XX_PA_TIMER (0x7F006000)
66#define S3C64XX_PA_IIC0 (0x7F004000)
67#define S3C64XX_PA_SPI0 (0x7F00B000)
68#define S3C64XX_PA_SPI1 (0x7F00C000)
69#define S3C64XX_PA_PCM0 (0x7F009000)
70#define S3C64XX_PA_PCM1 (0x7F00A000)
71#define S3C64XX_PA_IISV4 (0x7F00D000)
72#define S3C64XX_PA_IIC1 (0x7F00F000)
73
74#define S3C64XX_PA_GPIO (0x7F008000)
75#define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000)
76#define S3C64XX_SZ_GPIO SZ_4K
77
78#define S3C64XX_PA_SDRAM (0x50000000)
79#define S3C64XX_PA_VIC0 (0x71200000)
80#define S3C64XX_PA_VIC1 (0x71300000)
81
82#define S3C64XX_PA_MODEM (0x74108000)
83#define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000)
84
85#define S3C64XX_PA_USBHOST (0x74300000)
86
87#define S3C64XX_PA_USB_HSPHY (0x7C100000)
88#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
89
90/* place VICs close together */
91#define VA_VIC0 (S3C_VA_IRQ + 0x00)
92#define VA_VIC1 (S3C_VA_IRQ + 0x10000)
93
94/* compatibiltiy defines. */
95#define S3C_PA_TIMER S3C64XX_PA_TIMER
96#define S3C_PA_HSMMC0 S3C64XX_PA_HSMMC0
97#define S3C_PA_HSMMC1 S3C64XX_PA_HSMMC1
98#define S3C_PA_HSMMC2 S3C64XX_PA_HSMMC2
99#define S3C_PA_IIC S3C64XX_PA_IIC0
100#define S3C_PA_IIC1 S3C64XX_PA_IIC1
101#define S3C_PA_NAND S3C64XX_PA_NAND
102#define S3C_PA_FB S3C64XX_PA_FB
103#define S3C_PA_USBHOST S3C64XX_PA_USBHOST
104#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG
105#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY
106
107#endif /* __ASM_ARCH_6400_MAP_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/memory.h b/arch/arm/mach-s3c6400/include/mach/memory.h
deleted file mode 100644
index a3ac84a65480..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/memory.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/* arch/arm/mach-s3c6400/include/mach/memory.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MEMORY_H
14#define __ASM_ARCH_MEMORY_H
15
16#define PHYS_OFFSET UL(0x50000000)
17
18#endif
diff --git a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h b/arch/arm/mach-s3c6400/include/mach/pwm-clock.h
deleted file mode 100644
index b25bedee0d52..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/pwm-clock.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64xx - pwm clock and timer support
9 */
10
11/**
12 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
13 * @tcfg: The timer TCFG1 register bits shifted down to 0.
14 *
15 * Return true if the given configuration from TCFG1 is a TCLK instead
16 * any of the TDIV clocks.
17 */
18static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
19{
20 return tcfg >= S3C64XX_TCFG1_MUX_TCLK;
21}
22
23/**
24 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
25 * @tcfg1: The tcfg1 setting, shifted down.
26 *
27 * Get the divisor value for the given tcfg1 setting. We assume the
28 * caller has already checked to see if this is not a TCLK source.
29 */
30static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
31{
32 return 1 << tcfg1;
33}
34
35/**
36 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
37 *
38 * Return true if we have a /1 in the tdiv setting.
39 */
40static inline unsigned int pwm_tdiv_has_div1(void)
41{
42 return 1;
43}
44
45/**
46 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
47 * @div: The divisor to calculate the bit information for.
48 *
49 * Turn a divisor into the necessary bit field for TCFG1.
50 */
51static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
52{
53 return ilog2(div);
54}
55
56#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-clock.h b/arch/arm/mach-s3c6400/include/mach/regs-clock.h
deleted file mode 100644
index a6c7f4eb3a1b..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/regs-clock.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/regs-clock.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C64XX - clock register compatibility with s3c24xx
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <plat/regs-clock.h>
16
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-fb.h b/arch/arm/mach-s3c6400/include/mach/regs-fb.h
deleted file mode 100644
index f56611526c63..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/regs-fb.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * Copyright 2008 Openmoko, Inc.
3 * Copyright 2008 Simtec Electronics
4 * Copyright 2009 Samsung Electronics Co.
5 *
6 * Pawel Osciak <p.osciak@samsung.com>
7 * Based on plat-s3c/include/plat/regs-fb.h by Ben Dooks <ben@simtec.co.uk>
8 *
9 * Framebuffer register definitions for Samsung S3C64xx.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#ifndef __ASM_ARCH_MACH_REGS_FB_H
17#define __ASM_ARCH_MACH_REGS_FB_H __FILE__
18
19#include <plat/regs-fb-v4.h>
20
21/* Palette registers */
22#define WIN2_PAL(_entry) (0x300 + ((_entry) * 2))
23#define WIN3_PAL(_entry) (0x320 + ((_entry) * 2))
24#define WIN4_PAL(_entry) (0x340 + ((_entry) * 2))
25#define WIN0_PAL(_entry) (0x400 + ((_entry) * 4))
26#define WIN1_PAL(_entry) (0x800 + ((_entry) * 4))
27
28static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg)
29{
30 switch (window) {
31 case 0: return WIN0_PAL(reg);
32 case 1: return WIN1_PAL(reg);
33 case 2: return WIN2_PAL(reg);
34 case 3: return WIN3_PAL(reg);
35 case 4: return WIN4_PAL(reg);
36 }
37
38 BUG();
39}
40
41#endif /* __ASM_ARCH_MACH_REGS_FB_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-irq.h b/arch/arm/mach-s3c6400/include/mach/regs-irq.h
deleted file mode 100644
index bcce68a0bb75..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/regs-irq.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/regs-irq.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C64XX - IRQ register definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_REGS_IRQ_H
16#define __ASM_ARCH_REGS_IRQ_H __FILE__
17
18#include <asm/hardware/vic.h>
19
20#endif /* __ASM_ARCH_6400_REGS_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/system.h b/arch/arm/mach-s3c6400/include/mach/system.h
deleted file mode 100644
index 2e58cb7a7147..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/system.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/system.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6400 - system implementation
9 */
10
11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H __FILE__
13
14#include <plat/watchdog-reset.h>
15
16static void arch_idle(void)
17{
18 /* nothing here yet */
19}
20
21static void arch_reset(char mode, const char *cmd)
22{
23 if (mode != 's')
24 arch_wdt_reset();
25
26 /* if all else fails, or mode was for soft, jump to 0 */
27 cpu_reset(0);
28}
29
30#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/tick.h b/arch/arm/mach-s3c6400/include/mach/tick.h
deleted file mode 100644
index ebe18a9469b8..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/tick.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/tick.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C64XX - Timer tick support definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_TICK_H
16#define __ASM_ARCH_TICK_H __FILE__
17
18/* note, the timer interrutps turn up in 2 places, the vic and then
19 * the timer block. We take the VIC as the base at the moment.
20 */
21static inline u32 s3c24xx_ostimer_pending(void)
22{
23 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
24 return pend & 1 << (IRQ_TIMER4_VIC - S3C64XX_IRQ_VIC0(0));
25}
26
27#define TICK_MAX (0xffffffff)
28
29#endif /* __ASM_ARCH_6400_TICK_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/uncompress.h b/arch/arm/mach-s3c6400/include/mach/uncompress.h
deleted file mode 100644
index c6a82a20bf2a..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/uncompress.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/* arch/arm/mach-s3c6400/include/mach/uncompress.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C6400 - uncompress code
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_UNCOMPRESS_H
16#define __ASM_ARCH_UNCOMPRESS_H
17
18#include <mach/map.h>
19#include <plat/uncompress.h>
20
21static void arch_detect_cpu(void)
22{
23 /* we do not need to do any cpu detection here at the moment. */
24 fifo_mask = S3C2440_UFSTAT_TXMASK;
25 fifo_max = 63 << S3C2440_UFSTAT_TXSHIFT;
26}
27
28#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s3c6400/mach-smdk6400.c b/arch/arm/mach-s3c6400/mach-smdk6400.c
deleted file mode 100644
index ab19285389a7..000000000000
--- a/arch/arm/mach-s3c6400/mach-smdk6400.c
+++ /dev/null
@@ -1,96 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/mach-smdk6400.c
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/interrupt.h>
15#include <linux/list.h>
16#include <linux/timer.h>
17#include <linux/init.h>
18#include <linux/serial_core.h>
19#include <linux/platform_device.h>
20#include <linux/i2c.h>
21#include <linux/io.h>
22
23#include <asm/mach-types.h>
24
25#include <asm/mach/arch.h>
26#include <asm/mach/map.h>
27#include <asm/mach/irq.h>
28
29#include <mach/hardware.h>
30#include <mach/map.h>
31
32#include <plat/regs-serial.h>
33
34#include <plat/s3c6400.h>
35#include <plat/clock.h>
36#include <plat/devs.h>
37#include <plat/cpu.h>
38#include <plat/iic.h>
39
40#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
41#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
42#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
43
44static struct s3c2410_uartcfg smdk6400_uartcfgs[] __initdata = {
45 [0] = {
46 .hwport = 0,
47 .flags = 0,
48 .ucon = 0x3c5,
49 .ulcon = 0x03,
50 .ufcon = 0x51,
51 },
52 [1] = {
53 .hwport = 1,
54 .flags = 0,
55 .ucon = 0x3c5,
56 .ulcon = 0x03,
57 .ufcon = 0x51,
58 },
59};
60
61static struct map_desc smdk6400_iodesc[] = {};
62
63static void __init smdk6400_map_io(void)
64{
65 s3c64xx_init_io(smdk6400_iodesc, ARRAY_SIZE(smdk6400_iodesc));
66 s3c24xx_init_clocks(12000000);
67 s3c24xx_init_uarts(smdk6400_uartcfgs, ARRAY_SIZE(smdk6400_uartcfgs));
68}
69
70static struct platform_device *smdk6400_devices[] __initdata = {
71 &s3c_device_hsmmc1,
72 &s3c_device_i2c0,
73};
74
75static struct i2c_board_info i2c_devs[] __initdata = {
76 { I2C_BOARD_INFO("wm8753", 0x1A), },
77 { I2C_BOARD_INFO("24c08", 0x50), },
78};
79
80static void __init smdk6400_machine_init(void)
81{
82 i2c_register_board_info(0, i2c_devs, ARRAY_SIZE(i2c_devs));
83 platform_add_devices(smdk6400_devices, ARRAY_SIZE(smdk6400_devices));
84}
85
86MACHINE_START(SMDK6400, "SMDK6400")
87 /* Maintainer: Ben Dooks <ben@fluff.org> */
88 .phys_io = S3C_PA_UART & 0xfff00000,
89 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
90 .boot_params = S3C64XX_PA_SDRAM + 0x100,
91
92 .init_irq = s3c6400_init_irq,
93 .map_io = smdk6400_map_io,
94 .init_machine = smdk6400_machine_init,
95 .timer = &s3c24xx_timer,
96MACHINE_END
diff --git a/arch/arm/mach-s3c6400/s3c6400.c b/arch/arm/mach-s3c6400/s3c6400.c
deleted file mode 100644
index d876ee503671..000000000000
--- a/arch/arm/mach-s3c6400/s3c6400.c
+++ /dev/null
@@ -1,92 +0,0 @@
1/* linux/arch/arm/mach-s3c6410/cpu.c
2 *
3 * Copyright 2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/interrupt.h>
15#include <linux/list.h>
16#include <linux/timer.h>
17#include <linux/init.h>
18#include <linux/clk.h>
19#include <linux/io.h>
20#include <linux/sysdev.h>
21#include <linux/serial_core.h>
22#include <linux/platform_device.h>
23
24#include <asm/mach/arch.h>
25#include <asm/mach/map.h>
26#include <asm/mach/irq.h>
27
28#include <mach/hardware.h>
29#include <asm/irq.h>
30
31#include <plat/cpu-freq.h>
32#include <plat/regs-serial.h>
33#include <plat/regs-clock.h>
34
35#include <plat/cpu.h>
36#include <plat/devs.h>
37#include <plat/clock.h>
38#include <plat/sdhci.h>
39#include <plat/iic-core.h>
40#include <plat/s3c6400.h>
41
42void __init s3c6400_map_io(void)
43{
44 /* setup SDHCI */
45
46 s3c6400_default_sdhci0();
47 s3c6400_default_sdhci1();
48 s3c6400_default_sdhci2();
49
50 /* the i2c devices are directly compatible with s3c2440 */
51 s3c_i2c0_setname("s3c2440-i2c");
52
53 s3c_device_nand.name = "s3c6400-nand";
54}
55
56void __init s3c6400_init_clocks(int xtal)
57{
58 printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
59 s3c24xx_register_baseclocks(xtal);
60 s3c64xx_register_clocks();
61 s3c6400_register_clocks(S3C6400_CLKDIV0_ARM_MASK);
62 s3c6400_setup_clocks();
63}
64
65void __init s3c6400_init_irq(void)
66{
67 /* VIC0 does not have IRQS 5..7,
68 * VIC1 is fully populated. */
69 s3c64xx_init_irq(~0 & ~(0xf << 5), ~0);
70}
71
72struct sysdev_class s3c6400_sysclass = {
73 .name = "s3c6400-core",
74};
75
76static struct sys_device s3c6400_sysdev = {
77 .cls = &s3c6400_sysclass,
78};
79
80static int __init s3c6400_core_init(void)
81{
82 return sysdev_class_register(&s3c6400_sysclass);
83}
84
85core_initcall(s3c6400_core_init);
86
87int __init s3c6400_init(void)
88{
89 printk("S3C6400: Initialising architecture\n");
90
91 return sysdev_register(&s3c6400_sysdev);
92}
diff --git a/arch/arm/mach-s3c6400/setup-sdhci.c b/arch/arm/mach-s3c6400/setup-sdhci.c
deleted file mode 100644
index 1039937403be..000000000000
--- a/arch/arm/mach-s3c6400/setup-sdhci.c
+++ /dev/null
@@ -1,63 +0,0 @@
1/* linux/arch/arm/mach-s3c6410/setup-sdhci.c
2 *
3 * Copyright 2008 Simtec Electronics
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/interrupt.h>
18#include <linux/platform_device.h>
19#include <linux/io.h>
20
21#include <linux/mmc/card.h>
22#include <linux/mmc/host.h>
23
24#include <plat/regs-sdhci.h>
25#include <plat/sdhci.h>
26
27/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
28
29char *s3c6400_hsmmc_clksrcs[4] = {
30 [0] = "hsmmc",
31 [1] = "hsmmc",
32 [2] = "mmc_bus",
33 /* [3] = "48m", - note not successfully used yet */
34};
35
36void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
37 void __iomem *r,
38 struct mmc_ios *ios,
39 struct mmc_card *card)
40{
41 u32 ctrl2, ctrl3;
42
43 ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
44 ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
45 ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
46 S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
47 S3C_SDHCI_CTRL2_ENFBCLKRX |
48 S3C_SDHCI_CTRL2_DFCNT_NONE |
49 S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
50
51 if (ios->clock < 25 * 1000000)
52 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
53 S3C_SDHCI_CTRL3_FCSEL2 |
54 S3C_SDHCI_CTRL3_FCSEL1 |
55 S3C_SDHCI_CTRL3_FCSEL0);
56 else
57 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
58
59 printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
60 writel(ctrl2, r + S3C_SDHCI_CONTROL2);
61 writel(ctrl3, r + S3C_SDHCI_CONTROL3);
62}
63
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-08 15:20:21 -0500