diff options
Diffstat (limited to 'arch/arm/mach-s3c6400')
-rw-r--r-- | arch/arm/mach-s3c6400/Kconfig | 8 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/Makefile | 15 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/Makefile.boot | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/debug-macro.S | 39 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/dma.h | 16 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/entry-macro.S | 44 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/gpio-core.h | 21 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/gpio.h | 96 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/hardware.h | 16 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/irqs.h | 20 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/map.h | 68 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/memory.h | 18 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/pwm-clock.h | 56 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/regs-fb.h | 259 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/regs-irq.h | 20 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/system.h | 24 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/tick.h | 29 | ||||
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/uncompress.h | 28 |
18 files changed, 779 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c6400/Kconfig b/arch/arm/mach-s3c6400/Kconfig new file mode 100644 index 000000000000..6da82b5c09ba --- /dev/null +++ b/arch/arm/mach-s3c6400/Kconfig | |||
@@ -0,0 +1,8 @@ | |||
1 | # arch/arm/mach-s3c6400/Kconfig | ||
2 | # | ||
3 | # Copyright 2008 Openmoko, Inc. | ||
4 | # Simtec Electronics, Ben Dooks <ben@simtec.co.uk> | ||
5 | # | ||
6 | # Licensed under GPLv2 | ||
7 | |||
8 | # Currently nothing here, this will be added later | ||
diff --git a/arch/arm/mach-s3c6400/Makefile b/arch/arm/mach-s3c6400/Makefile new file mode 100644 index 000000000000..8f397db25b87 --- /dev/null +++ b/arch/arm/mach-s3c6400/Makefile | |||
@@ -0,0 +1,15 @@ | |||
1 | # arch/arm/mach-s3c6400/Makefile | ||
2 | # | ||
3 | # Copyright 2008 Openmoko, Inc. | ||
4 | # Copyright 2008 Simtec Electronics | ||
5 | # | ||
6 | # Licensed under GPLv2 | ||
7 | |||
8 | obj-y := | ||
9 | obj-m := | ||
10 | obj-n := | ||
11 | obj- := | ||
12 | |||
13 | # Core support for S3C6400 system | ||
14 | |||
15 | obj-n += blank.o | ||
diff --git a/arch/arm/mach-s3c6400/Makefile.boot b/arch/arm/mach-s3c6400/Makefile.boot new file mode 100644 index 000000000000..ba41fdc0a586 --- /dev/null +++ b/arch/arm/mach-s3c6400/Makefile.boot | |||
@@ -0,0 +1,2 @@ | |||
1 | zreladdr-y := 0x50008000 | ||
2 | params_phys-y := 0x50000100 | ||
diff --git a/arch/arm/mach-s3c6400/include/mach/debug-macro.S b/arch/arm/mach-s3c6400/include/mach/debug-macro.S new file mode 100644 index 000000000000..b18ac5266dfc --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/debug-macro.S | |||
@@ -0,0 +1,39 @@ | |||
1 | /* arch/arm/mach-s3c6400/include/mach/debug-macro.S | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* pull in the relevant register and map files. */ | ||
14 | |||
15 | #include <mach/map.h> | ||
16 | #include <plat/regs-serial.h> | ||
17 | |||
18 | /* note, for the boot process to work we have to keep the UART | ||
19 | * virtual address aligned to an 1MiB boundary for the L1 | ||
20 | * mapping the head code makes. We keep the UART virtual address | ||
21 | * aligned and add in the offset when we load the value here. | ||
22 | */ | ||
23 | |||
24 | .macro addruart, rx | ||
25 | mrc p15, 0, \rx, c1, c0 | ||
26 | tst \rx, #1 | ||
27 | ldreq \rx, = S3C_PA_UART | ||
28 | ldrne \rx, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) | ||
29 | #if CONFIG_DEBUG_S3C_UART != 0 | ||
30 | add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) | ||
31 | #endif | ||
32 | .endm | ||
33 | |||
34 | /* include the reset of the code which will do the work, we're only | ||
35 | * compiling for a single cpu processor type so the default of s3c2440 | ||
36 | * will be fine with us. | ||
37 | */ | ||
38 | |||
39 | #include <plat/debug-macro.S> | ||
diff --git a/arch/arm/mach-s3c6400/include/mach/dma.h b/arch/arm/mach-s3c6400/include/mach/dma.h new file mode 100644 index 000000000000..9771ac2cb07e --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/dma.h | |||
@@ -0,0 +1,16 @@ | |||
1 | /* linux/arch/arm/mach-s3c6400/include/mach/dma.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C6400 - DMA support | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_DMA_H | ||
12 | #define __ASM_ARCH_DMA_H __FILE__ | ||
13 | |||
14 | /* currently nothing here, placeholder */ | ||
15 | |||
16 | #endif /* __ASM_ARCH_IRQ_H */ | ||
diff --git a/arch/arm/mach-s3c6400/include/mach/entry-macro.S b/arch/arm/mach-s3c6400/include/mach/entry-macro.S new file mode 100644 index 000000000000..fbd90d2cf355 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/entry-macro.S | |||
@@ -0,0 +1,44 @@ | |||
1 | /* arch/arm/mach-s3c6400/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * Low-level IRQ helper macros for the Samsung S3C64XX series | ||
9 | * | ||
10 | * This file is licensed under the terms of the GNU General Public | ||
11 | * License version 2. This program is licensed "as is" without any | ||
12 | * warranty of any kind, whether express or implied. | ||
13 | */ | ||
14 | |||
15 | #include <asm/hardware/vic.h> | ||
16 | #include <mach/map.h> | ||
17 | #include <plat/irqs.h> | ||
18 | |||
19 | .macro disable_fiq | ||
20 | .endm | ||
21 | |||
22 | .macro get_irqnr_preamble, base, tmp | ||
23 | ldr \base, =S3C_VA_VIC0 | ||
24 | .endm | ||
25 | |||
26 | .macro arch_ret_to_user, tmp1, tmp2 | ||
27 | .endm | ||
28 | |||
29 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
30 | |||
31 | @ check the vic0 | ||
32 | mov \irqnr, # S3C_IRQ_OFFSET + 31 | ||
33 | ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] | ||
34 | teq \irqstat, #0 | ||
35 | |||
36 | @ otherwise try vic1 | ||
37 | addeq \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0) | ||
38 | addeq \irqnr, \irqnr, #32 | ||
39 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] | ||
40 | teqeq \irqstat, #0 | ||
41 | |||
42 | clzne \irqstat, \irqstat | ||
43 | subne \irqnr, \irqnr, \irqstat | ||
44 | .endm | ||
diff --git a/arch/arm/mach-s3c6400/include/mach/gpio-core.h b/arch/arm/mach-s3c6400/include/mach/gpio-core.h new file mode 100644 index 000000000000..d89aae68b0a5 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/gpio-core.h | |||
@@ -0,0 +1,21 @@ | |||
1 | /* arch/arm/mach-s3c6400/include/mach/gpio-core.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C64XX - GPIO core support | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifndef __ASM_ARCH_GPIO_CORE_H | ||
16 | #define __ASM_ARCH_GPIO_CORE_H __FILE__ | ||
17 | |||
18 | /* currently we just include the platform support */ | ||
19 | #include <plat/gpio-core.h> | ||
20 | |||
21 | #endif /* __ASM_ARCH_GPIO_CORE_H */ | ||
diff --git a/arch/arm/mach-s3c6400/include/mach/gpio.h b/arch/arm/mach-s3c6400/include/mach/gpio.h new file mode 100644 index 000000000000..e8e35e8fe731 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/gpio.h | |||
@@ -0,0 +1,96 @@ | |||
1 | /* arch/arm/mach-s3c6400/include/mach/gpio.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * S3C6400 - GPIO lib support | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define gpio_get_value __gpio_get_value | ||
16 | #define gpio_set_value __gpio_set_value | ||
17 | #define gpio_cansleep __gpio_cansleep | ||
18 | #define gpio_to_irq __gpio_to_irq | ||
19 | |||
20 | /* GPIO bank sizes */ | ||
21 | #define S3C64XX_GPIO_A_NR (8) | ||
22 | #define S3C64XX_GPIO_B_NR (7) | ||
23 | #define S3C64XX_GPIO_C_NR (8) | ||
24 | #define S3C64XX_GPIO_D_NR (5) | ||
25 | #define S3C64XX_GPIO_E_NR (5) | ||
26 | #define S3C64XX_GPIO_F_NR (16) | ||
27 | #define S3C64XX_GPIO_G_NR (7) | ||
28 | #define S3C64XX_GPIO_H_NR (10) | ||
29 | #define S3C64XX_GPIO_I_NR (16) | ||
30 | #define S3C64XX_GPIO_J_NR (12) | ||
31 | #define S3C64XX_GPIO_K_NR (16) | ||
32 | #define S3C64XX_GPIO_L_NR (15) | ||
33 | #define S3C64XX_GPIO_M_NR (6) | ||
34 | #define S3C64XX_GPIO_N_NR (16) | ||
35 | #define S3C64XX_GPIO_O_NR (16) | ||
36 | #define S3C64XX_GPIO_P_NR (15) | ||
37 | #define S3C64XX_GPIO_Q_NR (9) | ||
38 | |||
39 | /* GPIO bank numbes */ | ||
40 | |||
41 | /* CONFIG_S3C_GPIO_SPACE allows the user to select extra | ||
42 | * space for debugging purposes so that any accidental | ||
43 | * change from one gpio bank to another can be caught. | ||
44 | */ | ||
45 | |||
46 | #define S3C64XX_GPIO_NEXT(__gpio) \ | ||
47 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) | ||
48 | |||
49 | enum s3c_gpio_number { | ||
50 | S3C64XX_GPIO_A_START = 0, | ||
51 | S3C64XX_GPIO_B_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_A), | ||
52 | S3C64XX_GPIO_C_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_B), | ||
53 | S3C64XX_GPIO_D_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_C), | ||
54 | S3C64XX_GPIO_E_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_D), | ||
55 | S3C64XX_GPIO_F_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_E), | ||
56 | S3C64XX_GPIO_G_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_F), | ||
57 | S3C64XX_GPIO_H_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_G), | ||
58 | S3C64XX_GPIO_I_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_H), | ||
59 | S3C64XX_GPIO_J_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_I), | ||
60 | S3C64XX_GPIO_K_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_J), | ||
61 | S3C64XX_GPIO_L_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_K), | ||
62 | S3C64XX_GPIO_M_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_L), | ||
63 | S3C64XX_GPIO_N_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_M), | ||
64 | S3C64XX_GPIO_O_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_N), | ||
65 | S3C64XX_GPIO_P_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_O), | ||
66 | S3C64XX_GPIO_Q_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_P), | ||
67 | }; | ||
68 | |||
69 | /* S3C64XX GPIO number definitions. */ | ||
70 | |||
71 | #define S3C64XX_GPA(_nr) (S3C64XX_GPIO_A_START + (_nr)) | ||
72 | #define S3C64XX_GPB(_nr) (S3C64XX_GPIO_B_START + (_nr)) | ||
73 | #define S3C64XX_GPC(_nr) (S3C64XX_GPIO_C_START + (_nr)) | ||
74 | #define S3C64XX_GPD(_nr) (S3C64XX_GPIO_D_START + (_nr)) | ||
75 | #define S3C64XX_GPE(_nr) (S3C64XX_GPIO_E_START + (_nr)) | ||
76 | #define S3C64XX_GPF(_nr) (S3C64XX_GPIO_F_START + (_nr)) | ||
77 | #define S3C64XX_GPG(_nr) (S3C64XX_GPIO_G_START + (_nr)) | ||
78 | #define S3C64XX_GPH(_nr) (S3C64XX_GPIO_H_START + (_nr)) | ||
79 | #define S3C64XX_GPI(_nr) (S3C64XX_GPIO_I_START + (_nr)) | ||
80 | #define S3C64XX_GPJ(_nr) (S3C64XX_GPIO_J_START + (_nr)) | ||
81 | #define S3C64XX_GPK(_nr) (S3C64XX_GPIO_K_START + (_nr)) | ||
82 | #define S3C64XX_GPL(_nr) (S3C64XX_GPIO_L_START + (_nr)) | ||
83 | #define S3C64XX_GPM(_nr) (S3C64XX_GPIO_M_START + (_nr)) | ||
84 | #define S3C64XX_GPN(_nr) (S3C64XX_GPIO_N_START + (_nr)) | ||
85 | #define S3C64XX_GPO(_nr) (S3C64XX_GPIO_O_START + (_nr)) | ||
86 | #define S3C64XX_GPP(_nr) (S3C64XX_GPIO_P_START + (_nr)) | ||
87 | #define S3C64XX_GPQ(_nr) (S3C64XX_GPIO_Q_START + (_nr)) | ||
88 | |||
89 | /* the end of the S3C64XX specific gpios */ | ||
90 | #define S3C64XX_GPIO_END (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1) | ||
91 | #define S3C_GPIO_END S3C64XX_GPIO_END | ||
92 | |||
93 | /* define the number of gpios we need to the one after the GPQ() range */ | ||
94 | #define ARCH_NR_GPIOS (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1) | ||
95 | |||
96 | #include <asm-generic/gpio.h> | ||
diff --git a/arch/arm/mach-s3c6400/include/mach/hardware.h b/arch/arm/mach-s3c6400/include/mach/hardware.h new file mode 100644 index 000000000000..862d033e57a4 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/hardware.h | |||
@@ -0,0 +1,16 @@ | |||
1 | /* linux/arch/arm/mach-s3c6400/include/mach/hardware.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C6400 - Hardware support | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_HARDWARE_H | ||
12 | #define __ASM_ARCH_HARDWARE_H __FILE__ | ||
13 | |||
14 | /* currently nothing here, placeholder */ | ||
15 | |||
16 | #endif /* __ASM_ARCH_IRQ_H */ | ||
diff --git a/arch/arm/mach-s3c6400/include/mach/irqs.h b/arch/arm/mach-s3c6400/include/mach/irqs.h new file mode 100644 index 000000000000..b38c47cffc28 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/irqs.h | |||
@@ -0,0 +1,20 @@ | |||
1 | /* linux/arch/arm/mach-s3c6400/include/mach/irqs.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C6400 - IRQ definitions | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_IRQS_H | ||
12 | #define __ASM_ARCH_IRQS_H __FILE__ | ||
13 | |||
14 | #ifndef __ASM_ARM_IRQ_H | ||
15 | #error "Do not include this directly, instead #include <asm/irq.h>" | ||
16 | #endif | ||
17 | |||
18 | #include <plat/irqs.h> | ||
19 | |||
20 | #endif /* __ASM_ARCH_IRQ_H */ | ||
diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c6400/include/mach/map.h new file mode 100644 index 000000000000..cff27d813fc6 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/map.h | |||
@@ -0,0 +1,68 @@ | |||
1 | /* linux/arch/arm/mach-s3c6400/include/mach/map.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * S3C64XX - Memory map definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifndef __ASM_ARCH_MAP_H | ||
16 | #define __ASM_ARCH_MAP_H __FILE__ | ||
17 | |||
18 | #include <plat/map-base.h> | ||
19 | |||
20 | /* HSMMC units */ | ||
21 | #define S3C64XX_PA_HSMMC(x) (0x7C200000 + ((x) * 0x100000)) | ||
22 | #define S3C64XX_PA_HSMMC0 S3C64XX_PA_HSMMC(0) | ||
23 | #define S3C64XX_PA_HSMMC1 S3C64XX_PA_HSMMC(1) | ||
24 | #define S3C64XX_PA_HSMMC2 S3C64XX_PA_HSMMC(2) | ||
25 | |||
26 | #define S3C_PA_UART (0x7F005000) | ||
27 | #define S3C_PA_UART0 (S3C_PA_UART + 0x00) | ||
28 | #define S3C_PA_UART1 (S3C_PA_UART + 0x400) | ||
29 | #define S3C_PA_UART2 (S3C_PA_UART + 0x800) | ||
30 | #define S3C_PA_UART3 (S3C_PA_UART + 0xC00) | ||
31 | #define S3C_UART_OFFSET (0x400) | ||
32 | |||
33 | /* See notes on UART VA mapping in debug-macro.S */ | ||
34 | #define S3C_VA_UARTx(x) (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET)) | ||
35 | |||
36 | #define S3C_VA_UART0 S3C_VA_UARTx(0) | ||
37 | #define S3C_VA_UART1 S3C_VA_UARTx(1) | ||
38 | #define S3C_VA_UART2 S3C_VA_UARTx(2) | ||
39 | #define S3C_VA_UART3 S3C_VA_UARTx(3) | ||
40 | |||
41 | #define S3C64XX_PA_FB (0x77100000) | ||
42 | #define S3C64XX_PA_SYSCON (0x7E00F000) | ||
43 | #define S3C64XX_PA_TIMER (0x7F006000) | ||
44 | #define S3C64XX_PA_IIC0 (0x7F004000) | ||
45 | #define S3C64XX_PA_IIC1 (0x7F00F000) | ||
46 | |||
47 | #define S3C64XX_PA_GPIO (0x7F008000) | ||
48 | #define S3C64XX_VA_GPIO S3C_ADDR(0x00500000) | ||
49 | #define S3C64XX_SZ_GPIO SZ_4K | ||
50 | |||
51 | #define S3C64XX_PA_SDRAM (0x50000000) | ||
52 | #define S3C64XX_PA_VIC0 (0x71200000) | ||
53 | #define S3C64XX_PA_VIC1 (0x71300000) | ||
54 | |||
55 | /* place VICs close together */ | ||
56 | #define S3C_VA_VIC0 (S3C_VA_IRQ + 0x00) | ||
57 | #define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000) | ||
58 | |||
59 | /* compatibiltiy defines. */ | ||
60 | #define S3C_PA_TIMER S3C64XX_PA_TIMER | ||
61 | #define S3C_PA_HSMMC0 S3C64XX_PA_HSMMC0 | ||
62 | #define S3C_PA_HSMMC1 S3C64XX_PA_HSMMC1 | ||
63 | #define S3C_PA_HSMMC2 S3C64XX_PA_HSMMC2 | ||
64 | #define S3C_PA_IIC S3C64XX_PA_IIC0 | ||
65 | #define S3C_PA_IIC1 S3C64XX_PA_IIC1 | ||
66 | #define S3C_PA_FB S3C64XX_PA_FB | ||
67 | |||
68 | #endif /* __ASM_ARCH_6400_MAP_H */ | ||
diff --git a/arch/arm/mach-s3c6400/include/mach/memory.h b/arch/arm/mach-s3c6400/include/mach/memory.h new file mode 100644 index 000000000000..a3ac84a65480 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/memory.h | |||
@@ -0,0 +1,18 @@ | |||
1 | /* arch/arm/mach-s3c6400/include/mach/memory.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_MEMORY_H | ||
14 | #define __ASM_ARCH_MEMORY_H | ||
15 | |||
16 | #define PHYS_OFFSET UL(0x50000000) | ||
17 | |||
18 | #endif | ||
diff --git a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h b/arch/arm/mach-s3c6400/include/mach/pwm-clock.h new file mode 100644 index 000000000000..b25bedee0d52 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/pwm-clock.h | |||
@@ -0,0 +1,56 @@ | |||
1 | /* linux/arch/arm/mach-s3c6400/include/mach/pwm-clock.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C64xx - pwm clock and timer support | ||
9 | */ | ||
10 | |||
11 | /** | ||
12 | * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk | ||
13 | * @tcfg: The timer TCFG1 register bits shifted down to 0. | ||
14 | * | ||
15 | * Return true if the given configuration from TCFG1 is a TCLK instead | ||
16 | * any of the TDIV clocks. | ||
17 | */ | ||
18 | static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) | ||
19 | { | ||
20 | return tcfg >= S3C64XX_TCFG1_MUX_TCLK; | ||
21 | } | ||
22 | |||
23 | /** | ||
24 | * tcfg_to_divisor() - convert tcfg1 setting to a divisor | ||
25 | * @tcfg1: The tcfg1 setting, shifted down. | ||
26 | * | ||
27 | * Get the divisor value for the given tcfg1 setting. We assume the | ||
28 | * caller has already checked to see if this is not a TCLK source. | ||
29 | */ | ||
30 | static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) | ||
31 | { | ||
32 | return 1 << tcfg1; | ||
33 | } | ||
34 | |||
35 | /** | ||
36 | * pwm_tdiv_has_div1() - does the tdiv setting have a /1 | ||
37 | * | ||
38 | * Return true if we have a /1 in the tdiv setting. | ||
39 | */ | ||
40 | static inline unsigned int pwm_tdiv_has_div1(void) | ||
41 | { | ||
42 | return 1; | ||
43 | } | ||
44 | |||
45 | /** | ||
46 | * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. | ||
47 | * @div: The divisor to calculate the bit information for. | ||
48 | * | ||
49 | * Turn a divisor into the necessary bit field for TCFG1. | ||
50 | */ | ||
51 | static inline unsigned long pwm_tdiv_div_bits(unsigned int div) | ||
52 | { | ||
53 | return ilog2(div); | ||
54 | } | ||
55 | |||
56 | #define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK | ||
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-fb.h b/arch/arm/mach-s3c6400/include/mach/regs-fb.h new file mode 100644 index 000000000000..47019795ce06 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/regs-fb.h | |||
@@ -0,0 +1,259 @@ | |||
1 | /* arch/arm/mach-s3c6400/include/mach/regs-fb.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * S3C64XX - new-style framebuffer register definitions | ||
9 | * | ||
10 | * This is the register set for the new style framebuffer interface | ||
11 | * found from the S3C2443 onwards and specifically the S3C64XX series | ||
12 | * S3C6400 and S3C6410. | ||
13 | * | ||
14 | * The file contains the cpu specific items which change between whichever | ||
15 | * architecture is selected. See <plat/regs-fb.h> for the core definitions | ||
16 | * that are the same. | ||
17 | * | ||
18 | * This program is free software; you can redistribute it and/or modify | ||
19 | * it under the terms of the GNU General Public License version 2 as | ||
20 | * published by the Free Software Foundation. | ||
21 | */ | ||
22 | |||
23 | /* include the core definitions here, in case we really do need to | ||
24 | * override them at a later date. | ||
25 | */ | ||
26 | |||
27 | #include <plat/regs-fb.h> | ||
28 | |||
29 | #define S3C_FB_MAX_WIN (5) /* number of hardware windows available. */ | ||
30 | #define VIDCON1_FSTATUS_EVEN (1 << 15) | ||
31 | |||
32 | /* Video timing controls */ | ||
33 | #define VIDTCON0 (0x10) | ||
34 | #define VIDTCON1 (0x14) | ||
35 | #define VIDTCON2 (0x18) | ||
36 | |||
37 | /* Window position controls */ | ||
38 | |||
39 | #define WINCON(_win) (0x20 + ((_win) * 4)) | ||
40 | |||
41 | /* OSD1 and OSD4 do not have register D */ | ||
42 | |||
43 | #define VIDOSD_A(_win) (0x40 + ((_win) * 16)) | ||
44 | #define VIDOSD_B(_win) (0x44 + ((_win) * 16)) | ||
45 | #define VIDOSD_C(_win) (0x48 + ((_win) * 16)) | ||
46 | #define VIDOSD_D(_win) (0x4C + ((_win) * 16)) | ||
47 | |||
48 | /* Video buffer addresses */ | ||
49 | |||
50 | #define VIDW_BUF_START(_buff) (0xA0 + ((_buff) * 8)) | ||
51 | #define VIDW_BUF_START1(_buff) (0xA4 + ((_buff) * 8)) | ||
52 | #define VIDW_BUF_END(_buff) (0xD0 + ((_buff) * 8)) | ||
53 | #define VIDW_BUF_END1(_buff) (0xD4 + ((_buff) * 8)) | ||
54 | #define VIDW_BUF_SIZE(_buff) (0x100 + ((_buff) * 4)) | ||
55 | |||
56 | #define VIDINTCON0 (0x130) | ||
57 | |||
58 | #define WxKEYCONy(_win, _con) ((0x140 + ((_win) * 8)) + ((_con) * 4)) | ||
59 | |||
60 | /* WINCONx */ | ||
61 | |||
62 | #define WINCONx_CSCWIDTH_MASK (0x3 << 26) | ||
63 | #define WINCONx_CSCWIDTH_SHIFT (26) | ||
64 | #define WINCONx_CSCWIDTH_WIDE (0x0 << 26) | ||
65 | #define WINCONx_CSCWIDTH_NARROW (0x3 << 26) | ||
66 | |||
67 | #define WINCONx_ENLOCAL (1 << 22) | ||
68 | #define WINCONx_BUFSTATUS (1 << 21) | ||
69 | #define WINCONx_BUFSEL (1 << 20) | ||
70 | #define WINCONx_BUFAUTOEN (1 << 19) | ||
71 | #define WINCONx_YCbCr (1 << 13) | ||
72 | |||
73 | #define WINCON1_LOCALSEL_CAMIF (1 << 23) | ||
74 | |||
75 | #define WINCON2_LOCALSEL_CAMIF (1 << 23) | ||
76 | #define WINCON2_BLD_PIX (1 << 6) | ||
77 | |||
78 | #define WINCON2_ALPHA_SEL (1 << 1) | ||
79 | #define WINCON2_BPPMODE_MASK (0xf << 2) | ||
80 | #define WINCON2_BPPMODE_SHIFT (2) | ||
81 | #define WINCON2_BPPMODE_1BPP (0x0 << 2) | ||
82 | #define WINCON2_BPPMODE_2BPP (0x1 << 2) | ||
83 | #define WINCON2_BPPMODE_4BPP (0x2 << 2) | ||
84 | #define WINCON2_BPPMODE_8BPP_1232 (0x4 << 2) | ||
85 | #define WINCON2_BPPMODE_16BPP_565 (0x5 << 2) | ||
86 | #define WINCON2_BPPMODE_16BPP_A1555 (0x6 << 2) | ||
87 | #define WINCON2_BPPMODE_16BPP_I1555 (0x7 << 2) | ||
88 | #define WINCON2_BPPMODE_18BPP_666 (0x8 << 2) | ||
89 | #define WINCON2_BPPMODE_18BPP_A1665 (0x9 << 2) | ||
90 | #define WINCON2_BPPMODE_19BPP_A1666 (0xa << 2) | ||
91 | #define WINCON2_BPPMODE_24BPP_888 (0xb << 2) | ||
92 | #define WINCON2_BPPMODE_24BPP_A1887 (0xc << 2) | ||
93 | #define WINCON2_BPPMODE_25BPP_A1888 (0xd << 2) | ||
94 | #define WINCON2_BPPMODE_28BPP_A4888 (0xd << 2) | ||
95 | |||
96 | #define WINCON3_BLD_PIX (1 << 6) | ||
97 | |||
98 | #define WINCON3_ALPHA_SEL (1 << 1) | ||
99 | #define WINCON3_BPPMODE_MASK (0xf << 2) | ||
100 | #define WINCON3_BPPMODE_SHIFT (2) | ||
101 | #define WINCON3_BPPMODE_1BPP (0x0 << 2) | ||
102 | #define WINCON3_BPPMODE_2BPP (0x1 << 2) | ||
103 | #define WINCON3_BPPMODE_4BPP (0x2 << 2) | ||
104 | #define WINCON3_BPPMODE_16BPP_565 (0x5 << 2) | ||
105 | #define WINCON3_BPPMODE_16BPP_A1555 (0x6 << 2) | ||
106 | #define WINCON3_BPPMODE_16BPP_I1555 (0x7 << 2) | ||
107 | #define WINCON3_BPPMODE_18BPP_666 (0x8 << 2) | ||
108 | #define WINCON3_BPPMODE_18BPP_A1665 (0x9 << 2) | ||
109 | #define WINCON3_BPPMODE_19BPP_A1666 (0xa << 2) | ||
110 | #define WINCON3_BPPMODE_24BPP_888 (0xb << 2) | ||
111 | #define WINCON3_BPPMODE_24BPP_A1887 (0xc << 2) | ||
112 | #define WINCON3_BPPMODE_25BPP_A1888 (0xd << 2) | ||
113 | #define WINCON3_BPPMODE_28BPP_A4888 (0xd << 2) | ||
114 | |||
115 | #define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5) | ||
116 | #define VIDINTCON0_FIFIOSEL_WINDOW3 (0x20 << 5) | ||
117 | #define VIDINTCON0_FIFIOSEL_WINDOW4 (0x40 << 5) | ||
118 | |||
119 | #define DITHMODE (0x170) | ||
120 | #define WINxMAP(_win) (0x180 + ((_win) * 4)) | ||
121 | |||
122 | |||
123 | #define DITHMODE_R_POS_MASK (0x3 << 5) | ||
124 | #define DITHMODE_R_POS_SHIFT (5) | ||
125 | #define DITHMODE_R_POS_8BIT (0x0 << 5) | ||
126 | #define DITHMODE_R_POS_6BIT (0x1 << 5) | ||
127 | #define DITHMODE_R_POS_5BIT (0x2 << 5) | ||
128 | |||
129 | #define DITHMODE_G_POS_MASK (0x3 << 3) | ||
130 | #define DITHMODE_G_POS_SHIFT (3) | ||
131 | #define DITHMODE_G_POS_8BIT (0x0 << 3) | ||
132 | #define DITHMODE_G_POS_6BIT (0x1 << 3) | ||
133 | #define DITHMODE_G_POS_5BIT (0x2 << 3) | ||
134 | |||
135 | #define DITHMODE_B_POS_MASK (0x3 << 1) | ||
136 | #define DITHMODE_B_POS_SHIFT (1) | ||
137 | #define DITHMODE_B_POS_8BIT (0x0 << 1) | ||
138 | #define DITHMODE_B_POS_6BIT (0x1 << 1) | ||
139 | #define DITHMODE_B_POS_5BIT (0x2 << 1) | ||
140 | |||
141 | #define DITHMODE_DITH_EN (1 << 0) | ||
142 | |||
143 | #define WPALCON (0x1A0) | ||
144 | |||
145 | #define WPALCON_W4PAL_16BPP_A555 (1 << 8) | ||
146 | #define WPALCON_W3PAL_16BPP_A555 (1 << 7) | ||
147 | #define WPALCON_W2PAL_16BPP_A555 (1 << 6) | ||
148 | |||
149 | /* Palette registers */ | ||
150 | |||
151 | #define WIN2_PAL(_entry) (0x300 + ((_entry) * 2)) | ||
152 | #define WIN3_PAL(_entry) (0x320 + ((_entry) * 2)) | ||
153 | #define WIN4_PAL(_entry) (0x340 + ((_entry) * 2)) | ||
154 | #define WIN0_PAL(_entry) (0x400 + ((_entry) * 4)) | ||
155 | #define WIN1_PAL(_entry) (0x800 + ((_entry) * 4)) | ||
156 | |||
157 | /* system specific implementation code for palette sizes, and other | ||
158 | * information that changes depending on which architecture is being | ||
159 | * compiled. | ||
160 | */ | ||
161 | |||
162 | /* return true if window _win has OSD register D */ | ||
163 | #define s3c_fb_has_osd_d(_win) ((_win) != 4 && (_win) != 0) | ||
164 | |||
165 | static inline unsigned int s3c_fb_win_pal_size(unsigned int win) | ||
166 | { | ||
167 | if (win < 2) | ||
168 | return 256; | ||
169 | if (win < 4) | ||
170 | return 16; | ||
171 | if (win == 4) | ||
172 | return 4; | ||
173 | |||
174 | BUG(); /* shouldn't get here */ | ||
175 | } | ||
176 | |||
177 | static inline int s3c_fb_validate_win_bpp(unsigned int win, unsigned int bpp) | ||
178 | { | ||
179 | /* all windows can do 1/2 bpp */ | ||
180 | |||
181 | if ((bpp == 25 || bpp == 19) && win == 0) | ||
182 | return 0; /* win 0 does not have 19 or 25bpp modes */ | ||
183 | |||
184 | if (bpp == 4 && win == 4) | ||
185 | return 0; | ||
186 | |||
187 | if (bpp == 8 && (win >= 3)) | ||
188 | return 0; /* win 3/4 cannot do 8bpp in any mode */ | ||
189 | |||
190 | return 1; | ||
191 | } | ||
192 | |||
193 | static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg) | ||
194 | { | ||
195 | switch (window) { | ||
196 | case 0: return WIN0_PAL(reg); | ||
197 | case 1: return WIN1_PAL(reg); | ||
198 | case 2: return WIN2_PAL(reg); | ||
199 | case 3: return WIN3_PAL(reg); | ||
200 | case 4: return WIN4_PAL(reg); | ||
201 | } | ||
202 | |||
203 | BUG(); | ||
204 | } | ||
205 | |||
206 | static inline int s3c_fb_pal_is16(unsigned int window) | ||
207 | { | ||
208 | return window > 1; | ||
209 | } | ||
210 | |||
211 | struct s3c_fb_palette { | ||
212 | struct fb_bitfield r; | ||
213 | struct fb_bitfield g; | ||
214 | struct fb_bitfield b; | ||
215 | struct fb_bitfield a; | ||
216 | }; | ||
217 | |||
218 | static inline void s3c_fb_init_palette(unsigned int window, | ||
219 | struct s3c_fb_palette *palette) | ||
220 | { | ||
221 | if (window < 2) { | ||
222 | /* Windows 0/1 are 8/8/8 or A/8/8/8 */ | ||
223 | palette->r.offset = 16; | ||
224 | palette->r.length = 8; | ||
225 | palette->g.offset = 8; | ||
226 | palette->g.length = 8; | ||
227 | palette->b.offset = 0; | ||
228 | palette->b.length = 8; | ||
229 | } else { | ||
230 | /* currently we assume RGB 5/6/5 */ | ||
231 | palette->r.offset = 11; | ||
232 | palette->r.length = 5; | ||
233 | palette->g.offset = 5; | ||
234 | palette->g.length = 6; | ||
235 | palette->b.offset = 0; | ||
236 | palette->b.length = 5; | ||
237 | } | ||
238 | } | ||
239 | |||
240 | /* Notes on per-window bpp settings | ||
241 | * | ||
242 | * Value Win0 Win1 Win2 Win3 Win 4 | ||
243 | * 0000 1(P) 1(P) 1(P) 1(P) 1(P) | ||
244 | * 0001 2(P) 2(P) 2(P) 2(P) 2(P) | ||
245 | * 0010 4(P) 4(P) 4(P) 4(P) -none- | ||
246 | * 0011 8(P) 8(P) -none- -none- -none- | ||
247 | * 0100 -none- 8(A232) 8(A232) -none- -none- | ||
248 | * 0101 16(565) 16(565) 16(565) 16(565) 16(565) | ||
249 | * 0110 -none- 16(A555) 16(A555) 16(A555) 16(A555) | ||
250 | * 0111 16(I555) 16(I565) 16(I555) 16(I555) 16(I555) | ||
251 | * 1000 18(666) 18(666) 18(666) 18(666) 18(666) | ||
252 | * 1001 -none- 18(A665) 18(A665) 18(A665) 16(A665) | ||
253 | * 1010 -none- 19(A666) 19(A666) 19(A666) 19(A666) | ||
254 | * 1011 24(888) 24(888) 24(888) 24(888) 24(888) | ||
255 | * 1100 -none- 24(A887) 24(A887) 24(A887) 24(A887) | ||
256 | * 1101 -none- 25(A888) 25(A888) 25(A888) 25(A888) | ||
257 | * 1110 -none- -none- -none- -none- -none- | ||
258 | * 1111 -none- -none- -none- -none- -none- | ||
259 | */ | ||
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-irq.h b/arch/arm/mach-s3c6400/include/mach/regs-irq.h new file mode 100644 index 000000000000..bcce68a0bb75 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/regs-irq.h | |||
@@ -0,0 +1,20 @@ | |||
1 | /* linux/arch/arm/mach-s3c6400/include/mach/regs-irq.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * S3C64XX - IRQ register definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifndef __ASM_ARCH_REGS_IRQ_H | ||
16 | #define __ASM_ARCH_REGS_IRQ_H __FILE__ | ||
17 | |||
18 | #include <asm/hardware/vic.h> | ||
19 | |||
20 | #endif /* __ASM_ARCH_6400_REGS_IRQ_H */ | ||
diff --git a/arch/arm/mach-s3c6400/include/mach/system.h b/arch/arm/mach-s3c6400/include/mach/system.h new file mode 100644 index 000000000000..652bbc403f0b --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/system.h | |||
@@ -0,0 +1,24 @@ | |||
1 | /* linux/arch/arm/mach-s3c6400/include/mach/system.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C6400 - system implementation | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_SYSTEM_H | ||
12 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
13 | |||
14 | static void arch_idle(void) | ||
15 | { | ||
16 | /* nothing here yet */ | ||
17 | } | ||
18 | |||
19 | static void arch_reset(char mode) | ||
20 | { | ||
21 | /* nothing here yet */ | ||
22 | } | ||
23 | |||
24 | #endif /* __ASM_ARCH_IRQ_H */ | ||
diff --git a/arch/arm/mach-s3c6400/include/mach/tick.h b/arch/arm/mach-s3c6400/include/mach/tick.h new file mode 100644 index 000000000000..d9c0dc7014ec --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/tick.h | |||
@@ -0,0 +1,29 @@ | |||
1 | /* linux/arch/arm/mach-s3c6400/include/mach/tick.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * S3C64XX - Timer tick support definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifndef __ASM_ARCH_TICK_H | ||
16 | #define __ASM_ARCH_TICK_H __FILE__ | ||
17 | |||
18 | /* note, the timer interrutps turn up in 2 places, the vic and then | ||
19 | * the timer block. We take the VIC as the base at the moment. | ||
20 | */ | ||
21 | static inline u32 s3c24xx_ostimer_pending(void) | ||
22 | { | ||
23 | u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS); | ||
24 | return pend & 1 << (IRQ_TIMER4_VIC - S3C64XX_IRQ_VIC0(0)); | ||
25 | } | ||
26 | |||
27 | #define TICK_MAX (0xffffffff) | ||
28 | |||
29 | #endif /* __ASM_ARCH_6400_TICK_H */ | ||
diff --git a/arch/arm/mach-s3c6400/include/mach/uncompress.h b/arch/arm/mach-s3c6400/include/mach/uncompress.h new file mode 100644 index 000000000000..c6a82a20bf2a --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/uncompress.h | |||
@@ -0,0 +1,28 @@ | |||
1 | /* arch/arm/mach-s3c6400/include/mach/uncompress.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * S3C6400 - uncompress code | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifndef __ASM_ARCH_UNCOMPRESS_H | ||
16 | #define __ASM_ARCH_UNCOMPRESS_H | ||
17 | |||
18 | #include <mach/map.h> | ||
19 | #include <plat/uncompress.h> | ||
20 | |||
21 | static void arch_detect_cpu(void) | ||
22 | { | ||
23 | /* we do not need to do any cpu detection here at the moment. */ | ||
24 | fifo_mask = S3C2440_UFSTAT_TXMASK; | ||
25 | fifo_max = 63 << S3C2440_UFSTAT_TXSHIFT; | ||
26 | } | ||
27 | |||
28 | #endif /* __ASM_ARCH_UNCOMPRESS_H */ | ||