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-rw-r--r--arch/arm/mach-s3c24xx/clock-s3c2416.c3
-rw-r--r--arch/arm/mach-s3c24xx/clock-s3c2440.c2
-rw-r--r--arch/arm/mach-s3c24xx/clock-s3c2443.c2
-rw-r--r--arch/arm/mach-s3c24xx/common-s3c2443.c4
-rw-r--r--arch/arm/mach-s3c24xx/common-smdk.c20
-rw-r--r--arch/arm/mach-s3c24xx/common.c1
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/bast-pmu.h40
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h21
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/gta02.h69
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/regs-gpio.h17
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/regs-gpioj.h70
-rw-r--r--arch/arm/mach-s3c24xx/mach-gta02.c1
-rw-r--r--arch/arm/mach-s3c24xx/mach-mini2440.c4
-rw-r--r--arch/arm/mach-s3c24xx/mach-qt2410.c6
-rw-r--r--arch/arm/mach-s3c24xx/mach-rx1950.c1
-rw-r--r--arch/arm/mach-s3c24xx/pm-s3c2410.c12
-rw-r--r--arch/arm/mach-s3c24xx/pm-s3c2412.c1
-rw-r--r--arch/arm/mach-s3c24xx/s3c2412.c1
-rw-r--r--arch/arm/mach-s3c24xx/s3c244x.c1
-rw-r--r--arch/arm/mach-s3c24xx/setup-spi.c10
-rw-r--r--arch/arm/mach-s3c24xx/setup-ts.c6
21 files changed, 47 insertions, 245 deletions
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2416.c b/arch/arm/mach-s3c24xx/clock-s3c2416.c
index 8702ecfaab30..14a81c2317a4 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2416.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2416.c
@@ -144,7 +144,8 @@ static struct clk_lookup s3c2416_clk_lookup[] = {
144 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &hsmmc0_clk), 144 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &hsmmc0_clk),
145 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &hsmmc_mux0.clk), 145 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &hsmmc_mux0.clk),
146 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &hsmmc_mux1.clk), 146 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &hsmmc_mux1.clk),
147 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &hsspi_mux.clk), 147 /* s3c2443-spi.0 is used on s3c2416 and s3c2450 as well */
148 CLKDEV_INIT("s3c2443-spi.0", "spi_busclk2", &hsspi_mux.clk),
148}; 149};
149 150
150void __init s3c2416_init_clocks(int xtal) 151void __init s3c2416_init_clocks(int xtal)
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c
index 414364eb426c..cb2883d553b5 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2440.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c
@@ -106,7 +106,7 @@ static struct clk s3c2440_clk_cam_upll = {
106static struct clk s3c2440_clk_ac97 = { 106static struct clk s3c2440_clk_ac97 = {
107 .name = "ac97", 107 .name = "ac97",
108 .enable = s3c2410_clkcon_enable, 108 .enable = s3c2410_clkcon_enable,
109 .ctrlbit = S3C2440_CLKCON_CAMERA, 109 .ctrlbit = S3C2440_CLKCON_AC97,
110}; 110};
111 111
112static unsigned long s3c2440_fclk_n_getrate(struct clk *clk) 112static unsigned long s3c2440_fclk_n_getrate(struct clk *clk)
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c b/arch/arm/mach-s3c24xx/clock-s3c2443.c
index a4c5a520d994..7f689ce1be61 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2443.c
@@ -181,7 +181,7 @@ static struct clk *clks[] __initdata = {
181 181
182static struct clk_lookup s3c2443_clk_lookup[] = { 182static struct clk_lookup s3c2443_clk_lookup[] = {
183 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_hsmmc), 183 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_hsmmc),
184 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &clk_hsspi.clk), 184 CLKDEV_INIT("s3c2443-spi.0", "spi_busclk2", &clk_hsspi.clk),
185}; 185};
186 186
187void __init s3c2443_init_clocks(int xtal) 187void __init s3c2443_init_clocks(int xtal)
diff --git a/arch/arm/mach-s3c24xx/common-s3c2443.c b/arch/arm/mach-s3c24xx/common-s3c2443.c
index aeeb2be283fa..aeb4a24ff3ed 100644
--- a/arch/arm/mach-s3c24xx/common-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/common-s3c2443.c
@@ -559,7 +559,7 @@ static struct clk hsmmc1_clk = {
559 559
560static struct clk hsspi_clk = { 560static struct clk hsspi_clk = {
561 .name = "spi", 561 .name = "spi",
562 .devname = "s3c64xx-spi.0", 562 .devname = "s3c2443-spi.0",
563 .parent = &clk_p, 563 .parent = &clk_p,
564 .enable = s3c2443_clkcon_enable_p, 564 .enable = s3c2443_clkcon_enable_p,
565 .ctrlbit = S3C2443_PCLKCON_HSSPI, 565 .ctrlbit = S3C2443_PCLKCON_HSSPI,
@@ -633,7 +633,7 @@ static struct clk_lookup s3c2443_clk_lookup[] = {
633 CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p), 633 CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
634 CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_esys_uart.clk), 634 CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_esys_uart.clk),
635 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &hsmmc1_clk), 635 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &hsmmc1_clk),
636 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk0", &hsspi_clk), 636 CLKDEV_INIT("s3c2443-spi.0", "spi_busclk0", &hsspi_clk),
637}; 637};
638 638
639void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, 639void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll,
diff --git a/arch/arm/mach-s3c24xx/common-smdk.c b/arch/arm/mach-s3c24xx/common-smdk.c
index 084604be6ad1..87e75a250d5e 100644
--- a/arch/arm/mach-s3c24xx/common-smdk.c
+++ b/arch/arm/mach-s3c24xx/common-smdk.c
@@ -182,19 +182,21 @@ static struct platform_device __initdata *smdk_devs[] = {
182 &smdk_led7, 182 &smdk_led7,
183}; 183};
184 184
185static const struct gpio smdk_led_gpios[] = {
186 { S3C2410_GPF(4), GPIOF_OUT_INIT_HIGH, NULL },
187 { S3C2410_GPF(5), GPIOF_OUT_INIT_HIGH, NULL },
188 { S3C2410_GPF(6), GPIOF_OUT_INIT_HIGH, NULL },
189 { S3C2410_GPF(7), GPIOF_OUT_INIT_HIGH, NULL },
190};
191
185void __init smdk_machine_init(void) 192void __init smdk_machine_init(void)
186{ 193{
187 /* Configure the LEDs (even if we have no LED support)*/ 194 /* Configure the LEDs (even if we have no LED support)*/
188 195
189 s3c_gpio_cfgpin(S3C2410_GPF(4), S3C2410_GPIO_OUTPUT); 196 int ret = gpio_request_array(smdk_led_gpios,
190 s3c_gpio_cfgpin(S3C2410_GPF(5), S3C2410_GPIO_OUTPUT); 197 ARRAY_SIZE(smdk_led_gpios));
191 s3c_gpio_cfgpin(S3C2410_GPF(6), S3C2410_GPIO_OUTPUT); 198 if (!WARN_ON(ret < 0))
192 s3c_gpio_cfgpin(S3C2410_GPF(7), S3C2410_GPIO_OUTPUT); 199 gpio_free_array(smdk_led_gpios, ARRAY_SIZE(smdk_led_gpios));
193
194 s3c2410_gpio_setpin(S3C2410_GPF(4), 1);
195 s3c2410_gpio_setpin(S3C2410_GPF(5), 1);
196 s3c2410_gpio_setpin(S3C2410_GPF(6), 1);
197 s3c2410_gpio_setpin(S3C2410_GPF(7), 1);
198 200
199 if (machine_is_smdk2443()) 201 if (machine_is_smdk2443())
200 smdk_nand_info.twrph0 = 50; 202 smdk_nand_info.twrph0 = 50;
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index 56cdd34cce41..0c9e9a785ef6 100644
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -41,7 +41,6 @@
41#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
42#include <asm/mach/map.h> 42#include <asm/mach/map.h>
43 43
44#include <mach/regs-clock.h>
45#include <mach/regs-gpio.h> 44#include <mach/regs-gpio.h>
46#include <plat/regs-serial.h> 45#include <plat/regs-serial.h>
47 46
diff --git a/arch/arm/mach-s3c24xx/include/mach/bast-pmu.h b/arch/arm/mach-s3c24xx/include/mach/bast-pmu.h
deleted file mode 100644
index 4c38b39b741d..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/bast-pmu.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/bast-pmu.h
2 *
3 * Copyright (c) 2003-2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * Vincent Sanders <vince@simtec.co.uk>
6 *
7 * Machine BAST - Power Management chip
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __ASM_ARCH_BASTPMU_H
15#define __ASM_ARCH_BASTPMU_H "08_OCT_2004"
16
17#define BASTPMU_REG_IDENT (0x00)
18#define BASTPMU_REG_VERSION (0x01)
19#define BASTPMU_REG_DDCCTRL (0x02)
20#define BASTPMU_REG_POWER (0x03)
21#define BASTPMU_REG_RESET (0x04)
22#define BASTPMU_REG_GWO (0x05)
23#define BASTPMU_REG_WOL (0x06)
24#define BASTPMU_REG_WOR (0x07)
25#define BASTPMU_REG_UID (0x09)
26
27#define BASTPMU_EEPROM (0xC0)
28
29#define BASTPMU_EEP_UID (BASTPMU_EEPROM + 0)
30#define BASTPMU_EEP_WOL (BASTPMU_EEPROM + 8)
31#define BASTPMU_EEP_WOR (BASTPMU_EEPROM + 9)
32
33#define BASTPMU_IDENT_0 0x53
34#define BASTPMU_IDENT_1 0x42
35#define BASTPMU_IDENT_2 0x50
36#define BASTPMU_IDENT_3 0x4d
37
38#define BASTPMU_RESET_GUARD (0x55)
39
40#endif /* __ASM_ARCH_BASTPMU_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h b/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h
index 019ea86057f6..3890a05948fb 100644
--- a/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h
+++ b/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h
@@ -93,26 +93,5 @@ enum s3c_gpio_number {
93#define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr)) 93#define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr))
94#define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr)) 94#define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr))
95 95
96/* compatibility until drivers can be modified */
97
98#define S3C2410_GPA0 S3C2410_GPA(0)
99#define S3C2410_GPA1 S3C2410_GPA(1)
100#define S3C2410_GPA3 S3C2410_GPA(3)
101#define S3C2410_GPA7 S3C2410_GPA(7)
102
103#define S3C2410_GPE0 S3C2410_GPE(0)
104#define S3C2410_GPE1 S3C2410_GPE(1)
105#define S3C2410_GPE2 S3C2410_GPE(2)
106#define S3C2410_GPE3 S3C2410_GPE(3)
107#define S3C2410_GPE4 S3C2410_GPE(4)
108#define S3C2410_GPE5 S3C2410_GPE(5)
109#define S3C2410_GPE6 S3C2410_GPE(6)
110#define S3C2410_GPE7 S3C2410_GPE(7)
111#define S3C2410_GPE8 S3C2410_GPE(8)
112#define S3C2410_GPE9 S3C2410_GPE(9)
113#define S3C2410_GPE10 S3C2410_GPE(10)
114
115#define S3C2410_GPH10 S3C2410_GPH(10)
116
117#endif /* __MACH_GPIONRS_H */ 96#endif /* __MACH_GPIONRS_H */
118 97
diff --git a/arch/arm/mach-s3c24xx/include/mach/gta02.h b/arch/arm/mach-s3c24xx/include/mach/gta02.h
index 3a56a229cac6..217393482153 100644
--- a/arch/arm/mach-s3c24xx/include/mach/gta02.h
+++ b/arch/arm/mach-s3c24xx/include/mach/gta02.h
@@ -3,82 +3,13 @@
3 3
4#include <mach/regs-gpio.h> 4#include <mach/regs-gpio.h>
5 5
6/* Different hardware revisions, passed in ATAG_REVISION by u-boot */
7#define GTA02v1_SYSTEM_REV 0x00000310
8#define GTA02v2_SYSTEM_REV 0x00000320
9#define GTA02v3_SYSTEM_REV 0x00000330
10#define GTA02v4_SYSTEM_REV 0x00000340
11#define GTA02v5_SYSTEM_REV 0x00000350
12/* since A7 is basically same as A6, we use A6 PCB ID */
13#define GTA02v6_SYSTEM_REV 0x00000360
14
15#define GTA02_GPIO_n3DL_GSM S3C2410_GPA(13) /* v1 + v2 + v3 only */
16
17#define GTA02_GPIO_PWR_LED1 S3C2410_GPB(0)
18#define GTA02_GPIO_PWR_LED2 S3C2410_GPB(1)
19#define GTA02_GPIO_AUX_LED S3C2410_GPB(2) 6#define GTA02_GPIO_AUX_LED S3C2410_GPB(2)
20#define GTA02_GPIO_VIBRATOR_ON S3C2410_GPB(3)
21#define GTA02_GPIO_MODEM_RST S3C2410_GPB(5)
22#define GTA02_GPIO_BT_EN S3C2410_GPB(6)
23#define GTA02_GPIO_MODEM_ON S3C2410_GPB(7)
24#define GTA02_GPIO_EXTINT8 S3C2410_GPB(8)
25#define GTA02_GPIO_USB_PULLUP S3C2410_GPB(9) 7#define GTA02_GPIO_USB_PULLUP S3C2410_GPB(9)
26
27#define GTA02_GPIO_PIO5 S3C2410_GPC(5) /* v3 + v4 only */
28
29#define GTA02v3_GPIO_nG1_CS S3C2410_GPD(12) /* v3 + v4 only */
30#define GTA02v3_GPIO_nG2_CS S3C2410_GPD(13) /* v3 + v4 only */
31#define GTA02v5_GPIO_HDQ S3C2410_GPD(14) /* v5 + */
32
33#define GTA02_GPIO_nG1_INT S3C2410_GPF(0)
34#define GTA02_GPIO_IO1 S3C2410_GPF(1)
35#define GTA02_GPIO_PIO_2 S3C2410_GPF(2) /* v2 + v3 + v4 only */
36#define GTA02_GPIO_JACK_INSERT S3C2410_GPF(4)
37#define GTA02_GPIO_WLAN_GPIO1 S3C2410_GPF(5) /* v2 + v3 + v4 only */
38#define GTA02_GPIO_AUX_KEY S3C2410_GPF(6) 8#define GTA02_GPIO_AUX_KEY S3C2410_GPF(6)
39#define GTA02_GPIO_HOLD_KEY S3C2410_GPF(7) 9#define GTA02_GPIO_HOLD_KEY S3C2410_GPF(7)
40
41#define GTA02_GPIO_3D_IRQ S3C2410_GPG(4)
42#define GTA02v2_GPIO_nG2_INT S3C2410_GPG(8) /* v2 + v3 + v4 only */
43#define GTA02v3_GPIO_nUSB_OC S3C2410_GPG(9) /* v3 + v4 only */
44#define GTA02v3_GPIO_nUSB_FLT S3C2410_GPG(10) /* v3 + v4 only */
45#define GTA02v3_GPIO_nGSM_OC S3C2410_GPG(11) /* v3 + v4 only */
46
47#define GTA02_GPIO_AMP_SHUT S3C2410_GPJ(1) /* v2 + v3 + v4 only */ 10#define GTA02_GPIO_AMP_SHUT S3C2410_GPJ(1) /* v2 + v3 + v4 only */
48#define GTA02v1_GPIO_WLAN_GPIO10 S3C2410_GPJ(2)
49#define GTA02_GPIO_HP_IN S3C2410_GPJ(2) /* v2 + v3 + v4 only */ 11#define GTA02_GPIO_HP_IN S3C2410_GPJ(2) /* v2 + v3 + v4 only */
50#define GTA02_GPIO_INT0 S3C2410_GPJ(3) /* v2 + v3 + v4 only */
51#define GTA02_GPIO_nGSM_EN S3C2410_GPJ(4)
52#define GTA02_GPIO_3D_RESET S3C2410_GPJ(5)
53#define GTA02_GPIO_nDL_GSM S3C2410_GPJ(6) /* v4 + v5 only */
54#define GTA02_GPIO_WLAN_GPIO0 S3C2410_GPJ(7)
55#define GTA02v1_GPIO_BAT_ID S3C2410_GPJ(8)
56#define GTA02_GPIO_KEEPACT S3C2410_GPJ(8)
57#define GTA02v1_GPIO_HP_IN S3C2410_GPJ(10)
58#define GTA02_CHIP_PWD S3C2410_GPJ(11) /* v2 + v3 + v4 only */
59#define GTA02_GPIO_nWLAN_RESET S3C2410_GPJ(12) /* v2 + v3 + v4 only */
60 12
61#define GTA02_IRQ_GSENSOR_1 IRQ_EINT0
62#define GTA02_IRQ_MODEM IRQ_EINT1
63#define GTA02_IRQ_PIO_2 IRQ_EINT2 /* v2 + v3 + v4 only */
64#define GTA02_IRQ_nJACK_INSERT IRQ_EINT4
65#define GTA02_IRQ_WLAN_GPIO1 IRQ_EINT5
66#define GTA02_IRQ_AUX IRQ_EINT6
67#define GTA02_IRQ_nHOLD IRQ_EINT7
68#define GTA02_IRQ_PCF50633 IRQ_EINT9 13#define GTA02_IRQ_PCF50633 IRQ_EINT9
69#define GTA02_IRQ_3D IRQ_EINT12
70#define GTA02_IRQ_GSENSOR_2 IRQ_EINT16 /* v2 + v3 + v4 only */
71#define GTA02v3_IRQ_nUSB_OC IRQ_EINT17 /* v3 + v4 only */
72#define GTA02v3_IRQ_nUSB_FLT IRQ_EINT18 /* v3 + v4 only */
73#define GTA02v3_IRQ_nGSM_OC IRQ_EINT19 /* v3 + v4 only */
74
75/* returns 00 000 on GTA02 A5 and earlier, A6 returns 01 001 */
76#define GTA02_PCB_ID1_0 S3C2410_GPC(13)
77#define GTA02_PCB_ID1_1 S3C2410_GPC(15)
78#define GTA02_PCB_ID1_2 S3C2410_GPD(0)
79#define GTA02_PCB_ID2_0 S3C2410_GPD(3)
80#define GTA02_PCB_ID2_1 S3C2410_GPD(4)
81
82int gta02_get_pcb_revision(void);
83 14
84#endif /* _GTA02_H */ 15#endif /* _GTA02_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h
index cac1ad6b582c..a11a638bd599 100644
--- a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h
@@ -302,7 +302,7 @@
302/* S3C2410: 302/* S3C2410:
303 * Port G consists of 8 GPIO/IRQ/Special function 303 * Port G consists of 8 GPIO/IRQ/Special function
304 * 304 *
305 * GPGCON has 2 bits for each of the input pins on port F 305 * GPGCON has 2 bits for each of the input pins on port G
306 * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func 306 * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func
307 * 307 *
308 * pull up works like all other ports. 308 * pull up works like all other ports.
@@ -366,7 +366,7 @@
366 366
367/* Port H consists of11 GPIO/serial/Misc pins 367/* Port H consists of11 GPIO/serial/Misc pins
368 * 368 *
369 * GPGCON has 2 bits for each of the input pins on port F 369 * GPHCON has 2 bits for each of the input pins on port H
370 * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func 370 * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func
371 * 371 *
372 * pull up works like all other ports. 372 * pull up works like all other ports.
@@ -427,6 +427,19 @@
427 * for the 2412/2413 from the 2410/2440/2442 427 * for the 2412/2413 from the 2410/2440/2442
428*/ 428*/
429 429
430/*
431 * Port J consists of 13 GPIO/Camera pins. GPJCON has 2 bits
432 * for each of the pins on port J.
433 * 00 - input, 01 output, 10 - camera
434 *
435 * Pull up works like all other ports.
436 */
437
438#define S3C2413_GPJCON S3C2410_GPIOREG(0x80)
439#define S3C2413_GPJDAT S3C2410_GPIOREG(0x84)
440#define S3C2413_GPJUP S3C2410_GPIOREG(0x88)
441#define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C)
442
430/* S3C2443 and above */ 443/* S3C2443 and above */
431#define S3C2440_GPJCON S3C2410_GPIOREG(0xD0) 444#define S3C2440_GPJCON S3C2410_GPIOREG(0xD0)
432#define S3C2440_GPJDAT S3C2410_GPIOREG(0xD4) 445#define S3C2440_GPJDAT S3C2410_GPIOREG(0xD4)
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-gpioj.h b/arch/arm/mach-s3c24xx/include/mach/regs-gpioj.h
deleted file mode 100644
index 19575e061114..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/regs-gpioj.h
+++ /dev/null
@@ -1,70 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-gpioj.h
2 *
3 * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>
4 * http://www.simtec.co.uk/products/SWLINUX/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * S3C2440 GPIO J register definitions
11*/
12
13
14#ifndef __ASM_ARCH_REGS_GPIOJ_H
15#define __ASM_ARCH_REGS_GPIOJ_H "gpioj"
16
17/* Port J consists of 13 GPIO/Camera pins
18 *
19 * GPJCON has 2 bits for each of the input pins on port F
20 * 00 = 0 input, 1 output, 2 Camera
21 *
22 * pull up works like all other ports.
23*/
24
25#define S3C2413_GPJCON S3C2410_GPIOREG(0x80)
26#define S3C2413_GPJDAT S3C2410_GPIOREG(0x84)
27#define S3C2413_GPJUP S3C2410_GPIOREG(0x88)
28#define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C)
29
30#define S3C2440_GPJ0_OUTP (0x01 << 0)
31#define S3C2440_GPJ0_CAMDATA0 (0x02 << 0)
32
33#define S3C2440_GPJ1_OUTP (0x01 << 2)
34#define S3C2440_GPJ1_CAMDATA1 (0x02 << 2)
35
36#define S3C2440_GPJ2_OUTP (0x01 << 4)
37#define S3C2440_GPJ2_CAMDATA2 (0x02 << 4)
38
39#define S3C2440_GPJ3_OUTP (0x01 << 6)
40#define S3C2440_GPJ3_CAMDATA3 (0x02 << 6)
41
42#define S3C2440_GPJ4_OUTP (0x01 << 8)
43#define S3C2440_GPJ4_CAMDATA4 (0x02 << 8)
44
45#define S3C2440_GPJ5_OUTP (0x01 << 10)
46#define S3C2440_GPJ5_CAMDATA5 (0x02 << 10)
47
48#define S3C2440_GPJ6_OUTP (0x01 << 12)
49#define S3C2440_GPJ6_CAMDATA6 (0x02 << 12)
50
51#define S3C2440_GPJ7_OUTP (0x01 << 14)
52#define S3C2440_GPJ7_CAMDATA7 (0x02 << 14)
53
54#define S3C2440_GPJ8_OUTP (0x01 << 16)
55#define S3C2440_GPJ8_CAMPCLK (0x02 << 16)
56
57#define S3C2440_GPJ9_OUTP (0x01 << 18)
58#define S3C2440_GPJ9_CAMVSYNC (0x02 << 18)
59
60#define S3C2440_GPJ10_OUTP (0x01 << 20)
61#define S3C2440_GPJ10_CAMHREF (0x02 << 20)
62
63#define S3C2440_GPJ11_OUTP (0x01 << 22)
64#define S3C2440_GPJ11_CAMCLKOUT (0x02 << 22)
65
66#define S3C2440_GPJ12_OUTP (0x01 << 24)
67#define S3C2440_GPJ12_CAMRESET (0x02 << 24)
68
69#endif /* __ASM_ARCH_REGS_GPIOJ_H */
70
diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c
index 0f29f64a3eeb..92e1f93a6bca 100644
--- a/arch/arm/mach-s3c24xx/mach-gta02.c
+++ b/arch/arm/mach-s3c24xx/mach-gta02.c
@@ -71,7 +71,6 @@
71 71
72#include <mach/regs-irq.h> 72#include <mach/regs-irq.h>
73#include <mach/regs-gpio.h> 73#include <mach/regs-gpio.h>
74#include <mach/regs-gpioj.h>
75#include <mach/fb.h> 74#include <mach/fb.h>
76 75
77#include <plat/usb-control.h> 76#include <plat/usb-control.h>
diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c
index f092b188ab70..bd6d2525debe 100644
--- a/arch/arm/mach-s3c24xx/mach-mini2440.c
+++ b/arch/arm/mach-s3c24xx/mach-mini2440.c
@@ -634,8 +634,8 @@ static void __init mini2440_init(void)
634 s3c_gpio_cfgpin(S3C2410_GPC(0), S3C2410_GPC0_LEND); 634 s3c_gpio_cfgpin(S3C2410_GPC(0), S3C2410_GPC0_LEND);
635 635
636 /* Turn the backlight early on */ 636 /* Turn the backlight early on */
637 WARN_ON(gpio_request(S3C2410_GPG(4), "backlight")); 637 WARN_ON(gpio_request_one(S3C2410_GPG(4), GPIOF_OUT_INIT_HIGH, NULL));
638 gpio_direction_output(S3C2410_GPG(4), 1); 638 gpio_free(S3C2410_GPG(4));
639 639
640 /* remove pullup on optional PWM backlight -- unused on 3.5 and 7"s */ 640 /* remove pullup on optional PWM backlight -- unused on 3.5 and 7"s */
641 s3c_gpio_setpull(S3C2410_GPB(1), S3C_GPIO_PULL_UP); 641 s3c_gpio_setpull(S3C2410_GPB(1), S3C_GPIO_PULL_UP);
diff --git a/arch/arm/mach-s3c24xx/mach-qt2410.c b/arch/arm/mach-s3c24xx/mach-qt2410.c
index b868dddcb836..678bbca2b5e5 100644
--- a/arch/arm/mach-s3c24xx/mach-qt2410.c
+++ b/arch/arm/mach-s3c24xx/mach-qt2410.c
@@ -47,7 +47,6 @@
47#include <asm/irq.h> 47#include <asm/irq.h>
48#include <asm/mach-types.h> 48#include <asm/mach-types.h>
49 49
50#include <mach/regs-gpio.h>
51#include <mach/leds-gpio.h> 50#include <mach/leds-gpio.h>
52#include <mach/regs-lcd.h> 51#include <mach/regs-lcd.h>
53#include <plat/regs-serial.h> 52#include <plat/regs-serial.h>
@@ -325,8 +324,9 @@ static void __init qt2410_machine_init(void)
325 } 324 }
326 s3c24xx_fb_set_platdata(&qt2410_fb_info); 325 s3c24xx_fb_set_platdata(&qt2410_fb_info);
327 326
328 s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPIO_OUTPUT); 327 /* set initial state of the LED GPIO */
329 s3c2410_gpio_setpin(S3C2410_GPB(0), 1); 328 WARN_ON(gpio_request_one(S3C2410_GPB(0), GPIOF_OUT_INIT_HIGH, NULL));
329 gpio_free(S3C2410_GPB(0));
330 330
331 s3c24xx_udc_set_platdata(&qt2410_udc_cfg); 331 s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
332 s3c_i2c0_set_platdata(NULL); 332 s3c_i2c0_set_platdata(NULL);
diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c
index a6762aae4727..7ee73f27f207 100644
--- a/arch/arm/mach-s3c24xx/mach-rx1950.c
+++ b/arch/arm/mach-s3c24xx/mach-rx1950.c
@@ -42,7 +42,6 @@
42#include <asm/mach-types.h> 42#include <asm/mach-types.h>
43 43
44#include <mach/regs-gpio.h> 44#include <mach/regs-gpio.h>
45#include <mach/regs-gpioj.h>
46#include <mach/regs-lcd.h> 45#include <mach/regs-lcd.h>
47#include <mach/h1940.h> 46#include <mach/h1940.h>
48#include <mach/fb.h> 47#include <mach/fb.h>
diff --git a/arch/arm/mach-s3c24xx/pm-s3c2410.c b/arch/arm/mach-s3c24xx/pm-s3c2410.c
index 03f706dd6009..949ae05e07c5 100644
--- a/arch/arm/mach-s3c24xx/pm-s3c2410.c
+++ b/arch/arm/mach-s3c24xx/pm-s3c2410.c
@@ -77,8 +77,10 @@ static void s3c2410_pm_prepare(void)
77 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM)); 77 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
78 } 78 }
79 79
80 if ( machine_is_aml_m5900() ) 80 if (machine_is_aml_m5900()) {
81 s3c2410_gpio_setpin(S3C2410_GPF(2), 1); 81 gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_HIGH, NULL);
82 gpio_free(S3C2410_GPF(2));
83 }
82 84
83 if (machine_is_rx1950()) { 85 if (machine_is_rx1950()) {
84 /* According to S3C2442 user's manual, page 7-17, 86 /* According to S3C2442 user's manual, page 7-17,
@@ -103,8 +105,10 @@ static void s3c2410_pm_resume(void)
103 tmp &= S3C2410_GSTATUS2_OFFRESET; 105 tmp &= S3C2410_GSTATUS2_OFFRESET;
104 __raw_writel(tmp, S3C2410_GSTATUS2); 106 __raw_writel(tmp, S3C2410_GSTATUS2);
105 107
106 if ( machine_is_aml_m5900() ) 108 if (machine_is_aml_m5900()) {
107 s3c2410_gpio_setpin(S3C2410_GPF(2), 0); 109 gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_LOW, NULL);
110 gpio_free(S3C2410_GPF(2));
111 }
108} 112}
109 113
110struct syscore_ops s3c2410_pm_syscore_ops = { 114struct syscore_ops s3c2410_pm_syscore_ops = {
diff --git a/arch/arm/mach-s3c24xx/pm-s3c2412.c b/arch/arm/mach-s3c24xx/pm-s3c2412.c
index d04588506ec4..c60f67a75aff 100644
--- a/arch/arm/mach-s3c24xx/pm-s3c2412.c
+++ b/arch/arm/mach-s3c24xx/pm-s3c2412.c
@@ -26,7 +26,6 @@
26#include <asm/irq.h> 26#include <asm/irq.h>
27 27
28#include <mach/regs-power.h> 28#include <mach/regs-power.h>
29#include <mach/regs-gpioj.h>
30#include <mach/regs-gpio.h> 29#include <mach/regs-gpio.h>
31#include <mach/regs-dsc.h> 30#include <mach/regs-dsc.h>
32 31
diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c
index d4bc7f960bbb..6c5f4031ff0c 100644
--- a/arch/arm/mach-s3c24xx/s3c2412.c
+++ b/arch/arm/mach-s3c24xx/s3c2412.c
@@ -39,7 +39,6 @@
39#include <plat/regs-serial.h> 39#include <plat/regs-serial.h>
40#include <mach/regs-power.h> 40#include <mach/regs-power.h>
41#include <mach/regs-gpio.h> 41#include <mach/regs-gpio.h>
42#include <mach/regs-gpioj.h>
43#include <mach/regs-dsc.h> 42#include <mach/regs-dsc.h>
44#include <plat/regs-spi.h> 43#include <plat/regs-spi.h>
45#include <mach/regs-s3c2412.h> 44#include <mach/regs-s3c2412.h>
diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c
index 6f74118f60c6..b0b60a1154d6 100644
--- a/arch/arm/mach-s3c24xx/s3c244x.c
+++ b/arch/arm/mach-s3c24xx/s3c244x.c
@@ -36,7 +36,6 @@
36#include <mach/regs-clock.h> 36#include <mach/regs-clock.h>
37#include <plat/regs-serial.h> 37#include <plat/regs-serial.h>
38#include <mach/regs-gpio.h> 38#include <mach/regs-gpio.h>
39#include <mach/regs-gpioj.h>
40#include <mach/regs-dsc.h> 39#include <mach/regs-dsc.h>
41 40
42#include <plat/s3c2410.h> 41#include <plat/s3c2410.h>
diff --git a/arch/arm/mach-s3c24xx/setup-spi.c b/arch/arm/mach-s3c24xx/setup-spi.c
index 5712c85f39b1..3d47e023ce94 100644
--- a/arch/arm/mach-s3c24xx/setup-spi.c
+++ b/arch/arm/mach-s3c24xx/setup-spi.c
@@ -13,20 +13,12 @@
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14 14
15#include <plat/gpio-cfg.h> 15#include <plat/gpio-cfg.h>
16#include <plat/s3c64xx-spi.h>
17 16
18#include <mach/hardware.h> 17#include <mach/hardware.h>
19#include <mach/regs-gpio.h> 18#include <mach/regs-gpio.h>
20 19
21#ifdef CONFIG_S3C64XX_DEV_SPI0 20#ifdef CONFIG_S3C64XX_DEV_SPI0
22struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = { 21int s3c64xx_spi0_cfg_gpio(void)
23 .fifo_lvl_mask = 0x7f,
24 .rx_lvl_offset = 13,
25 .tx_st_done = 21,
26 .high_speed = 1,
27};
28
29int s3c64xx_spi0_cfg_gpio(struct platform_device *pdev)
30{ 22{
31 /* enable hsspi bit in misccr */ 23 /* enable hsspi bit in misccr */
32 s3c2410_modify_misccr(S3C2416_MISCCR_HSSPI_EN2, 1); 24 s3c2410_modify_misccr(S3C2416_MISCCR_HSSPI_EN2, 1);
diff --git a/arch/arm/mach-s3c24xx/setup-ts.c b/arch/arm/mach-s3c24xx/setup-ts.c
index ed2638663675..4e11affce3a8 100644
--- a/arch/arm/mach-s3c24xx/setup-ts.c
+++ b/arch/arm/mach-s3c24xx/setup-ts.c
@@ -16,7 +16,6 @@
16struct platform_device; /* don't need the contents */ 16struct platform_device; /* don't need the contents */
17 17
18#include <mach/hardware.h> 18#include <mach/hardware.h>
19#include <mach/regs-gpio.h>
20 19
21/** 20/**
22 * s3c24xx_ts_cfg_gpio - configure gpio for s3c2410 systems 21 * s3c24xx_ts_cfg_gpio - configure gpio for s3c2410 systems
@@ -27,8 +26,5 @@ struct platform_device; /* don't need the contents */
27 */ 26 */
28void s3c24xx_ts_cfg_gpio(struct platform_device *dev) 27void s3c24xx_ts_cfg_gpio(struct platform_device *dev)
29{ 28{
30 s3c2410_gpio_cfgpin(S3C2410_GPG(12), S3C2410_GPG12_XMON); 29 s3c_gpio_cfgpin_range(S3C2410_GPG(12), 4, S3C_GPIO_SFN(3));
31 s3c2410_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPG13_nXPON);
32 s3c2410_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPG14_YMON);
33 s3c2410_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPG15_nYPON);
34} 30}