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Diffstat (limited to 'arch/arm/mach-s3c24xx/s3c244x.c')
-rw-r--r--arch/arm/mach-s3c24xx/s3c244x.c59
1 files changed, 2 insertions, 57 deletions
diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c
index fe30ebb234d2..4a64bcc9eb51 100644
--- a/arch/arm/mach-s3c24xx/s3c244x.c
+++ b/arch/arm/mach-s3c24xx/s3c244x.c
@@ -46,6 +46,7 @@
46#include <plat/nand-core.h> 46#include <plat/nand-core.h>
47#include <plat/watchdog-reset.h> 47#include <plat/watchdog-reset.h>
48 48
49#include "common.h"
49#include "regs-dsc.h" 50#include "regs-dsc.h"
50 51
51static struct map_desc s3c244x_iodesc[] __initdata = { 52static struct map_desc s3c244x_iodesc[] __initdata = {
@@ -74,67 +75,11 @@ void __init s3c244x_map_io(void)
74 s3c_nand_setname("s3c2440-nand"); 75 s3c_nand_setname("s3c2440-nand");
75 s3c_device_ts.name = "s3c2440-ts"; 76 s3c_device_ts.name = "s3c2440-ts";
76 s3c_device_usbgadget.name = "s3c2440-usbgadget"; 77 s3c_device_usbgadget.name = "s3c2440-usbgadget";
78 s3c2410_device_dclk.name = "s3c2440-dclk";
77} 79}
78 80
79void __init_or_cpufreq s3c244x_setup_clocks(void) 81void __init_or_cpufreq s3c244x_setup_clocks(void)
80{ 82{
81 struct clk *xtal_clk;
82 unsigned long clkdiv;
83 unsigned long camdiv;
84 unsigned long xtal;
85 unsigned long hclk, fclk, pclk;
86 int hdiv = 1;
87
88 xtal_clk = clk_get(NULL, "xtal");
89 xtal = clk_get_rate(xtal_clk);
90 clk_put(xtal_clk);
91
92 fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
93
94 clkdiv = __raw_readl(S3C2410_CLKDIVN);
95 camdiv = __raw_readl(S3C2440_CAMDIVN);
96
97 /* work out clock scalings */
98
99 switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
100 case S3C2440_CLKDIVN_HDIVN_1:
101 hdiv = 1;
102 break;
103
104 case S3C2440_CLKDIVN_HDIVN_2:
105 hdiv = 2;
106 break;
107
108 case S3C2440_CLKDIVN_HDIVN_4_8:
109 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
110 break;
111
112 case S3C2440_CLKDIVN_HDIVN_3_6:
113 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
114 break;
115 }
116
117 hclk = fclk / hdiv;
118 pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN) ? 2 : 1);
119
120 /* print brief summary of clocks, etc */
121
122 printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
123 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
124
125 s3c24xx_setup_clocks(fclk, hclk, pclk);
126}
127
128void __init s3c244x_init_clocks(int xtal)
129{
130 /* initialise the clocks here, to allow other things like the
131 * console to use them, and to add new ones after the initialisation
132 */
133
134 s3c24xx_register_baseclocks(xtal);
135 s3c244x_setup_clocks();
136 s3c2410_baseclk_add();
137 samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG);
138} 83}
139 84
140/* Since the S3C2442 and S3C2440 share items, put both subsystems here */ 85/* Since the S3C2442 and S3C2440 share items, put both subsystems here */