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Diffstat (limited to 'arch/arm/mach-s3c24xx/s3c2410.c')
-rw-r--r--arch/arm/mach-s3c24xx/s3c2410.c56
1 files changed, 0 insertions, 56 deletions
diff --git a/arch/arm/mach-s3c24xx/s3c2410.c b/arch/arm/mach-s3c24xx/s3c2410.c
index 04b58cb49888..7eab88829883 100644
--- a/arch/arm/mach-s3c24xx/s3c2410.c
+++ b/arch/arm/mach-s3c24xx/s3c2410.c
@@ -85,62 +85,6 @@ void __init s3c2410_map_io(void)
85 85
86void __init_or_cpufreq s3c2410_setup_clocks(void) 86void __init_or_cpufreq s3c2410_setup_clocks(void)
87{ 87{
88 struct clk *xtal_clk;
89 unsigned long tmp;
90 unsigned long xtal;
91 unsigned long fclk;
92 unsigned long hclk;
93 unsigned long pclk;
94
95 xtal_clk = clk_get(NULL, "xtal");
96 xtal = clk_get_rate(xtal_clk);
97 clk_put(xtal_clk);
98
99 /* now we've got our machine bits initialised, work out what
100 * clocks we've got */
101
102 fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal);
103
104 tmp = __raw_readl(S3C2410_CLKDIVN);
105
106 /* work out clock scalings */
107
108 hclk = fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1);
109 pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1);
110
111 /* print brieft summary of clocks, etc */
112
113 printk("S3C2410: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
114 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
115
116 /* initialise the clocks here, to allow other things like the
117 * console to use them
118 */
119
120 s3c24xx_setup_clocks(fclk, hclk, pclk);
121}
122
123/* fake ARMCLK for use with cpufreq, etc. */
124
125static struct clk s3c2410_armclk = {
126 .name = "armclk",
127 .parent = &clk_f,
128 .id = -1,
129};
130
131static struct clk_lookup s3c2410_clk_lookup[] = {
132 CLKDEV_INIT(NULL, "clk_uart_baud0", &clk_p),
133 CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
134};
135
136void __init s3c2410_init_clocks(int xtal)
137{
138 s3c24xx_register_baseclocks(xtal);
139 s3c2410_setup_clocks();
140 s3c2410_baseclk_add();
141 s3c24xx_register_clock(&s3c2410_armclk);
142 clkdev_add_table(s3c2410_clk_lookup, ARRAY_SIZE(s3c2410_clk_lookup));
143 samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG);
144} 88}
145 89
146struct bus_type s3c2410_subsys = { 90struct bus_type s3c2410_subsys = {