aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s3c2440/mach-rx3715.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-s3c2440/mach-rx3715.c')
-rw-r--r--arch/arm/mach-s3c2440/mach-rx3715.c72
1 files changed, 27 insertions, 45 deletions
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index b59e6d39f2f2..bac40c4878a5 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -110,28 +110,32 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
110 110
111/* framebuffer lcd controller information */ 111/* framebuffer lcd controller information */
112 112
113static struct s3c2410fb_mach_info rx3715_lcdcfg __initdata = { 113static struct s3c2410fb_display rx3715_lcdcfg __initdata = {
114 .regs = { 114 .lcdcon5 = S3C2410_LCDCON5_INVVLINE |
115 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP | \ 115 S3C2410_LCDCON5_FRM565 |
116 S3C2410_LCDCON1_TFT | \ 116 S3C2410_LCDCON5_HWSWP,
117 S3C2410_LCDCON1_CLKVAL(0x0C), 117
118 118 .type = S3C2410_LCDCON1_TFT,
119 .lcdcon2 = S3C2410_LCDCON2_VBPD(5) | \ 119 .width = 240,
120 S3C2410_LCDCON2_LINEVAL(319) | \ 120 .height = 320,
121 S3C2410_LCDCON2_VFPD(6) | \ 121
122 S3C2410_LCDCON2_VSPW(2), 122 .pixclock = 260000,
123 123 .xres = 240,
124 .lcdcon3 = S3C2410_LCDCON3_HBPD(35) | \ 124 .yres = 320,
125 S3C2410_LCDCON3_HOZVAL(239) | \ 125 .bpp = 16,
126 S3C2410_LCDCON3_HFPD(35), 126 .left_margin = 36,
127 127 .right_margin = 36,
128 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) | \ 128 .hsync_len = 8,
129 S3C2410_LCDCON4_HSPW(7), 129 .upper_margin = 6,
130 130 .lower_margin = 7,
131 .lcdcon5 = S3C2410_LCDCON5_INVVLINE | 131 .vsync_len = 3,
132 S3C2410_LCDCON5_FRM565 | 132};
133 S3C2410_LCDCON5_HWSWP, 133
134 }, 134static struct s3c2410fb_mach_info rx3715_fb_info __initdata = {
135
136 .displays = &rx3715_lcdcfg,
137 .num_displays = 1,
138 .default_display = 0,
135 139
136 .lpcsel = 0xf82, 140 .lpcsel = 0xf82,
137 141
@@ -144,28 +148,6 @@ static struct s3c2410fb_mach_info rx3715_lcdcfg __initdata = {
144 .gpdcon_mask = 0xffc0fff0, 148 .gpdcon_mask = 0xffc0fff0,
145 .gpdup = 0x0000faff, 149 .gpdup = 0x0000faff,
146 .gpdup_mask = 0xffffffff, 150 .gpdup_mask = 0xffffffff,
147
148 .fixed_syncs = 1,
149 .width = 240,
150 .height = 320,
151
152 .xres = {
153 .min = 240,
154 .max = 240,
155 .defval = 240,
156 },
157
158 .yres = {
159 .max = 320,
160 .min = 320,
161 .defval = 320,
162 },
163
164 .bpp = {
165 .min = 16,
166 .max = 16,
167 .defval = 16,
168 },
169}; 151};
170 152
171static struct mtd_partition rx3715_nand_part[] = { 153static struct mtd_partition rx3715_nand_part[] = {
@@ -224,7 +206,7 @@ static void __init rx3715_init_machine(void)
224#endif 206#endif
225 s3c2410_pm_init(); 207 s3c2410_pm_init();
226 208
227 s3c24xx_fb_set_platdata(&rx3715_lcdcfg); 209 s3c24xx_fb_set_platdata(&rx3715_fb_info);
228 platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices)); 210 platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices));
229} 211}
230 212