diff options
Diffstat (limited to 'arch/arm/mach-s3c2440/mach-osiris.c')
-rw-r--r-- | arch/arm/mach-s3c2440/mach-osiris.c | 24 |
1 files changed, 3 insertions, 21 deletions
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index e795715fba30..4c480ef734f6 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c | |||
@@ -102,21 +102,6 @@ static struct map_desc osiris_iodesc[] __initdata = { | |||
102 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | 102 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
103 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | 103 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
104 | 104 | ||
105 | static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = { | ||
106 | [0] = { | ||
107 | .name = "uclk", | ||
108 | .divisor = 1, | ||
109 | .min_baud = 0, | ||
110 | .max_baud = 0, | ||
111 | }, | ||
112 | [1] = { | ||
113 | .name = "pclk", | ||
114 | .divisor = 1, | ||
115 | .min_baud = 0, | ||
116 | .max_baud = 0, | ||
117 | } | ||
118 | }; | ||
119 | |||
120 | static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { | 105 | static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { |
121 | [0] = { | 106 | [0] = { |
122 | .hwport = 0, | 107 | .hwport = 0, |
@@ -124,8 +109,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { | |||
124 | .ucon = UCON, | 109 | .ucon = UCON, |
125 | .ulcon = ULCON, | 110 | .ulcon = ULCON, |
126 | .ufcon = UFCON, | 111 | .ufcon = UFCON, |
127 | .clocks = osiris_serial_clocks, | 112 | .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, |
128 | .clocks_size = ARRAY_SIZE(osiris_serial_clocks), | ||
129 | }, | 113 | }, |
130 | [1] = { | 114 | [1] = { |
131 | .hwport = 1, | 115 | .hwport = 1, |
@@ -133,8 +117,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { | |||
133 | .ucon = UCON, | 117 | .ucon = UCON, |
134 | .ulcon = ULCON, | 118 | .ulcon = ULCON, |
135 | .ufcon = UFCON, | 119 | .ufcon = UFCON, |
136 | .clocks = osiris_serial_clocks, | 120 | .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, |
137 | .clocks_size = ARRAY_SIZE(osiris_serial_clocks), | ||
138 | }, | 121 | }, |
139 | [2] = { | 122 | [2] = { |
140 | .hwport = 2, | 123 | .hwport = 2, |
@@ -142,8 +125,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { | |||
142 | .ucon = UCON, | 125 | .ucon = UCON, |
143 | .ulcon = ULCON, | 126 | .ulcon = ULCON, |
144 | .ufcon = UFCON, | 127 | .ufcon = UFCON, |
145 | .clocks = osiris_serial_clocks, | 128 | .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2, |
146 | .clocks_size = ARRAY_SIZE(osiris_serial_clocks), | ||
147 | } | 129 | } |
148 | }; | 130 | }; |
149 | 131 | ||