diff options
Diffstat (limited to 'arch/arm/mach-s3c2440/dma.c')
| -rw-r--r-- | arch/arm/mach-s3c2440/dma.c | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c index 3b0529f54e9c..0e73f8f9d132 100644 --- a/arch/arm/mach-s3c2440/dma.c +++ b/arch/arm/mach-s3c2440/dma.c | |||
| @@ -48,38 +48,26 @@ static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = { | |||
| 48 | .channels[1] = S3C2440_DCON_CH1_SDI | DMA_CH_VALID, | 48 | .channels[1] = S3C2440_DCON_CH1_SDI | DMA_CH_VALID, |
| 49 | .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID, | 49 | .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID, |
| 50 | .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID, | 50 | .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID, |
| 51 | .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO, | ||
| 52 | .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO, | ||
| 53 | }, | 51 | }, |
| 54 | [DMACH_SPI0] = { | 52 | [DMACH_SPI0] = { |
| 55 | .name = "spi0", | 53 | .name = "spi0", |
| 56 | .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID, | 54 | .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID, |
| 57 | .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT, | ||
| 58 | .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT, | ||
| 59 | }, | 55 | }, |
| 60 | [DMACH_SPI1] = { | 56 | [DMACH_SPI1] = { |
| 61 | .name = "spi1", | 57 | .name = "spi1", |
| 62 | .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID, | 58 | .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID, |
| 63 | .hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT, | ||
| 64 | .hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT, | ||
| 65 | }, | 59 | }, |
| 66 | [DMACH_UART0] = { | 60 | [DMACH_UART0] = { |
| 67 | .name = "uart0", | 61 | .name = "uart0", |
| 68 | .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID, | 62 | .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID, |
| 69 | .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH, | ||
| 70 | .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH, | ||
| 71 | }, | 63 | }, |
| 72 | [DMACH_UART1] = { | 64 | [DMACH_UART1] = { |
| 73 | .name = "uart1", | 65 | .name = "uart1", |
| 74 | .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID, | 66 | .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID, |
| 75 | .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH, | ||
| 76 | .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH, | ||
| 77 | }, | 67 | }, |
| 78 | [DMACH_UART2] = { | 68 | [DMACH_UART2] = { |
| 79 | .name = "uart2", | 69 | .name = "uart2", |
| 80 | .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID, | 70 | .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID, |
| 81 | .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH, | ||
| 82 | .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH, | ||
| 83 | }, | 71 | }, |
| 84 | [DMACH_TIMER] = { | 72 | [DMACH_TIMER] = { |
| 85 | .name = "timer", | 73 | .name = "timer", |
| @@ -91,31 +79,26 @@ static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = { | |||
| 91 | .name = "i2s-sdi", | 79 | .name = "i2s-sdi", |
| 92 | .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID, | 80 | .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID, |
| 93 | .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID, | 81 | .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID, |
| 94 | .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO, | ||
| 95 | }, | 82 | }, |
| 96 | [DMACH_I2S_OUT] = { | 83 | [DMACH_I2S_OUT] = { |
| 97 | .name = "i2s-sdo", | 84 | .name = "i2s-sdo", |
| 98 | .channels[0] = S3C2440_DCON_CH0_I2SSDO | DMA_CH_VALID, | 85 | .channels[0] = S3C2440_DCON_CH0_I2SSDO | DMA_CH_VALID, |
| 99 | .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID, | 86 | .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID, |
| 100 | .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO, | ||
| 101 | }, | 87 | }, |
| 102 | [DMACH_PCM_IN] = { | 88 | [DMACH_PCM_IN] = { |
| 103 | .name = "pcm-in", | 89 | .name = "pcm-in", |
| 104 | .channels[0] = S3C2440_DCON_CH0_PCMIN | DMA_CH_VALID, | 90 | .channels[0] = S3C2440_DCON_CH0_PCMIN | DMA_CH_VALID, |
| 105 | .channels[2] = S3C2440_DCON_CH2_PCMIN | DMA_CH_VALID, | 91 | .channels[2] = S3C2440_DCON_CH2_PCMIN | DMA_CH_VALID, |
| 106 | .hw_addr.from = S3C2440_PA_AC97 + S3C_AC97_PCM_DATA, | ||
| 107 | }, | 92 | }, |
| 108 | [DMACH_PCM_OUT] = { | 93 | [DMACH_PCM_OUT] = { |
| 109 | .name = "pcm-out", | 94 | .name = "pcm-out", |
| 110 | .channels[1] = S3C2440_DCON_CH1_PCMOUT | DMA_CH_VALID, | 95 | .channels[1] = S3C2440_DCON_CH1_PCMOUT | DMA_CH_VALID, |
| 111 | .channels[3] = S3C2440_DCON_CH3_PCMOUT | DMA_CH_VALID, | 96 | .channels[3] = S3C2440_DCON_CH3_PCMOUT | DMA_CH_VALID, |
| 112 | .hw_addr.to = S3C2440_PA_AC97 + S3C_AC97_PCM_DATA, | ||
| 113 | }, | 97 | }, |
| 114 | [DMACH_MIC_IN] = { | 98 | [DMACH_MIC_IN] = { |
| 115 | .name = "mic-in", | 99 | .name = "mic-in", |
| 116 | .channels[2] = S3C2440_DCON_CH2_MICIN | DMA_CH_VALID, | 100 | .channels[2] = S3C2440_DCON_CH2_MICIN | DMA_CH_VALID, |
| 117 | .channels[3] = S3C2440_DCON_CH3_MICIN | DMA_CH_VALID, | 101 | .channels[3] = S3C2440_DCON_CH3_MICIN | DMA_CH_VALID, |
| 118 | .hw_addr.from = S3C2440_PA_AC97 + S3C_AC97_MIC_DATA, | ||
| 119 | }, | 102 | }, |
| 120 | [DMACH_USB_EP1] = { | 103 | [DMACH_USB_EP1] = { |
| 121 | .name = "usb-ep1", | 104 | .name = "usb-ep1", |