aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s3c2416
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-s3c2416')
-rw-r--r--arch/arm/mach-s3c2416/clock.c18
1 files changed, 13 insertions, 5 deletions
diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c
index 7ccf5a2a2bfc..3b02d8506e25 100644
--- a/arch/arm/mach-s3c2416/clock.c
+++ b/arch/arm/mach-s3c2416/clock.c
@@ -38,12 +38,11 @@ static unsigned int armdiv[8] = {
38 [7] = 8, 38 [7] = 8,
39}; 39};
40 40
41/* ID to hardware numbering, 0 is HSMMC1, 1 is HSMMC0 */
42static struct clksrc_clk hsmmc_div[] = { 41static struct clksrc_clk hsmmc_div[] = {
43 [0] = { 42 [0] = {
44 .clk = { 43 .clk = {
45 .name = "hsmmc-div", 44 .name = "hsmmc-div",
46 .id = 1, 45 .id = 0,
47 .parent = &clk_esysclk.clk, 46 .parent = &clk_esysclk.clk,
48 }, 47 },
49 .reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 }, 48 .reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 },
@@ -51,7 +50,7 @@ static struct clksrc_clk hsmmc_div[] = {
51 [1] = { 50 [1] = {
52 .clk = { 51 .clk = {
53 .name = "hsmmc-div", 52 .name = "hsmmc-div",
54 .id = 0, 53 .id = 1,
55 .parent = &clk_esysclk.clk, 54 .parent = &clk_esysclk.clk,
56 }, 55 },
57 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 }, 56 .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
@@ -61,7 +60,7 @@ static struct clksrc_clk hsmmc_div[] = {
61static struct clksrc_clk hsmmc_mux[] = { 60static struct clksrc_clk hsmmc_mux[] = {
62 [0] = { 61 [0] = {
63 .clk = { 62 .clk = {
64 .id = 1, 63 .id = 0,
65 .name = "hsmmc-if", 64 .name = "hsmmc-if",
66 .ctrlbit = (1 << 6), 65 .ctrlbit = (1 << 6),
67 .enable = s3c2443_clkcon_enable_s, 66 .enable = s3c2443_clkcon_enable_s,
@@ -77,7 +76,7 @@ static struct clksrc_clk hsmmc_mux[] = {
77 }, 76 },
78 [1] = { 77 [1] = {
79 .clk = { 78 .clk = {
80 .id = 0, 79 .id = 1,
81 .name = "hsmmc-if", 80 .name = "hsmmc-if",
82 .ctrlbit = (1 << 12), 81 .ctrlbit = (1 << 12),
83 .enable = s3c2443_clkcon_enable_s, 82 .enable = s3c2443_clkcon_enable_s,
@@ -93,6 +92,13 @@ static struct clksrc_clk hsmmc_mux[] = {
93 }, 92 },
94}; 93};
95 94
95static struct clk hsmmc0_clk = {
96 .name = "hsmmc",
97 .id = 0,
98 .parent = &clk_h,
99 .enable = s3c2443_clkcon_enable_h,
100 .ctrlbit = S3C2416_HCLKCON_HSMMC0,
101};
96 102
97static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0) 103static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0)
98{ 104{
@@ -130,6 +136,8 @@ void __init s3c2416_init_clocks(int xtal)
130 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) 136 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
131 s3c_register_clksrc(clksrcs[ptr], 1); 137 s3c_register_clksrc(clksrcs[ptr], 1);
132 138
139 s3c24xx_register_clock(&hsmmc0_clk);
140
133 s3c_pwmclk_init(); 141 s3c_pwmclk_init();
134 142
135} 143}