diff options
Diffstat (limited to 'arch/arm/mach-s3c2412/clock.c')
-rw-r--r-- | arch/arm/mach-s3c2412/clock.c | 52 |
1 files changed, 33 insertions, 19 deletions
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c index a037df5e1c2d..0c0505b025cb 100644 --- a/arch/arm/mach-s3c2412/clock.c +++ b/arch/arm/mach-s3c2412/clock.c | |||
@@ -124,7 +124,9 @@ static struct clk clk_usysclk = { | |||
124 | .name = "usysclk", | 124 | .name = "usysclk", |
125 | .id = -1, | 125 | .id = -1, |
126 | .parent = &clk_xtal, | 126 | .parent = &clk_xtal, |
127 | .set_parent = s3c2412_setparent_usysclk, | 127 | .ops = &(struct clk_ops) { |
128 | .set_parent = s3c2412_setparent_usysclk, | ||
129 | }, | ||
128 | }; | 130 | }; |
129 | 131 | ||
130 | static struct clk clk_mrefclk = { | 132 | static struct clk clk_mrefclk = { |
@@ -199,10 +201,12 @@ static int s3c2412_setrate_usbsrc(struct clk *clk, unsigned long rate) | |||
199 | static struct clk clk_usbsrc = { | 201 | static struct clk clk_usbsrc = { |
200 | .name = "usbsrc", | 202 | .name = "usbsrc", |
201 | .id = -1, | 203 | .id = -1, |
202 | .get_rate = s3c2412_getrate_usbsrc, | 204 | .ops = &(struct clk_ops) { |
203 | .set_rate = s3c2412_setrate_usbsrc, | 205 | .get_rate = s3c2412_getrate_usbsrc, |
204 | .round_rate = s3c2412_roundrate_usbsrc, | 206 | .set_rate = s3c2412_setrate_usbsrc, |
205 | .set_parent = s3c2412_setparent_usbsrc, | 207 | .round_rate = s3c2412_roundrate_usbsrc, |
208 | .set_parent = s3c2412_setparent_usbsrc, | ||
209 | }, | ||
206 | }; | 210 | }; |
207 | 211 | ||
208 | static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent) | 212 | static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent) |
@@ -225,7 +229,9 @@ static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent) | |||
225 | static struct clk clk_msysclk = { | 229 | static struct clk clk_msysclk = { |
226 | .name = "msysclk", | 230 | .name = "msysclk", |
227 | .id = -1, | 231 | .id = -1, |
228 | .set_parent = s3c2412_setparent_msysclk, | 232 | .ops = &(struct clk_ops) { |
233 | .set_parent = s3c2412_setparent_msysclk, | ||
234 | }, | ||
229 | }; | 235 | }; |
230 | 236 | ||
231 | static int s3c2412_setparent_armclk(struct clk *clk, struct clk *parent) | 237 | static int s3c2412_setparent_armclk(struct clk *clk, struct clk *parent) |
@@ -264,7 +270,9 @@ static struct clk clk_armclk = { | |||
264 | .name = "armclk", | 270 | .name = "armclk", |
265 | .id = -1, | 271 | .id = -1, |
266 | .parent = &clk_msysclk, | 272 | .parent = &clk_msysclk, |
267 | .set_parent = s3c2412_setparent_armclk, | 273 | .ops = &(struct clk_ops) { |
274 | .set_parent = s3c2412_setparent_armclk, | ||
275 | }, | ||
268 | }; | 276 | }; |
269 | 277 | ||
270 | /* these next clocks have an divider immediately after them, | 278 | /* these next clocks have an divider immediately after them, |
@@ -337,10 +345,12 @@ static int s3c2412_setrate_uart(struct clk *clk, unsigned long rate) | |||
337 | static struct clk clk_uart = { | 345 | static struct clk clk_uart = { |
338 | .name = "uartclk", | 346 | .name = "uartclk", |
339 | .id = -1, | 347 | .id = -1, |
340 | .get_rate = s3c2412_getrate_uart, | 348 | .ops = &(struct clk_ops) { |
341 | .set_rate = s3c2412_setrate_uart, | 349 | .get_rate = s3c2412_getrate_uart, |
342 | .set_parent = s3c2412_setparent_uart, | 350 | .set_rate = s3c2412_setrate_uart, |
343 | .round_rate = s3c2412_roundrate_clksrc, | 351 | .set_parent = s3c2412_setparent_uart, |
352 | .round_rate = s3c2412_roundrate_clksrc, | ||
353 | }, | ||
344 | }; | 354 | }; |
345 | 355 | ||
346 | static int s3c2412_setparent_i2s(struct clk *clk, struct clk *parent) | 356 | static int s3c2412_setparent_i2s(struct clk *clk, struct clk *parent) |
@@ -388,10 +398,12 @@ static int s3c2412_setrate_i2s(struct clk *clk, unsigned long rate) | |||
388 | static struct clk clk_i2s = { | 398 | static struct clk clk_i2s = { |
389 | .name = "i2sclk", | 399 | .name = "i2sclk", |
390 | .id = -1, | 400 | .id = -1, |
391 | .get_rate = s3c2412_getrate_i2s, | 401 | .ops = &(struct clk_ops) { |
392 | .set_rate = s3c2412_setrate_i2s, | 402 | .get_rate = s3c2412_getrate_i2s, |
393 | .set_parent = s3c2412_setparent_i2s, | 403 | .set_rate = s3c2412_setrate_i2s, |
394 | .round_rate = s3c2412_roundrate_clksrc, | 404 | .set_parent = s3c2412_setparent_i2s, |
405 | .round_rate = s3c2412_roundrate_clksrc, | ||
406 | }, | ||
395 | }; | 407 | }; |
396 | 408 | ||
397 | static int s3c2412_setparent_cam(struct clk *clk, struct clk *parent) | 409 | static int s3c2412_setparent_cam(struct clk *clk, struct clk *parent) |
@@ -438,10 +450,12 @@ static int s3c2412_setrate_cam(struct clk *clk, unsigned long rate) | |||
438 | static struct clk clk_cam = { | 450 | static struct clk clk_cam = { |
439 | .name = "camif-upll", /* same as 2440 name */ | 451 | .name = "camif-upll", /* same as 2440 name */ |
440 | .id = -1, | 452 | .id = -1, |
441 | .get_rate = s3c2412_getrate_cam, | 453 | .ops = &(struct clk_ops) { |
442 | .set_rate = s3c2412_setrate_cam, | 454 | .get_rate = s3c2412_getrate_cam, |
443 | .set_parent = s3c2412_setparent_cam, | 455 | .set_rate = s3c2412_setrate_cam, |
444 | .round_rate = s3c2412_roundrate_clksrc, | 456 | .set_parent = s3c2412_setparent_cam, |
457 | .round_rate = s3c2412_roundrate_clksrc, | ||
458 | }, | ||
445 | }; | 459 | }; |
446 | 460 | ||
447 | /* standard clock definitions */ | 461 | /* standard clock definitions */ |