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-rw-r--r--arch/arm/mach-s3c2410/bast-irq.c2
-rw-r--r--arch/arm/mach-s3c2410/irq.c22
-rw-r--r--arch/arm/mach-s3c2410/pm.c6
-rw-r--r--arch/arm/mach-s3c2410/s3c2440-irq.c8
4 files changed, 20 insertions, 18 deletions
diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c
index 5e5bbe893cbb..49914709fa09 100644
--- a/arch/arm/mach-s3c2410/bast-irq.c
+++ b/arch/arm/mach-s3c2410/bast-irq.c
@@ -124,7 +124,7 @@ bast_irq_pc104_demux(unsigned int irq,
124 irqno = bast_pc104_irqs[i]; 124 irqno = bast_pc104_irqs[i];
125 desc = irq_desc + irqno; 125 desc = irq_desc + irqno;
126 126
127 desc->handle(irqno, desc, regs); 127 desc_handle_irq(irqno, desc, regs);
128 } 128 }
129 129
130 stat >>= 1; 130 stat >>= 1;
diff --git a/arch/arm/mach-s3c2410/irq.c b/arch/arm/mach-s3c2410/irq.c
index 973a5fe6769c..66d8c068e940 100644
--- a/arch/arm/mach-s3c2410/irq.c
+++ b/arch/arm/mach-s3c2410/irq.c
@@ -184,14 +184,14 @@ struct irqchip s3c_irq_level_chip = {
184 .ack = s3c_irq_maskack, 184 .ack = s3c_irq_maskack,
185 .mask = s3c_irq_mask, 185 .mask = s3c_irq_mask,
186 .unmask = s3c_irq_unmask, 186 .unmask = s3c_irq_unmask,
187 .wake = s3c_irq_wake 187 .set_wake = s3c_irq_wake
188}; 188};
189 189
190static struct irqchip s3c_irq_chip = { 190static struct irqchip s3c_irq_chip = {
191 .ack = s3c_irq_ack, 191 .ack = s3c_irq_ack,
192 .mask = s3c_irq_mask, 192 .mask = s3c_irq_mask,
193 .unmask = s3c_irq_unmask, 193 .unmask = s3c_irq_unmask,
194 .wake = s3c_irq_wake 194 .set_wake = s3c_irq_wake
195}; 195};
196 196
197/* S3C2410_EINTMASK 197/* S3C2410_EINTMASK
@@ -350,16 +350,16 @@ static struct irqchip s3c_irqext_chip = {
350 .mask = s3c_irqext_mask, 350 .mask = s3c_irqext_mask,
351 .unmask = s3c_irqext_unmask, 351 .unmask = s3c_irqext_unmask,
352 .ack = s3c_irqext_ack, 352 .ack = s3c_irqext_ack,
353 .type = s3c_irqext_type, 353 .set_type = s3c_irqext_type,
354 .wake = s3c_irqext_wake 354 .set_wake = s3c_irqext_wake
355}; 355};
356 356
357static struct irqchip s3c_irq_eint0t4 = { 357static struct irqchip s3c_irq_eint0t4 = {
358 .ack = s3c_irq_ack, 358 .ack = s3c_irq_ack,
359 .mask = s3c_irq_mask, 359 .mask = s3c_irq_mask,
360 .unmask = s3c_irq_unmask, 360 .unmask = s3c_irq_unmask,
361 .wake = s3c_irq_wake, 361 .set_wake = s3c_irq_wake,
362 .type = s3c_irqext_type, 362 .set_type = s3c_irqext_type,
363}; 363};
364 364
365/* mask values for the parent registers for each of the interrupt types */ 365/* mask values for the parent registers for each of the interrupt types */
@@ -496,11 +496,11 @@ static void s3c_irq_demux_adc(unsigned int irq,
496 if (subsrc != 0) { 496 if (subsrc != 0) {
497 if (subsrc & 1) { 497 if (subsrc & 1) {
498 mydesc = irq_desc + IRQ_TC; 498 mydesc = irq_desc + IRQ_TC;
499 mydesc->handle( IRQ_TC, mydesc, regs); 499 desc_handle_irq(IRQ_TC, mydesc, regs);
500 } 500 }
501 if (subsrc & 2) { 501 if (subsrc & 2) {
502 mydesc = irq_desc + IRQ_ADC; 502 mydesc = irq_desc + IRQ_ADC;
503 mydesc->handle(IRQ_ADC, mydesc, regs); 503 desc_handle_irq(IRQ_ADC, mydesc, regs);
504 } 504 }
505 } 505 }
506} 506}
@@ -529,17 +529,17 @@ static void s3c_irq_demux_uart(unsigned int start,
529 desc = irq_desc + start; 529 desc = irq_desc + start;
530 530
531 if (subsrc & 1) 531 if (subsrc & 1)
532 desc->handle(start, desc, regs); 532 desc_handle_irq(start, desc, regs);
533 533
534 desc++; 534 desc++;
535 535
536 if (subsrc & 2) 536 if (subsrc & 2)
537 desc->handle(start+1, desc, regs); 537 desc_handle_irq(start+1, desc, regs);
538 538
539 desc++; 539 desc++;
540 540
541 if (subsrc & 4) 541 if (subsrc & 4)
542 desc->handle(start+2, desc, regs); 542 desc_handle_irq(start+2, desc, regs);
543 } 543 }
544} 544}
545 545
diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c
index 13a48ee77484..fe57d966a34d 100644
--- a/arch/arm/mach-s3c2410/pm.c
+++ b/arch/arm/mach-s3c2410/pm.c
@@ -585,14 +585,16 @@ static int s3c2410_pm_enter(suspend_state_t state)
585 585
586 s3c2410_pm_check_store(); 586 s3c2410_pm_check_store();
587 587
588 // need to make some form of time-delta
589
590 /* send the cpu to sleep... */ 588 /* send the cpu to sleep... */
591 589
592 __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */ 590 __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */
593 591
594 s3c2410_cpu_suspend(regs_save); 592 s3c2410_cpu_suspend(regs_save);
595 593
594 /* restore the cpu state */
595
596 cpu_init();
597
596 /* unset the return-from-sleep flag, to ensure reset */ 598 /* unset the return-from-sleep flag, to ensure reset */
597 599
598 tmp = __raw_readl(S3C2410_GSTATUS2); 600 tmp = __raw_readl(S3C2410_GSTATUS2);
diff --git a/arch/arm/mach-s3c2410/s3c2440-irq.c b/arch/arm/mach-s3c2410/s3c2440-irq.c
index 7cb9912242a3..278d0044c85d 100644
--- a/arch/arm/mach-s3c2410/s3c2440-irq.c
+++ b/arch/arm/mach-s3c2410/s3c2440-irq.c
@@ -64,11 +64,11 @@ static void s3c_irq_demux_wdtac97(unsigned int irq,
64 if (subsrc != 0) { 64 if (subsrc != 0) {
65 if (subsrc & 1) { 65 if (subsrc & 1) {
66 mydesc = irq_desc + IRQ_S3C2440_WDT; 66 mydesc = irq_desc + IRQ_S3C2440_WDT;
67 mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs); 67 desc_handle_irq(IRQ_S3C2440_WDT, mydesc, regs);
68 } 68 }
69 if (subsrc & 2) { 69 if (subsrc & 2) {
70 mydesc = irq_desc + IRQ_S3C2440_AC97; 70 mydesc = irq_desc + IRQ_S3C2440_AC97;
71 mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs); 71 desc_handle_irq(IRQ_S3C2440_AC97, mydesc, regs);
72 } 72 }
73 } 73 }
74} 74}
@@ -122,11 +122,11 @@ static void s3c_irq_demux_cam(unsigned int irq,
122 if (subsrc != 0) { 122 if (subsrc != 0) {
123 if (subsrc & 1) { 123 if (subsrc & 1) {
124 mydesc = irq_desc + IRQ_S3C2440_CAM_C; 124 mydesc = irq_desc + IRQ_S3C2440_CAM_C;
125 mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs); 125 desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc, regs);
126 } 126 }
127 if (subsrc & 2) { 127 if (subsrc & 2) {
128 mydesc = irq_desc + IRQ_S3C2440_CAM_P; 128 mydesc = irq_desc + IRQ_S3C2440_CAM_P;
129 mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs); 129 desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc, regs);
130 } 130 }
131 } 131 }
132} 132}