diff options
Diffstat (limited to 'arch/arm/mach-s3c2410')
-rw-r--r-- | arch/arm/mach-s3c2410/Kconfig | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/dma.c | 14 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/gpio.c | 72 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/include/mach/map.h | 52 |
5 files changed, 46 insertions, 99 deletions
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig index 7245a55795dc..3700cf32af0f 100644 --- a/arch/arm/mach-s3c2410/Kconfig +++ b/arch/arm/mach-s3c2410/Kconfig | |||
@@ -8,7 +8,6 @@ config CPU_S3C2410 | |||
8 | select CPU_ARM920T | 8 | select CPU_ARM920T |
9 | select S3C_GPIO_PULL_UP | 9 | select S3C_GPIO_PULL_UP |
10 | select S3C2410_CLOCK | 10 | select S3C2410_CLOCK |
11 | select S3C2410_GPIO | ||
12 | select CPU_LLSERIAL_S3C2410 | 11 | select CPU_LLSERIAL_S3C2410 |
13 | select S3C2410_PM if PM | 12 | select S3C2410_PM if PM |
14 | select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX | 13 | select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX |
@@ -28,11 +27,6 @@ config S3C2410_PM | |||
28 | help | 27 | help |
29 | Power Management code common to S3C2410 and better | 28 | Power Management code common to S3C2410 and better |
30 | 29 | ||
31 | config S3C2410_GPIO | ||
32 | bool | ||
33 | help | ||
34 | GPIO code for S3C2410 and similar processors | ||
35 | |||
36 | config SIMTEC_NOR | 30 | config SIMTEC_NOR |
37 | bool | 31 | bool |
38 | help | 32 | help |
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile index 81695353d8f4..782fd81144e9 100644 --- a/arch/arm/mach-s3c2410/Makefile +++ b/arch/arm/mach-s3c2410/Makefile | |||
@@ -13,7 +13,6 @@ obj-$(CONFIG_CPU_S3C2410) += s3c2410.o | |||
13 | obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o | 13 | obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o |
14 | obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o | 14 | obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o |
15 | obj-$(CONFIG_S3C2410_PM) += pm.o sleep.o | 15 | obj-$(CONFIG_S3C2410_PM) += pm.o sleep.o |
16 | obj-$(CONFIG_S3C2410_GPIO) += gpio.o | ||
17 | obj-$(CONFIG_S3C2410_CPUFREQ) += cpu-freq.o | 16 | obj-$(CONFIG_S3C2410_CPUFREQ) += cpu-freq.o |
18 | obj-$(CONFIG_S3C2410_PLLTABLE) += pll.o | 17 | obj-$(CONFIG_S3C2410_PLLTABLE) += pll.o |
19 | 18 | ||
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c index 0d8e043804c2..dbe43df8cfec 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c2410/dma.c | |||
@@ -47,38 +47,26 @@ static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = { | |||
47 | .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID, | 47 | .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID, |
48 | .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID, | 48 | .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID, |
49 | .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID, | 49 | .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID, |
50 | .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO, | ||
51 | .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO, | ||
52 | }, | 50 | }, |
53 | [DMACH_SPI0] = { | 51 | [DMACH_SPI0] = { |
54 | .name = "spi0", | 52 | .name = "spi0", |
55 | .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID, | 53 | .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID, |
56 | .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT, | ||
57 | .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT, | ||
58 | }, | 54 | }, |
59 | [DMACH_SPI1] = { | 55 | [DMACH_SPI1] = { |
60 | .name = "spi1", | 56 | .name = "spi1", |
61 | .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID, | 57 | .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID, |
62 | .hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT, | ||
63 | .hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT, | ||
64 | }, | 58 | }, |
65 | [DMACH_UART0] = { | 59 | [DMACH_UART0] = { |
66 | .name = "uart0", | 60 | .name = "uart0", |
67 | .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID, | 61 | .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID, |
68 | .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH, | ||
69 | .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH, | ||
70 | }, | 62 | }, |
71 | [DMACH_UART1] = { | 63 | [DMACH_UART1] = { |
72 | .name = "uart1", | 64 | .name = "uart1", |
73 | .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID, | 65 | .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID, |
74 | .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH, | ||
75 | .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH, | ||
76 | }, | 66 | }, |
77 | [DMACH_UART2] = { | 67 | [DMACH_UART2] = { |
78 | .name = "uart2", | 68 | .name = "uart2", |
79 | .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID, | 69 | .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID, |
80 | .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH, | ||
81 | .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH, | ||
82 | }, | 70 | }, |
83 | [DMACH_TIMER] = { | 71 | [DMACH_TIMER] = { |
84 | .name = "timer", | 72 | .name = "timer", |
@@ -90,12 +78,10 @@ static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = { | |||
90 | .name = "i2s-sdi", | 78 | .name = "i2s-sdi", |
91 | .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID, | 79 | .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID, |
92 | .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID, | 80 | .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID, |
93 | .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO, | ||
94 | }, | 81 | }, |
95 | [DMACH_I2S_OUT] = { | 82 | [DMACH_I2S_OUT] = { |
96 | .name = "i2s-sdo", | 83 | .name = "i2s-sdo", |
97 | .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID, | 84 | .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID, |
98 | .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO, | ||
99 | }, | 85 | }, |
100 | [DMACH_USB_EP1] = { | 86 | [DMACH_USB_EP1] = { |
101 | .name = "usb-ep1", | 87 | .name = "usb-ep1", |
diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c deleted file mode 100644 index 9664e011dae2..000000000000 --- a/arch/arm/mach-s3c2410/gpio.c +++ /dev/null | |||
@@ -1,72 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c2410/gpio.c | ||
2 | * | ||
3 | * Copyright (c) 2004-2006 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C2410 GPIO support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
21 | */ | ||
22 | |||
23 | #include <linux/kernel.h> | ||
24 | #include <linux/init.h> | ||
25 | #include <linux/module.h> | ||
26 | #include <linux/interrupt.h> | ||
27 | #include <linux/ioport.h> | ||
28 | #include <linux/io.h> | ||
29 | |||
30 | #include <mach/hardware.h> | ||
31 | #include <mach/gpio-fns.h> | ||
32 | #include <asm/irq.h> | ||
33 | |||
34 | #include <mach/regs-gpio.h> | ||
35 | |||
36 | int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, | ||
37 | unsigned int config) | ||
38 | { | ||
39 | void __iomem *reg = S3C24XX_EINFLT0; | ||
40 | unsigned long flags; | ||
41 | unsigned long val; | ||
42 | |||
43 | if (pin < S3C2410_GPG(8) || pin > S3C2410_GPG(15)) | ||
44 | return -EINVAL; | ||
45 | |||
46 | config &= 0xff; | ||
47 | |||
48 | pin -= S3C2410_GPG(8); | ||
49 | reg += pin & ~3; | ||
50 | |||
51 | local_irq_save(flags); | ||
52 | |||
53 | /* update filter width and clock source */ | ||
54 | |||
55 | val = __raw_readl(reg); | ||
56 | val &= ~(0xff << ((pin & 3) * 8)); | ||
57 | val |= config << ((pin & 3) * 8); | ||
58 | __raw_writel(val, reg); | ||
59 | |||
60 | /* update filter enable */ | ||
61 | |||
62 | val = __raw_readl(S3C24XX_EXTINT2); | ||
63 | val &= ~(1 << ((pin * 4) + 3)); | ||
64 | val |= on << ((pin * 4) + 3); | ||
65 | __raw_writel(val, S3C24XX_EXTINT2); | ||
66 | |||
67 | local_irq_restore(flags); | ||
68 | |||
69 | return 0; | ||
70 | } | ||
71 | |||
72 | EXPORT_SYMBOL(s3c2410_gpio_irqfilter); | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h index 425552d84b60..4cf495f813a7 100644 --- a/arch/arm/mach-s3c2410/include/mach/map.h +++ b/arch/arm/mach-s3c2410/include/mach/map.h | |||
@@ -14,9 +14,53 @@ | |||
14 | #define __ASM_ARCH_MAP_H | 14 | #define __ASM_ARCH_MAP_H |
15 | 15 | ||
16 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
17 | #include <plat/map.h> | ||
18 | 17 | ||
19 | #define S3C2410_ADDR(x) S3C_ADDR(x) | 18 | /* |
19 | * S3C2410 UART offset is 0x4000 but the other SoCs are 0x400. | ||
20 | * So need to define it, and here is to avoid redefinition warning. | ||
21 | */ | ||
22 | #define S3C_UART_OFFSET (0x4000) | ||
23 | |||
24 | #include <plat/map-s3c.h> | ||
25 | |||
26 | /* | ||
27 | * interrupt controller is the first thing we put in, to make | ||
28 | * the assembly code for the irq detection easier | ||
29 | */ | ||
30 | #define S3C2410_PA_IRQ (0x4A000000) | ||
31 | #define S3C24XX_SZ_IRQ SZ_1M | ||
32 | |||
33 | /* memory controller registers */ | ||
34 | #define S3C2410_PA_MEMCTRL (0x48000000) | ||
35 | #define S3C24XX_SZ_MEMCTRL SZ_1M | ||
36 | |||
37 | /* UARTs */ | ||
38 | #define S3C_VA_UARTx(uart) (S3C_VA_UART + ((uart * S3C_UART_OFFSET))) | ||
39 | |||
40 | /* Timers */ | ||
41 | #define S3C2410_PA_TIMER (0x51000000) | ||
42 | #define S3C24XX_SZ_TIMER SZ_1M | ||
43 | |||
44 | /* Clock and Power management */ | ||
45 | #define S3C24XX_SZ_CLKPWR SZ_1M | ||
46 | |||
47 | /* USB Device port */ | ||
48 | #define S3C2410_PA_USBDEV (0x52000000) | ||
49 | #define S3C24XX_SZ_USBDEV SZ_1M | ||
50 | |||
51 | /* Watchdog */ | ||
52 | #define S3C2410_PA_WATCHDOG (0x53000000) | ||
53 | #define S3C24XX_SZ_WATCHDOG SZ_1M | ||
54 | |||
55 | /* Standard size definitions for peripheral blocks. */ | ||
56 | |||
57 | #define S3C24XX_SZ_UART SZ_1M | ||
58 | #define S3C24XX_SZ_IIS SZ_1M | ||
59 | #define S3C24XX_SZ_ADC SZ_1M | ||
60 | #define S3C24XX_SZ_SPI SZ_1M | ||
61 | #define S3C24XX_SZ_SDI SZ_1M | ||
62 | #define S3C24XX_SZ_NAND SZ_1M | ||
63 | #define S3C24XX_SZ_GPIO SZ_1M | ||
20 | 64 | ||
21 | /* USB host controller */ | 65 | /* USB host controller */ |
22 | #define S3C2410_PA_USBHOST (0x49000000) | 66 | #define S3C2410_PA_USBHOST (0x49000000) |
@@ -75,10 +119,8 @@ | |||
75 | 119 | ||
76 | /* S3C2412 memory and IO controls */ | 120 | /* S3C2412 memory and IO controls */ |
77 | #define S3C2412_PA_SSMC (0x4F000000) | 121 | #define S3C2412_PA_SSMC (0x4F000000) |
78 | #define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000) | ||
79 | 122 | ||
80 | #define S3C2412_PA_EBI (0x48800000) | 123 | #define S3C2412_PA_EBI (0x48800000) |
81 | #define S3C2412_VA_EBI S3C_ADDR_CPU(0x00010000) | ||
82 | 124 | ||
83 | /* physical addresses of all the chip-select areas */ | 125 | /* physical addresses of all the chip-select areas */ |
84 | 126 | ||
@@ -100,12 +142,10 @@ | |||
100 | #define S3C24XX_PA_DMA S3C2410_PA_DMA | 142 | #define S3C24XX_PA_DMA S3C2410_PA_DMA |
101 | #define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR | 143 | #define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR |
102 | #define S3C24XX_PA_LCD S3C2410_PA_LCD | 144 | #define S3C24XX_PA_LCD S3C2410_PA_LCD |
103 | #define S3C24XX_PA_UART S3C2410_PA_UART | ||
104 | #define S3C24XX_PA_TIMER S3C2410_PA_TIMER | 145 | #define S3C24XX_PA_TIMER S3C2410_PA_TIMER |
105 | #define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV | 146 | #define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV |
106 | #define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG | 147 | #define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG |
107 | #define S3C24XX_PA_IIS S3C2410_PA_IIS | 148 | #define S3C24XX_PA_IIS S3C2410_PA_IIS |
108 | #define S3C24XX_PA_GPIO S3C2410_PA_GPIO | ||
109 | #define S3C24XX_PA_RTC S3C2410_PA_RTC | 149 | #define S3C24XX_PA_RTC S3C2410_PA_RTC |
110 | #define S3C24XX_PA_ADC S3C2410_PA_ADC | 150 | #define S3C24XX_PA_ADC S3C2410_PA_ADC |
111 | #define S3C24XX_PA_SPI S3C2410_PA_SPI | 151 | #define S3C24XX_PA_SPI S3C2410_PA_SPI |