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-rw-r--r--arch/arm/mach-s3c2410/Kconfig26
-rw-r--r--arch/arm/mach-s3c2410/Makefile10
-rw-r--r--arch/arm/mach-s3c2410/clock.c2
-rw-r--r--arch/arm/mach-s3c2410/common-smdk.c65
-rw-r--r--arch/arm/mach-s3c2410/cpu.c77
-rw-r--r--arch/arm/mach-s3c2410/cpu.h7
-rw-r--r--arch/arm/mach-s3c2410/devs.c78
-rw-r--r--arch/arm/mach-s3c2410/devs.h8
-rw-r--r--arch/arm/mach-s3c2410/mach-anubis.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-nexcoder.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-osiris.c5
-rw-r--r--arch/arm/mach-s3c2410/mach-otom.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-smdk2410.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-smdk2440.c2
-rw-r--r--arch/arm/mach-s3c2410/mach-vr1000.c2
-rw-r--r--arch/arm/mach-s3c2410/pm.c4
-rw-r--r--arch/arm/mach-s3c2410/s3c2410.c85
-rw-r--r--arch/arm/mach-s3c2410/s3c2440-irq.c77
-rw-r--r--arch/arm/mach-s3c2410/s3c2440.c234
-rw-r--r--arch/arm/mach-s3c2410/s3c2442-clock.c171
-rw-r--r--arch/arm/mach-s3c2410/s3c2442.c52
-rw-r--r--arch/arm/mach-s3c2410/s3c2442.h17
-rw-r--r--arch/arm/mach-s3c2410/s3c244x-irq.c142
-rw-r--r--arch/arm/mach-s3c2410/s3c244x.c182
-rw-r--r--arch/arm/mach-s3c2410/s3c244x.h25
-rw-r--r--arch/arm/mach-s3c2410/sleep.S2
28 files changed, 878 insertions, 407 deletions
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 970f98dadffc..0c334136db7c 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -70,6 +70,18 @@ config ARCH_S3C2440
70 help 70 help
71 Say Y here if you are using the SMDK2440. 71 Say Y here if you are using the SMDK2440.
72 72
73config SMDK2440_CPU2440
74 bool "SMDK2440 with S3C2440 cpu module"
75 depends on ARCH_S3C2440
76 default y if ARCH_S3C2440
77 select CPU_S3C2440
78
79config SMDK2440_CPU2442
80 bool "SMDM2440 with S3C2442 cpu module"
81 depends on ARCH_S3C2440
82 select CPU_S3C2442
83
84
73config MACH_VR1000 85config MACH_VR1000
74 bool "Thorcom VR1000" 86 bool "Thorcom VR1000"
75 select CPU_S3C2410 87 select CPU_S3C2410
@@ -109,12 +121,26 @@ config CPU_S3C2410
109 Support for S3C2410 and S3C2410A family from the S3C24XX line 121 Support for S3C2410 and S3C2410A family from the S3C24XX line
110 of Samsung Mobile CPUs. 122 of Samsung Mobile CPUs.
111 123
124config CPU_S3C244X
125 bool
126 depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442)
127 help
128 Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems.
129
112config CPU_S3C2440 130config CPU_S3C2440
113 bool 131 bool
114 depends on ARCH_S3C2410 132 depends on ARCH_S3C2410
133 select CPU_S3C244X
115 help 134 help
116 Support for S3C2440 Samsung Mobile CPU based systems. 135 Support for S3C2440 Samsung Mobile CPU based systems.
117 136
137config CPU_S3C2442
138 bool
139 depends on ARCH_S3C2420
140 select CPU_S3C244X
141 help
142 Support for S3C2442 Samsung Mobile CPU based systems.
143
118comment "S3C2410 Boot" 144comment "S3C2410 Boot"
119 145
120config S3C2410_BOOT_WATCHDOG 146config S3C2410_BOOT_WATCHDOG
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile
index 3e5712db6b52..5e09355cd4f4 100644
--- a/arch/arm/mach-s3c2410/Makefile
+++ b/arch/arm/mach-s3c2410/Makefile
@@ -24,6 +24,11 @@ obj-$(CONFIG_S3C2410_DMA) += dma.o
24obj-$(CONFIG_PM) += pm.o sleep.o 24obj-$(CONFIG_PM) += pm.o sleep.o
25obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o 25obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o
26 26
27# S3C244X support
28
29obj-$(CONFIG_CPU_S3C244X) += s3c244x.o
30obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o
31
27# S3C2440 support 32# S3C2440 support
28 33
29obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o 34obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o
@@ -31,6 +36,11 @@ obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o
31obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o 36obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o
32obj-$(CONFIG_CPU_S3C2440) += s3c2410-gpio.o 37obj-$(CONFIG_CPU_S3C2440) += s3c2410-gpio.o
33 38
39# S3C2442 support
40
41obj-$(CONFIG_CPU_S3C2442) += s3c2442.o
42obj-$(CONFIG_CPU_S3C2442) += s3c2442-clock.o
43
34# bast extras 44# bast extras
35 45
36obj-$(CONFIG_BAST_PC104_IRQ) += bast-irq.o 46obj-$(CONFIG_BAST_PC104_IRQ) += bast-irq.o
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c
index 6de713ad319a..99d174612b53 100644
--- a/arch/arm/mach-s3c2410/clock.c
+++ b/arch/arm/mach-s3c2410/clock.c
@@ -70,7 +70,7 @@ void inline s3c24xx_clk_enable(unsigned int clocks, unsigned int enable)
70 clkcon &= ~clocks; 70 clkcon &= ~clocks;
71 71
72 /* ensure none of the special function bits set */ 72 /* ensure none of the special function bits set */
73 clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER); 73 clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER | 3);
74 74
75 __raw_writel(clkcon, S3C2410_CLKCON); 75 __raw_writel(clkcon, S3C2410_CLKCON);
76} 76}
diff --git a/arch/arm/mach-s3c2410/common-smdk.c b/arch/arm/mach-s3c2410/common-smdk.c
index c940890f621f..a40eaa656177 100644
--- a/arch/arm/mach-s3c2410/common-smdk.c
+++ b/arch/arm/mach-s3c2410/common-smdk.c
@@ -34,6 +34,7 @@
34#include <asm/irq.h> 34#include <asm/irq.h>
35 35
36#include <asm/arch/regs-gpio.h> 36#include <asm/arch/regs-gpio.h>
37#include <asm/arch/leds-gpio.h>
37 38
38#include <asm/arch/nand.h> 39#include <asm/arch/nand.h>
39 40
@@ -41,6 +42,66 @@
41#include "devs.h" 42#include "devs.h"
42#include "pm.h" 43#include "pm.h"
43 44
45/* LED devices */
46
47static struct s3c24xx_led_platdata smdk_pdata_led4 = {
48 .gpio = S3C2410_GPF4,
49 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
50 .name = "led4",
51 .def_trigger = "timer",
52};
53
54static struct s3c24xx_led_platdata smdk_pdata_led5 = {
55 .gpio = S3C2410_GPF5,
56 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
57 .name = "led5",
58 .def_trigger = "nand-disk",
59};
60
61static struct s3c24xx_led_platdata smdk_pdata_led6 = {
62 .gpio = S3C2410_GPF6,
63 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
64 .name = "led6",
65};
66
67static struct s3c24xx_led_platdata smdk_pdata_led7 = {
68 .gpio = S3C2410_GPF7,
69 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
70 .name = "led7",
71};
72
73static struct platform_device smdk_led4 = {
74 .name = "s3c24xx_led",
75 .id = 0,
76 .dev = {
77 .platform_data = &smdk_pdata_led4,
78 },
79};
80
81static struct platform_device smdk_led5 = {
82 .name = "s3c24xx_led",
83 .id = 1,
84 .dev = {
85 .platform_data = &smdk_pdata_led5,
86 },
87};
88
89static struct platform_device smdk_led6 = {
90 .name = "s3c24xx_led",
91 .id = 2,
92 .dev = {
93 .platform_data = &smdk_pdata_led6,
94 },
95};
96
97static struct platform_device smdk_led7 = {
98 .name = "s3c24xx_led",
99 .id = 3,
100 .dev = {
101 .platform_data = &smdk_pdata_led7,
102 },
103};
104
44/* NAND parititon from 2.4.18-swl5 */ 105/* NAND parititon from 2.4.18-swl5 */
45 106
46static struct mtd_partition smdk_default_nand_part[] = { 107static struct mtd_partition smdk_default_nand_part[] = {
@@ -111,6 +172,10 @@ static struct s3c2410_platform_nand smdk_nand_info = {
111 172
112static struct platform_device __initdata *smdk_devs[] = { 173static struct platform_device __initdata *smdk_devs[] = {
113 &s3c_device_nand, 174 &s3c_device_nand,
175 &smdk_led4,
176 &smdk_led5,
177 &smdk_led6,
178 &smdk_led7,
114}; 179};
115 180
116void __init smdk_machine_init(void) 181void __init smdk_machine_init(void)
diff --git a/arch/arm/mach-s3c2410/cpu.c b/arch/arm/mach-s3c2410/cpu.c
index 70c34fcf7858..52842e6e86e6 100644
--- a/arch/arm/mach-s3c2410/cpu.c
+++ b/arch/arm/mach-s3c2410/cpu.c
@@ -37,12 +37,16 @@
37#include <asm/mach/map.h> 37#include <asm/mach/map.h>
38 38
39#include <asm/arch/regs-gpio.h> 39#include <asm/arch/regs-gpio.h>
40#include <asm/arch/regs-serial.h>
40 41
41#include "cpu.h" 42#include "cpu.h"
43#include "devs.h"
42#include "clock.h" 44#include "clock.h"
43#include "s3c2400.h" 45#include "s3c2400.h"
44#include "s3c2410.h" 46#include "s3c2410.h"
47#include "s3c244x.h"
45#include "s3c2440.h" 48#include "s3c2440.h"
49#include "s3c2442.h"
46 50
47struct cpu_table { 51struct cpu_table {
48 unsigned long idcode; 52 unsigned long idcode;
@@ -59,6 +63,7 @@ struct cpu_table {
59static const char name_s3c2400[] = "S3C2400"; 63static const char name_s3c2400[] = "S3C2400";
60static const char name_s3c2410[] = "S3C2410"; 64static const char name_s3c2410[] = "S3C2410";
61static const char name_s3c2440[] = "S3C2440"; 65static const char name_s3c2440[] = "S3C2440";
66static const char name_s3c2442[] = "S3C2442";
62static const char name_s3c2410a[] = "S3C2410A"; 67static const char name_s3c2410a[] = "S3C2410A";
63static const char name_s3c2440a[] = "S3C2440A"; 68static const char name_s3c2440a[] = "S3C2440A";
64 69
@@ -84,22 +89,31 @@ static struct cpu_table cpu_ids[] __initdata = {
84 { 89 {
85 .idcode = 0x32440000, 90 .idcode = 0x32440000,
86 .idmask = 0xffffffff, 91 .idmask = 0xffffffff,
87 .map_io = s3c2440_map_io, 92 .map_io = s3c244x_map_io,
88 .init_clocks = s3c2440_init_clocks, 93 .init_clocks = s3c244x_init_clocks,
89 .init_uarts = s3c2440_init_uarts, 94 .init_uarts = s3c244x_init_uarts,
90 .init = s3c2440_init, 95 .init = s3c2440_init,
91 .name = name_s3c2440 96 .name = name_s3c2440
92 }, 97 },
93 { 98 {
94 .idcode = 0x32440001, 99 .idcode = 0x32440001,
95 .idmask = 0xffffffff, 100 .idmask = 0xffffffff,
96 .map_io = s3c2440_map_io, 101 .map_io = s3c244x_map_io,
97 .init_clocks = s3c2440_init_clocks, 102 .init_clocks = s3c244x_init_clocks,
98 .init_uarts = s3c2440_init_uarts, 103 .init_uarts = s3c244x_init_uarts,
99 .init = s3c2440_init, 104 .init = s3c2440_init,
100 .name = name_s3c2440a 105 .name = name_s3c2440a
101 }, 106 },
102 { 107 {
108 .idcode = 0x32440aaa,
109 .idmask = 0xffffffff,
110 .map_io = s3c244x_map_io,
111 .init_clocks = s3c244x_init_clocks,
112 .init_uarts = s3c244x_init_uarts,
113 .init = s3c2442_init,
114 .name = name_s3c2442
115 },
116 {
103 .idcode = 0x0, /* S3C2400 doesn't have an idcode */ 117 .idcode = 0x0, /* S3C2400 doesn't have an idcode */
104 .idmask = 0xffffffff, 118 .idmask = 0xffffffff,
105 .map_io = s3c2400_map_io, 119 .map_io = s3c2400_map_io,
@@ -175,13 +189,13 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
175 panic("Unknown S3C24XX CPU"); 189 panic("Unknown S3C24XX CPU");
176 } 190 }
177 191
192 printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode);
193
178 if (cpu->map_io == NULL || cpu->init == NULL) { 194 if (cpu->map_io == NULL || cpu->init == NULL) {
179 printk(KERN_ERR "CPU %s support not enabled\n", cpu->name); 195 printk(KERN_ERR "CPU %s support not enabled\n", cpu->name);
180 panic("Unsupported S3C24XX CPU"); 196 panic("Unsupported S3C24XX CPU");
181 } 197 }
182 198
183 printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode);
184
185 (cpu->map_io)(mach_desc, size); 199 (cpu->map_io)(mach_desc, size);
186} 200}
187 201
@@ -208,6 +222,49 @@ void __init s3c24xx_init_clocks(int xtal)
208 (cpu->init_clocks)(xtal); 222 (cpu->init_clocks)(xtal);
209} 223}
210 224
225/* uart management */
226
227static int nr_uarts __initdata = 0;
228
229static struct s3c2410_uartcfg uart_cfgs[3];
230
231/* s3c24xx_init_uartdevs
232 *
233 * copy the specified platform data and configuration into our central
234 * set of devices, before the data is thrown away after the init process.
235 *
236 * This also fills in the array passed to the serial driver for the
237 * early initialisation of the console.
238*/
239
240void __init s3c24xx_init_uartdevs(char *name,
241 struct s3c24xx_uart_resources *res,
242 struct s3c2410_uartcfg *cfg, int no)
243{
244 struct platform_device *platdev;
245 struct s3c2410_uartcfg *cfgptr = uart_cfgs;
246 struct s3c24xx_uart_resources *resp;
247 int uart;
248
249 memcpy(cfgptr, cfg, sizeof(struct s3c2410_uartcfg) * no);
250
251 for (uart = 0; uart < no; uart++, cfg++, cfgptr++) {
252 platdev = s3c24xx_uart_src[cfgptr->hwport];
253
254 resp = res + cfgptr->hwport;
255
256 s3c24xx_uart_devs[uart] = platdev;
257
258 platdev->name = name;
259 platdev->resource = resp->resources;
260 platdev->num_resources = resp->nr_resources;
261
262 platdev->dev.platform_data = cfgptr;
263 }
264
265 nr_uarts = no;
266}
267
211void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no) 268void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
212{ 269{
213 if (cpu == NULL) 270 if (cpu == NULL)
@@ -232,6 +289,10 @@ static int __init s3c_arch_init(void)
232 if (ret != 0) 289 if (ret != 0)
233 return ret; 290 return ret;
234 291
292 ret = platform_add_devices(s3c24xx_uart_devs, nr_uarts);
293 if (ret != 0)
294 return ret;
295
235 if (board != NULL) { 296 if (board != NULL) {
236 struct platform_device **ptr = board->devices; 297 struct platform_device **ptr = board->devices;
237 int i; 298 int i;
diff --git a/arch/arm/mach-s3c2410/cpu.h b/arch/arm/mach-s3c2410/cpu.h
index fc1067783f6d..40862899b2f1 100644
--- a/arch/arm/mach-s3c2410/cpu.h
+++ b/arch/arm/mach-s3c2410/cpu.h
@@ -31,6 +31,8 @@
31#define print_mhz(m) ((m) / MHZ), ((m / 1000) % 1000) 31#define print_mhz(m) ((m) / MHZ), ((m / 1000) % 1000)
32 32
33/* forward declaration */ 33/* forward declaration */
34struct s3c24xx_uart_resources;
35struct platform_device;
34struct s3c2410_uartcfg; 36struct s3c2410_uartcfg;
35struct map_desc; 37struct map_desc;
36 38
@@ -44,6 +46,10 @@ extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);
44 46
45extern void s3c24xx_init_clocks(int xtal); 47extern void s3c24xx_init_clocks(int xtal);
46 48
49extern void s3c24xx_init_uartdevs(char *name,
50 struct s3c24xx_uart_resources *res,
51 struct s3c2410_uartcfg *cfg, int no);
52
47/* the board structure is used at first initialsation time 53/* the board structure is used at first initialsation time
48 * to get info such as the devices to register for this 54 * to get info such as the devices to register for this
49 * board. This is done because platfrom_add_devices() cannot 55 * board. This is done because platfrom_add_devices() cannot
@@ -68,3 +74,4 @@ extern struct sys_timer s3c24xx_timer;
68/* system device classes */ 74/* system device classes */
69 75
70extern struct sysdev_class s3c2440_sysclass; 76extern struct sysdev_class s3c2440_sysclass;
77extern struct sysdev_class s3c2442_sysclass;
diff --git a/arch/arm/mach-s3c2410/devs.c b/arch/arm/mach-s3c2410/devs.c
index ca09ba516e4c..ad3845e329ba 100644
--- a/arch/arm/mach-s3c2410/devs.c
+++ b/arch/arm/mach-s3c2410/devs.c
@@ -38,10 +38,86 @@
38#include <asm/arch/regs-serial.h> 38#include <asm/arch/regs-serial.h>
39 39
40#include "devs.h" 40#include "devs.h"
41#include "cpu.h"
41 42
42/* Serial port registrations */ 43/* Serial port registrations */
43 44
44struct platform_device *s3c24xx_uart_devs[3]; 45static struct resource s3c2410_uart0_resource[] = {
46 [0] = {
47 .start = S3C2410_PA_UART0,
48 .end = S3C2410_PA_UART0 + 0x3fff,
49 .flags = IORESOURCE_MEM,
50 },
51 [1] = {
52 .start = IRQ_S3CUART_RX0,
53 .end = IRQ_S3CUART_ERR0,
54 .flags = IORESOURCE_IRQ,
55 }
56};
57
58static struct resource s3c2410_uart1_resource[] = {
59 [0] = {
60 .start = S3C2410_PA_UART1,
61 .end = S3C2410_PA_UART1 + 0x3fff,
62 .flags = IORESOURCE_MEM,
63 },
64 [1] = {
65 .start = IRQ_S3CUART_RX1,
66 .end = IRQ_S3CUART_ERR1,
67 .flags = IORESOURCE_IRQ,
68 }
69};
70
71static struct resource s3c2410_uart2_resource[] = {
72 [0] = {
73 .start = S3C2410_PA_UART2,
74 .end = S3C2410_PA_UART2 + 0x3fff,
75 .flags = IORESOURCE_MEM,
76 },
77 [1] = {
78 .start = IRQ_S3CUART_RX2,
79 .end = IRQ_S3CUART_ERR2,
80 .flags = IORESOURCE_IRQ,
81 }
82};
83
84struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
85 [0] = {
86 .resources = s3c2410_uart0_resource,
87 .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
88 },
89 [1] = {
90 .resources = s3c2410_uart1_resource,
91 .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
92 },
93 [2] = {
94 .resources = s3c2410_uart2_resource,
95 .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
96 },
97};
98
99/* yart devices */
100
101static struct platform_device s3c24xx_uart_device0 = {
102 .id = 0,
103};
104
105static struct platform_device s3c24xx_uart_device1 = {
106 .id = 1,
107};
108
109static struct platform_device s3c24xx_uart_device2 = {
110 .id = 2,
111};
112
113struct platform_device *s3c24xx_uart_src[3] = {
114 &s3c24xx_uart_device0,
115 &s3c24xx_uart_device1,
116 &s3c24xx_uart_device2,
117};
118
119struct platform_device *s3c24xx_uart_devs[3] = {
120};
45 121
46/* USB Host Controller */ 122/* USB Host Controller */
47 123
diff --git a/arch/arm/mach-s3c2410/devs.h b/arch/arm/mach-s3c2410/devs.h
index 52c4bab5c761..fa124ed920e0 100644
--- a/arch/arm/mach-s3c2410/devs.h
+++ b/arch/arm/mach-s3c2410/devs.h
@@ -17,7 +17,15 @@
17#include <linux/config.h> 17#include <linux/config.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19 19
20struct s3c24xx_uart_resources {
21 struct resource *resources;
22 unsigned long nr_resources;
23};
24
25extern struct s3c24xx_uart_resources s3c2410_uart_resources[];
26
20extern struct platform_device *s3c24xx_uart_devs[]; 27extern struct platform_device *s3c24xx_uart_devs[];
28extern struct platform_device *s3c24xx_uart_src[];
21 29
22extern struct platform_device s3c_device_usb; 30extern struct platform_device s3c_device_usb;
23extern struct platform_device s3c_device_lcd; 31extern struct platform_device s3c_device_lcd;
diff --git a/arch/arm/mach-s3c2410/mach-anubis.c b/arch/arm/mach-s3c2410/mach-anubis.c
index cc97fbf66291..52bf718137d4 100644
--- a/arch/arm/mach-s3c2410/mach-anubis.c
+++ b/arch/arm/mach-s3c2410/mach-anubis.c
@@ -131,7 +131,7 @@ static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = {
131}; 131};
132 132
133 133
134static struct s3c2410_uartcfg anubis_uartcfgs[] = { 134static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
135 [0] = { 135 [0] = {
136 .hwport = 0, 136 .hwport = 0,
137 .flags = 0, 137 .flags = 0,
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 995bb8add331..947234df8160 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -208,7 +208,7 @@ static struct s3c24xx_uart_clksrc bast_serial_clocks[] = {
208}; 208};
209 209
210 210
211static struct s3c2410_uartcfg bast_uartcfgs[] = { 211static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
212 [0] = { 212 [0] = {
213 .hwport = 0, 213 .hwport = 0,
214 .flags = 0, 214 .flags = 0,
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 646a3a5d33a5..aec431b2830a 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -72,7 +72,7 @@ static struct map_desc h1940_iodesc[] __initdata = {
72#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 72#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
73#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 73#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
74 74
75static struct s3c2410_uartcfg h1940_uartcfgs[] = { 75static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = {
76 [0] = { 76 [0] = {
77 .hwport = 0, 77 .hwport = 0,
78 .flags = 0, 78 .flags = 0,
diff --git a/arch/arm/mach-s3c2410/mach-nexcoder.c b/arch/arm/mach-s3c2410/mach-nexcoder.c
index 07d09509a626..065a1d4e860b 100644
--- a/arch/arm/mach-s3c2410/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2410/mach-nexcoder.c
@@ -51,7 +51,7 @@ static struct map_desc nexcoder_iodesc[] __initdata = {
51#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 51#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
52#define UFCON S3C2410_UFCON_RXTRIG12 | S3C2410_UFCON_FIFOMODE 52#define UFCON S3C2410_UFCON_RXTRIG12 | S3C2410_UFCON_FIFOMODE
53 53
54static struct s3c2410_uartcfg nexcoder_uartcfgs[] = { 54static struct s3c2410_uartcfg nexcoder_uartcfgs[] __initdata = {
55 [0] = { 55 [0] = {
56 .hwport = 0, 56 .hwport = 0,
57 .flags = 0, 57 .flags = 0,
diff --git a/arch/arm/mach-s3c2410/mach-osiris.c b/arch/arm/mach-s3c2410/mach-osiris.c
index ae0787557751..858fd03c6bc5 100644
--- a/arch/arm/mach-s3c2410/mach-osiris.c
+++ b/arch/arm/mach-s3c2410/mach-osiris.c
@@ -95,8 +95,7 @@ static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = {
95 } 95 }
96}; 96};
97 97
98 98static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
99static struct s3c2410_uartcfg osiris_uartcfgs[] = {
100 [0] = { 99 [0] = {
101 .hwport = 0, 100 .hwport = 0,
102 .flags = 0, 101 .flags = 0,
@@ -107,7 +106,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] = {
107 .clocks_size = ARRAY_SIZE(osiris_serial_clocks) 106 .clocks_size = ARRAY_SIZE(osiris_serial_clocks)
108 }, 107 },
109 [1] = { 108 [1] = {
110 .hwport = 2, 109 .hwport = 1,
111 .flags = 0, 110 .flags = 0,
112 .ucon = UCON, 111 .ucon = UCON,
113 .ulcon = ULCON, 112 .ulcon = ULCON,
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c
index b39daedf93ca..c71673fd9955 100644
--- a/arch/arm/mach-s3c2410/mach-otom.c
+++ b/arch/arm/mach-s3c2410/mach-otom.c
@@ -45,7 +45,7 @@ static struct map_desc otom11_iodesc[] __initdata = {
45#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 45#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
46#define UFCON S3C2410_UFCON_RXTRIG12 | S3C2410_UFCON_FIFOMODE 46#define UFCON S3C2410_UFCON_RXTRIG12 | S3C2410_UFCON_FIFOMODE
47 47
48static struct s3c2410_uartcfg otom11_uartcfgs[] = { 48static struct s3c2410_uartcfg otom11_uartcfgs[] __initdata = {
49 [0] = { 49 [0] = {
50 .hwport = 0, 50 .hwport = 0,
51 .flags = 0, 51 .flags = 0,
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c
index 2db932d72c5a..25f7e9f4dcee 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2410.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2410.c
@@ -65,7 +65,7 @@ static struct map_desc smdk2410_iodesc[] __initdata = {
65#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 65#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
66#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 66#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
67 67
68static struct s3c2410_uartcfg smdk2410_uartcfgs[] = { 68static struct s3c2410_uartcfg smdk2410_uartcfgs[] __initdata = {
69 [0] = { 69 [0] = {
70 .hwport = 0, 70 .hwport = 0,
71 .flags = 0, 71 .flags = 0,
diff --git a/arch/arm/mach-s3c2410/mach-smdk2440.c b/arch/arm/mach-s3c2410/mach-smdk2440.c
index 5fffd1d51047..d661c6b7ff56 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2440.c
@@ -86,7 +86,7 @@ static struct map_desc smdk2440_iodesc[] __initdata = {
86#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 86#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
87#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 87#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
88 88
89static struct s3c2410_uartcfg smdk2440_uartcfgs[] = { 89static struct s3c2410_uartcfg smdk2440_uartcfgs[] __initdata = {
90 [0] = { 90 [0] = {
91 .hwport = 0, 91 .hwport = 0,
92 .flags = 0, 92 .flags = 0,
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 785fc9cdcf7c..d18efb279d3d 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -166,7 +166,7 @@ static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
166 } 166 }
167}; 167};
168 168
169static struct s3c2410_uartcfg vr1000_uartcfgs[] = { 169static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
170 [0] = { 170 [0] = {
171 .hwport = 0, 171 .hwport = 0,
172 .flags = 0, 172 .flags = 0,
diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c
index fe57d966a34d..43e9a550a203 100644
--- a/arch/arm/mach-s3c2410/pm.c
+++ b/arch/arm/mach-s3c2410/pm.c
@@ -58,7 +58,11 @@ unsigned long s3c_pm_flags;
58 58
59/* cache functions from arch/arm/mm/proc-arm920.S */ 59/* cache functions from arch/arm/mm/proc-arm920.S */
60 60
61#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
61extern void arm920_flush_kern_cache_all(void); 62extern void arm920_flush_kern_cache_all(void);
63#else
64static void arm920_flush_kern_cache_all(void) { }
65#endif
62 66
63#define PFX "s3c24xx-pm: " 67#define PFX "s3c24xx-pm: "
64 68
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index 0a2013a76549..0852e87a79c4 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -42,6 +42,7 @@
42 42
43#include "s3c2410.h" 43#include "s3c2410.h"
44#include "cpu.h" 44#include "cpu.h"
45#include "devs.h"
45#include "clock.h" 46#include "clock.h"
46 47
47/* Initial IO mappings */ 48/* Initial IO mappings */
@@ -55,93 +56,13 @@ static struct map_desc s3c2410_iodesc[] __initdata = {
55 IODESC_ENT(WATCHDOG), 56 IODESC_ENT(WATCHDOG),
56}; 57};
57 58
58static struct resource s3c_uart0_resource[] = {
59 [0] = {
60 .start = S3C2410_PA_UART0,
61 .end = S3C2410_PA_UART0 + 0x3fff,
62 .flags = IORESOURCE_MEM,
63 },
64 [1] = {
65 .start = IRQ_S3CUART_RX0,
66 .end = IRQ_S3CUART_ERR0,
67 .flags = IORESOURCE_IRQ,
68 }
69
70};
71
72static struct resource s3c_uart1_resource[] = {
73 [0] = {
74 .start = S3C2410_PA_UART1,
75 .end = S3C2410_PA_UART1 + 0x3fff,
76 .flags = IORESOURCE_MEM,
77 },
78 [1] = {
79 .start = IRQ_S3CUART_RX1,
80 .end = IRQ_S3CUART_ERR1,
81 .flags = IORESOURCE_IRQ,
82 }
83};
84
85static struct resource s3c_uart2_resource[] = {
86 [0] = {
87 .start = S3C2410_PA_UART2,
88 .end = S3C2410_PA_UART2 + 0x3fff,
89 .flags = IORESOURCE_MEM,
90 },
91 [1] = {
92 .start = IRQ_S3CUART_RX2,
93 .end = IRQ_S3CUART_ERR2,
94 .flags = IORESOURCE_IRQ,
95 }
96};
97
98/* our uart devices */ 59/* our uart devices */
99 60
100static struct platform_device s3c_uart0 = {
101 .name = "s3c2410-uart",
102 .id = 0,
103 .num_resources = ARRAY_SIZE(s3c_uart0_resource),
104 .resource = s3c_uart0_resource,
105};
106
107
108static struct platform_device s3c_uart1 = {
109 .name = "s3c2410-uart",
110 .id = 1,
111 .num_resources = ARRAY_SIZE(s3c_uart1_resource),
112 .resource = s3c_uart1_resource,
113};
114
115static struct platform_device s3c_uart2 = {
116 .name = "s3c2410-uart",
117 .id = 2,
118 .num_resources = ARRAY_SIZE(s3c_uart2_resource),
119 .resource = s3c_uart2_resource,
120};
121
122static struct platform_device *uart_devices[] __initdata = {
123 &s3c_uart0,
124 &s3c_uart1,
125 &s3c_uart2
126};
127
128static int s3c2410_uart_count = 0;
129
130/* uart registration process */ 61/* uart registration process */
131 62
132void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no) 63void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
133{ 64{
134 struct platform_device *platdev; 65 s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources, cfg, no);
135 int uart;
136
137 for (uart = 0; uart < no; uart++, cfg++) {
138 platdev = uart_devices[cfg->hwport];
139
140 s3c24xx_uart_devs[uart] = platdev;
141 platdev->dev.platform_data = cfg;
142 }
143
144 s3c2410_uart_count = uart;
145} 66}
146 67
147/* s3c2410_map_io 68/* s3c2410_map_io
@@ -193,5 +114,5 @@ int __init s3c2410_init(void)
193{ 114{
194 printk("S3C2410: Initialising architecture\n"); 115 printk("S3C2410: Initialising architecture\n");
195 116
196 return platform_add_devices(s3c24xx_uart_devs, s3c2410_uart_count); 117 return 0;
197} 118}
diff --git a/arch/arm/mach-s3c2410/s3c2440-irq.c b/arch/arm/mach-s3c2410/s3c2440-irq.c
index 278d0044c85d..acfe3870727b 100644
--- a/arch/arm/mach-s3c2410/s3c2440-irq.c
+++ b/arch/arm/mach-s3c2410/s3c2440-irq.c
@@ -100,73 +100,12 @@ static struct irqchip s3c_irq_wdtac97 = {
100 .ack = s3c_irq_wdtac97_ack, 100 .ack = s3c_irq_wdtac97_ack,
101}; 101};
102 102
103/* camera irq */
104
105static void s3c_irq_demux_cam(unsigned int irq,
106 struct irqdesc *desc,
107 struct pt_regs *regs)
108{
109 unsigned int subsrc, submsk;
110 struct irqdesc *mydesc;
111
112 /* read the current pending interrupts, and the mask
113 * for what it is available */
114
115 subsrc = __raw_readl(S3C2410_SUBSRCPND);
116 submsk = __raw_readl(S3C2410_INTSUBMSK);
117
118 subsrc &= ~submsk;
119 subsrc >>= 11;
120 subsrc &= 3;
121
122 if (subsrc != 0) {
123 if (subsrc & 1) {
124 mydesc = irq_desc + IRQ_S3C2440_CAM_C;
125 desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc, regs);
126 }
127 if (subsrc & 2) {
128 mydesc = irq_desc + IRQ_S3C2440_CAM_P;
129 desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc, regs);
130 }
131 }
132}
133
134#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
135
136static void
137s3c_irq_cam_mask(unsigned int irqno)
138{
139 s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
140}
141
142static void
143s3c_irq_cam_unmask(unsigned int irqno)
144{
145 s3c_irqsub_unmask(irqno, INTMSK_CAM);
146}
147
148static void
149s3c_irq_cam_ack(unsigned int irqno)
150{
151 s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
152}
153
154static struct irqchip s3c_irq_cam = {
155 .mask = s3c_irq_cam_mask,
156 .unmask = s3c_irq_cam_unmask,
157 .ack = s3c_irq_cam_ack,
158};
159
160static int s3c2440_irq_add(struct sys_device *sysdev) 103static int s3c2440_irq_add(struct sys_device *sysdev)
161{ 104{
162 unsigned int irqno; 105 unsigned int irqno;
163 106
164 printk("S3C2440: IRQ Support\n"); 107 printk("S3C2440: IRQ Support\n");
165 108
166 set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip);
167 set_irq_handler(IRQ_NFCON, do_level_IRQ);
168 set_irq_flags(IRQ_NFCON, IRQF_VALID);
169
170 /* add new chained handler for wdt, ac7 */ 109 /* add new chained handler for wdt, ac7 */
171 110
172 set_irq_chip(IRQ_WDT, &s3c_irq_level_chip); 111 set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
@@ -179,18 +118,6 @@ static int s3c2440_irq_add(struct sys_device *sysdev)
179 set_irq_flags(irqno, IRQF_VALID); 118 set_irq_flags(irqno, IRQF_VALID);
180 } 119 }
181 120
182 /* add chained handler for camera */
183
184 set_irq_chip(IRQ_CAM, &s3c_irq_level_chip);
185 set_irq_handler(IRQ_CAM, do_level_IRQ);
186 set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
187
188 for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
189 set_irq_chip(irqno, &s3c_irq_cam);
190 set_irq_handler(irqno, do_level_IRQ);
191 set_irq_flags(irqno, IRQF_VALID);
192 }
193
194 return 0; 121 return 0;
195} 122}
196 123
@@ -198,10 +125,10 @@ static struct sysdev_driver s3c2440_irq_driver = {
198 .add = s3c2440_irq_add, 125 .add = s3c2440_irq_add,
199}; 126};
200 127
201static int s3c24xx_irq_driver(void) 128static int s3c2440_irq_init(void)
202{ 129{
203 return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver); 130 return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver);
204} 131}
205 132
206arch_initcall(s3c24xx_irq_driver); 133arch_initcall(s3c2440_irq_init);
207 134
diff --git a/arch/arm/mach-s3c2410/s3c2440.c b/arch/arm/mach-s3c2410/s3c2440.c
index b7fe6d9453fb..0ab50f44f318 100644
--- a/arch/arm/mach-s3c2410/s3c2440.c
+++ b/arch/arm/mach-s3c2410/s3c2440.c
@@ -1,6 +1,6 @@
1/* linux/arch/arm/mach-s3c2410/s3c2440.c 1/* linux/arch/arm/mach-s3c2410/s3c2440.c
2 * 2 *
3 * Copyright (c) 2004-2005 Simtec Electronics 3 * Copyright (c) 2004-2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * 5 *
6 * Samsung S3C2440 Mobile CPU support 6 * Samsung S3C2440 Mobile CPU support
@@ -8,16 +8,6 @@
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 *
12 * Modifications:
13 * 24-Aug-2004 BJD Start of s3c2440 support
14 * 12-Oct-2004 BJD Moved clock info out to clock.c
15 * 01-Nov-2004 BJD Fixed clock build code
16 * 09-Nov-2004 BJD Added sysdev for power management
17 * 04-Nov-2004 BJD New serial registration
18 * 15-Nov-2004 BJD Rename the i2c device for the s3c2440
19 * 14-Jan-2005 BJD Moved clock init code into seperate function
20 * 14-Jan-2005 BJD Removed un-used clock bits
21*/ 11*/
22 12
23#include <linux/kernel.h> 13#include <linux/kernel.h>
@@ -50,234 +40,20 @@
50#include "cpu.h" 40#include "cpu.h"
51#include "pm.h" 41#include "pm.h"
52 42
53
54static struct map_desc s3c2440_iodesc[] __initdata = {
55 IODESC_ENT(USBHOST),
56 IODESC_ENT(CLKPWR),
57 IODESC_ENT(LCD),
58 IODESC_ENT(TIMER),
59 IODESC_ENT(ADC),
60 IODESC_ENT(WATCHDOG),
61};
62
63static struct resource s3c_uart0_resource[] = {
64 [0] = {
65 .start = S3C2410_PA_UART0,
66 .end = S3C2410_PA_UART0 + 0x3fff,
67 .flags = IORESOURCE_MEM,
68 },
69 [1] = {
70 .start = IRQ_S3CUART_RX0,
71 .end = IRQ_S3CUART_ERR0,
72 .flags = IORESOURCE_IRQ,
73 }
74
75};
76
77static struct resource s3c_uart1_resource[] = {
78 [0] = {
79 .start = S3C2410_PA_UART1,
80 .end = S3C2410_PA_UART1 + 0x3fff,
81 .flags = IORESOURCE_MEM,
82 },
83 [1] = {
84 .start = IRQ_S3CUART_RX1,
85 .end = IRQ_S3CUART_ERR1,
86 .flags = IORESOURCE_IRQ,
87 }
88};
89
90static struct resource s3c_uart2_resource[] = {
91 [0] = {
92 .start = S3C2410_PA_UART2,
93 .end = S3C2410_PA_UART2 + 0x3fff,
94 .flags = IORESOURCE_MEM,
95 },
96 [1] = {
97 .start = IRQ_S3CUART_RX2,
98 .end = IRQ_S3CUART_ERR2,
99 .flags = IORESOURCE_IRQ,
100 }
101};
102
103/* our uart devices */
104
105static struct platform_device s3c_uart0 = {
106 .name = "s3c2440-uart",
107 .id = 0,
108 .num_resources = ARRAY_SIZE(s3c_uart0_resource),
109 .resource = s3c_uart0_resource,
110};
111
112static struct platform_device s3c_uart1 = {
113 .name = "s3c2440-uart",
114 .id = 1,
115 .num_resources = ARRAY_SIZE(s3c_uart1_resource),
116 .resource = s3c_uart1_resource,
117};
118
119static struct platform_device s3c_uart2 = {
120 .name = "s3c2440-uart",
121 .id = 2,
122 .num_resources = ARRAY_SIZE(s3c_uart2_resource),
123 .resource = s3c_uart2_resource,
124};
125
126static struct platform_device *uart_devices[] __initdata = {
127 &s3c_uart0,
128 &s3c_uart1,
129 &s3c_uart2
130};
131
132/* uart initialisation */
133
134static int __initdata s3c2440_uart_count;
135
136void __init s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
137{
138 struct platform_device *platdev;
139 int uart;
140
141 for (uart = 0; uart < no; uart++, cfg++) {
142 platdev = uart_devices[cfg->hwport];
143
144 s3c24xx_uart_devs[uart] = platdev;
145 platdev->dev.platform_data = cfg;
146 }
147
148 s3c2440_uart_count = uart;
149}
150
151
152#ifdef CONFIG_PM
153
154static struct sleep_save s3c2440_sleep[] = {
155 SAVE_ITEM(S3C2440_DSC0),
156 SAVE_ITEM(S3C2440_DSC1),
157 SAVE_ITEM(S3C2440_GPJDAT),
158 SAVE_ITEM(S3C2440_GPJCON),
159 SAVE_ITEM(S3C2440_GPJUP)
160};
161
162static int s3c2440_suspend(struct sys_device *dev, pm_message_t state)
163{
164 s3c2410_pm_do_save(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
165 return 0;
166}
167
168static int s3c2440_resume(struct sys_device *dev)
169{
170 s3c2410_pm_do_restore(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
171 return 0;
172}
173
174#else
175#define s3c2440_suspend NULL
176#define s3c2440_resume NULL
177#endif
178
179struct sysdev_class s3c2440_sysclass = {
180 set_kset_name("s3c2440-core"),
181 .suspend = s3c2440_suspend,
182 .resume = s3c2440_resume
183};
184
185static struct sys_device s3c2440_sysdev = { 43static struct sys_device s3c2440_sysdev = {
186 .cls = &s3c2440_sysclass, 44 .cls = &s3c2440_sysclass,
187}; 45};
188 46
189void __init s3c2440_map_io(struct map_desc *mach_desc, int size) 47int __init s3c2440_init(void)
190{ 48{
191 /* register our io-tables */ 49 printk("S3C2440: Initialising architecture\n");
192
193 iotable_init(s3c2440_iodesc, ARRAY_SIZE(s3c2440_iodesc));
194 iotable_init(mach_desc, size);
195
196 /* rename any peripherals used differing from the s3c2410 */
197
198 s3c_device_i2c.name = "s3c2440-i2c";
199 s3c_device_nand.name = "s3c2440-nand";
200 50
201 /* change irq for watchdog */ 51 /* change irq for watchdog */
202 52
203 s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT; 53 s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
204 s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT; 54 s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT;
205}
206
207void __init s3c2440_init_clocks(int xtal)
208{
209 unsigned long clkdiv;
210 unsigned long camdiv;
211 unsigned long hclk, fclk, pclk;
212 int hdiv = 1;
213
214 /* now we've got our machine bits initialised, work out what
215 * clocks we've got */
216
217 fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
218
219 clkdiv = __raw_readl(S3C2410_CLKDIVN);
220 camdiv = __raw_readl(S3C2440_CAMDIVN);
221
222 /* work out clock scalings */
223
224 switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
225 case S3C2440_CLKDIVN_HDIVN_1:
226 hdiv = 1;
227 break;
228
229 case S3C2440_CLKDIVN_HDIVN_2:
230 hdiv = 2;
231 break;
232
233 case S3C2440_CLKDIVN_HDIVN_4_8:
234 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
235 break;
236
237 case S3C2440_CLKDIVN_HDIVN_3_6:
238 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
239 break;
240 }
241
242 hclk = fclk / hdiv;
243 pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
244
245 /* print brief summary of clocks, etc */
246
247 printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
248 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
249
250 /* initialise the clocks here, to allow other things like the
251 * console to use them, and to add new ones after the initialisation
252 */
253
254 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
255}
256
257/* need to register class before we actually register the device, and
258 * we also need to ensure that it has been initialised before any of the
259 * drivers even try to use it (even if not on an s3c2440 based system)
260 * as a driver which may support both 2410 and 2440 may try and use it.
261*/
262
263static int __init s3c2440_core_init(void)
264{
265 return sysdev_class_register(&s3c2440_sysclass);
266}
267
268core_initcall(s3c2440_core_init);
269
270int __init s3c2440_init(void)
271{
272 int ret;
273
274 printk("S3C2440: Initialising architecture\n");
275 55
276 ret = sysdev_register(&s3c2440_sysdev); 56 /* register our system device for everything else */
277 if (ret != 0)
278 printk(KERN_ERR "failed to register sysdev for s3c2440\n");
279 else
280 ret = platform_add_devices(s3c24xx_uart_devs, s3c2440_uart_count);
281 57
282 return ret; 58 return sysdev_register(&s3c2440_sysdev);
283} 59}
diff --git a/arch/arm/mach-s3c2410/s3c2442-clock.c b/arch/arm/mach-s3c2410/s3c2442-clock.c
new file mode 100644
index 000000000000..5b7b301eb522
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c2442-clock.c
@@ -0,0 +1,171 @@
1/* linux/arch/arm/mach-s3c2410/s3c2442-clock.c
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C2442 Clock support
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*/
23
24#include <linux/init.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/list.h>
28#include <linux/errno.h>
29#include <linux/err.h>
30#include <linux/device.h>
31#include <linux/sysdev.h>
32#include <linux/interrupt.h>
33#include <linux/ioport.h>
34#include <linux/mutex.h>
35#include <linux/clk.h>
36
37#include <asm/hardware.h>
38#include <asm/atomic.h>
39#include <asm/irq.h>
40#include <asm/io.h>
41
42#include <asm/arch/regs-clock.h>
43
44#include "clock.h"
45#include "cpu.h"
46
47/* S3C2442 extended clock support */
48
49static unsigned long s3c2442_camif_upll_round(struct clk *clk,
50 unsigned long rate)
51{
52 unsigned long parent_rate = clk_get_rate(clk->parent);
53 int div;
54
55 if (rate > parent_rate)
56 return parent_rate;
57
58 div = parent_rate / rate;
59
60 if (div == 3)
61 return parent_rate / 3;
62
63 /* note, we remove the +/- 1 calculations for the divisor */
64
65 div /= 2;
66
67 if (div < 1)
68 div = 1;
69 else if (div > 16)
70 div = 16;
71
72 return parent_rate / (div * 2);
73}
74
75static int s3c2442_camif_upll_setrate(struct clk *clk, unsigned long rate)
76{
77 unsigned long parent_rate = clk_get_rate(clk->parent);
78 unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
79
80 rate = s3c2442_camif_upll_round(clk, rate);
81
82 camdivn &= ~S3C2442_CAMDIVN_CAMCLK_DIV3;
83
84 if (rate == parent_rate) {
85 camdivn &= ~S3C2440_CAMDIVN_CAMCLK_SEL;
86 } else if ((parent_rate / rate) == 3) {
87 camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL;
88 camdivn |= S3C2442_CAMDIVN_CAMCLK_DIV3;
89 } else {
90 camdivn &= ~S3C2440_CAMDIVN_CAMCLK_MASK;
91 camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL;
92 camdivn |= (((parent_rate / rate) / 2) - 1);
93 }
94
95 __raw_writel(camdivn, S3C2440_CAMDIVN);
96
97 return 0;
98}
99
100/* Extra S3C2442 clocks */
101
102static struct clk s3c2442_clk_cam = {
103 .name = "camif",
104 .id = -1,
105 .enable = s3c24xx_clkcon_enable,
106 .ctrlbit = S3C2440_CLKCON_CAMERA,
107};
108
109static struct clk s3c2442_clk_cam_upll = {
110 .name = "camif-upll",
111 .id = -1,
112 .set_rate = s3c2442_camif_upll_setrate,
113 .round_rate = s3c2442_camif_upll_round,
114};
115
116static int s3c2442_clk_add(struct sys_device *sysdev)
117{
118 unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
119 unsigned long clkdivn;
120 struct clk *clk_h;
121 struct clk *clk_p;
122 struct clk *clk_upll;
123
124 printk("S3C2442: Clock Support, DVS %s\n",
125 (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
126
127 clk_p = clk_get(NULL, "pclk");
128 clk_h = clk_get(NULL, "hclk");
129 clk_upll = clk_get(NULL, "upll");
130
131 if (IS_ERR(clk_p) || IS_ERR(clk_h) || IS_ERR(clk_upll)) {
132 printk(KERN_ERR "S3C2442: Failed to get parent clocks\n");
133 return -EINVAL;
134 }
135
136 /* check rate of UPLL, and if it is near 96MHz, then change
137 * to using half the UPLL rate for the system */
138
139 if (clk_get_rate(clk_upll) > (94 * MHZ)) {
140 clk_usb_bus.rate = clk_get_rate(clk_upll) / 2;
141
142 mutex_lock(&clocks_mutex);
143
144 clkdivn = __raw_readl(S3C2410_CLKDIVN);
145 clkdivn |= S3C2440_CLKDIVN_UCLK;
146 __raw_writel(clkdivn, S3C2410_CLKDIVN);
147
148 mutex_unlock(&clocks_mutex);
149 }
150
151 s3c2442_clk_cam.parent = clk_h;
152 s3c2442_clk_cam_upll.parent = clk_upll;
153
154 s3c24xx_register_clock(&s3c2442_clk_cam);
155 s3c24xx_register_clock(&s3c2442_clk_cam_upll);
156
157 clk_disable(&s3c2442_clk_cam);
158
159 return 0;
160}
161
162static struct sysdev_driver s3c2442_clk_driver = {
163 .add = s3c2442_clk_add,
164};
165
166static __init int s3c2442_clk_init(void)
167{
168 return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_clk_driver);
169}
170
171arch_initcall(s3c2442_clk_init);
diff --git a/arch/arm/mach-s3c2410/s3c2442.c b/arch/arm/mach-s3c2410/s3c2442.c
new file mode 100644
index 000000000000..debae2430557
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c2442.c
@@ -0,0 +1,52 @@
1/* linux/arch/arm/mach-s3c2410/s3c2440.c
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Samsung S3C2442 Mobile CPU support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20#include <linux/sysdev.h>
21#include <linux/clk.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25#include <asm/mach/irq.h>
26
27#include <asm/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h>
30
31#include <asm/arch/regs-clock.h>
32#include <asm/arch/regs-serial.h>
33#include <asm/arch/regs-gpio.h>
34#include <asm/arch/regs-gpioj.h>
35#include <asm/arch/regs-dsc.h>
36
37#include "s3c2442.h"
38#include "clock.h"
39#include "devs.h"
40#include "cpu.h"
41#include "pm.h"
42
43static struct sys_device s3c2442_sysdev = {
44 .cls = &s3c2442_sysclass,
45};
46
47int __init s3c2442_init(void)
48{
49 printk("S3C2442: Initialising architecture\n");
50
51 return sysdev_register(&s3c2442_sysdev);
52}
diff --git a/arch/arm/mach-s3c2410/s3c2442.h b/arch/arm/mach-s3c2410/s3c2442.h
new file mode 100644
index 000000000000..0ae37d24866c
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c2442.h
@@ -0,0 +1,17 @@
1/* arch/arm/mach-s3c2410/s3c2442.h
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2442 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2442
14extern int s3c2442_init(void);
15#else
16#define s3c2442_init NULL
17#endif
diff --git a/arch/arm/mach-s3c2410/s3c244x-irq.c b/arch/arm/mach-s3c2410/s3c244x-irq.c
new file mode 100644
index 000000000000..2aadca1ce7eb
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c244x-irq.c
@@ -0,0 +1,142 @@
1/* linux/arch/arm/mach-s3c2410/s3c2440-irq.c
2 *
3 * Copyright (c) 2003,2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 * Changelog:
21 * 25-Jul-2005 BJD Split from irq.c
22 *
23*/
24
25#include <linux/init.h>
26#include <linux/module.h>
27#include <linux/interrupt.h>
28#include <linux/ioport.h>
29#include <linux/ptrace.h>
30#include <linux/sysdev.h>
31
32#include <asm/hardware.h>
33#include <asm/irq.h>
34#include <asm/io.h>
35
36#include <asm/mach/irq.h>
37
38#include <asm/arch/regs-irq.h>
39#include <asm/arch/regs-gpio.h>
40
41#include "cpu.h"
42#include "pm.h"
43#include "irq.h"
44
45/* camera irq */
46
47static void s3c_irq_demux_cam(unsigned int irq,
48 struct irqdesc *desc,
49 struct pt_regs *regs)
50{
51 unsigned int subsrc, submsk;
52 struct irqdesc *mydesc;
53
54 /* read the current pending interrupts, and the mask
55 * for what it is available */
56
57 subsrc = __raw_readl(S3C2410_SUBSRCPND);
58 submsk = __raw_readl(S3C2410_INTSUBMSK);
59
60 subsrc &= ~submsk;
61 subsrc >>= 11;
62 subsrc &= 3;
63
64 if (subsrc != 0) {
65 if (subsrc & 1) {
66 mydesc = irq_desc + IRQ_S3C2440_CAM_C;
67 desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc, regs);
68 }
69 if (subsrc & 2) {
70 mydesc = irq_desc + IRQ_S3C2440_CAM_P;
71 desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc, regs);
72 }
73 }
74}
75
76#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
77
78static void
79s3c_irq_cam_mask(unsigned int irqno)
80{
81 s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
82}
83
84static void
85s3c_irq_cam_unmask(unsigned int irqno)
86{
87 s3c_irqsub_unmask(irqno, INTMSK_CAM);
88}
89
90static void
91s3c_irq_cam_ack(unsigned int irqno)
92{
93 s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
94}
95
96static struct irqchip s3c_irq_cam = {
97 .mask = s3c_irq_cam_mask,
98 .unmask = s3c_irq_cam_unmask,
99 .ack = s3c_irq_cam_ack,
100};
101
102static int s3c244x_irq_add(struct sys_device *sysdev)
103{
104 unsigned int irqno;
105
106 set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip);
107 set_irq_handler(IRQ_NFCON, do_level_IRQ);
108 set_irq_flags(IRQ_NFCON, IRQF_VALID);
109
110 /* add chained handler for camera */
111
112 set_irq_chip(IRQ_CAM, &s3c_irq_level_chip);
113 set_irq_handler(IRQ_CAM, do_level_IRQ);
114 set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
115
116 for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
117 set_irq_chip(irqno, &s3c_irq_cam);
118 set_irq_handler(irqno, do_level_IRQ);
119 set_irq_flags(irqno, IRQF_VALID);
120 }
121
122 return 0;
123}
124
125static struct sysdev_driver s3c244x_irq_driver = {
126 .add = s3c244x_irq_add,
127};
128
129static int s3c2440_irq_init(void)
130{
131 return sysdev_driver_register(&s3c2440_sysclass, &s3c244x_irq_driver);
132}
133
134arch_initcall(s3c2440_irq_init);
135
136
137static int s3c2442_irq_init(void)
138{
139 return sysdev_driver_register(&s3c2442_sysclass, &s3c244x_irq_driver);
140}
141
142arch_initcall(s3c2442_irq_init);
diff --git a/arch/arm/mach-s3c2410/s3c244x.c b/arch/arm/mach-s3c2410/s3c244x.c
new file mode 100644
index 000000000000..96852a7000db
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c244x.c
@@ -0,0 +1,182 @@
1/* linux/arch/arm/mach-s3c2410/s3c244x.c
2 *
3 * Copyright (c) 2004-2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Samsung S3C2440 and S3C2442 Mobile CPU support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20#include <linux/sysdev.h>
21#include <linux/clk.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25#include <asm/mach/irq.h>
26
27#include <asm/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h>
30
31#include <asm/arch/regs-clock.h>
32#include <asm/arch/regs-serial.h>
33#include <asm/arch/regs-gpio.h>
34#include <asm/arch/regs-gpioj.h>
35#include <asm/arch/regs-dsc.h>
36
37#include "s3c2440.h"
38#include "s3c244x.h"
39#include "clock.h"
40#include "devs.h"
41#include "cpu.h"
42#include "pm.h"
43
44static struct map_desc s3c244x_iodesc[] __initdata = {
45 IODESC_ENT(CLKPWR),
46 IODESC_ENT(TIMER),
47 IODESC_ENT(WATCHDOG),
48 IODESC_ENT(LCD),
49 IODESC_ENT(ADC),
50 IODESC_ENT(USBHOST),
51};
52
53/* uart initialisation */
54
55void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no)
56{
57 s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
58}
59
60void __init s3c244x_map_io(struct map_desc *mach_desc, int size)
61{
62 /* register our io-tables */
63
64 iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc));
65 iotable_init(mach_desc, size);
66
67 /* rename any peripherals used differing from the s3c2410 */
68
69 s3c_device_i2c.name = "s3c2440-i2c";
70 s3c_device_nand.name = "s3c2440-nand";
71}
72
73void __init s3c244x_init_clocks(int xtal)
74{
75 unsigned long clkdiv;
76 unsigned long camdiv;
77 unsigned long hclk, fclk, pclk;
78 int hdiv = 1;
79
80 /* now we've got our machine bits initialised, work out what
81 * clocks we've got */
82
83 fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
84
85 clkdiv = __raw_readl(S3C2410_CLKDIVN);
86 camdiv = __raw_readl(S3C2440_CAMDIVN);
87
88 /* work out clock scalings */
89
90 switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
91 case S3C2440_CLKDIVN_HDIVN_1:
92 hdiv = 1;
93 break;
94
95 case S3C2440_CLKDIVN_HDIVN_2:
96 hdiv = 2;
97 break;
98
99 case S3C2440_CLKDIVN_HDIVN_4_8:
100 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
101 break;
102
103 case S3C2440_CLKDIVN_HDIVN_3_6:
104 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
105 break;
106 }
107
108 hclk = fclk / hdiv;
109 pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
110
111 /* print brief summary of clocks, etc */
112
113 printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
114 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
115
116 /* initialise the clocks here, to allow other things like the
117 * console to use them, and to add new ones after the initialisation
118 */
119
120 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
121}
122
123#ifdef CONFIG_PM
124
125static struct sleep_save s3c244x_sleep[] = {
126 SAVE_ITEM(S3C2440_DSC0),
127 SAVE_ITEM(S3C2440_DSC1),
128 SAVE_ITEM(S3C2440_GPJDAT),
129 SAVE_ITEM(S3C2440_GPJCON),
130 SAVE_ITEM(S3C2440_GPJUP)
131};
132
133static int s3c244x_suspend(struct sys_device *dev, pm_message_t state)
134{
135 s3c2410_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
136 return 0;
137}
138
139static int s3c244x_resume(struct sys_device *dev)
140{
141 s3c2410_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
142 return 0;
143}
144
145#else
146#define s3c244x_suspend NULL
147#define s3c244x_resume NULL
148#endif
149
150/* Since the S3C2442 and S3C2440 share items, put both sysclasses here */
151
152struct sysdev_class s3c2440_sysclass = {
153 set_kset_name("s3c2440-core"),
154 .suspend = s3c244x_suspend,
155 .resume = s3c244x_resume
156};
157
158struct sysdev_class s3c2442_sysclass = {
159 set_kset_name("s3c2442-core"),
160 .suspend = s3c244x_suspend,
161 .resume = s3c244x_resume
162};
163
164/* need to register class before we actually register the device, and
165 * we also need to ensure that it has been initialised before any of the
166 * drivers even try to use it (even if not on an s3c2440 based system)
167 * as a driver which may support both 2410 and 2440 may try and use it.
168*/
169
170static int __init s3c2440_core_init(void)
171{
172 return sysdev_class_register(&s3c2440_sysclass);
173}
174
175core_initcall(s3c2440_core_init);
176
177static int __init s3c2442_core_init(void)
178{
179 return sysdev_class_register(&s3c2442_sysclass);
180}
181
182core_initcall(s3c2442_core_init);
diff --git a/arch/arm/mach-s3c2410/s3c244x.h b/arch/arm/mach-s3c2410/s3c244x.h
new file mode 100644
index 000000000000..3e7f5f75134d
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c244x.h
@@ -0,0 +1,25 @@
1/* arch/arm/mach-s3c2410/s3c2440.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for S3C2440 and S3C2442 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
14
15extern void s3c244x_map_io(struct map_desc *mach_desc, int size);
16
17extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no);
18
19extern void s3c244x_init_clocks(int xtal);
20
21#else
22#define s3c244x_init_clocks NULL
23#define s3c244x_init_uarts NULL
24#define s3c244x_map_io NULL
25#endif
diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S
index 73de2eaca22a..5f6761ed96b2 100644
--- a/arch/arm/mach-s3c2410/sleep.S
+++ b/arch/arm/mach-s3c2410/sleep.S
@@ -66,7 +66,9 @@ ENTRY(s3c2410_cpu_suspend)
66 @@ flush the caches to ensure everything is back out to 66 @@ flush the caches to ensure everything is back out to
67 @@ SDRAM before the core powers down 67 @@ SDRAM before the core powers down
68 68
69#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
69 bl arm920_flush_kern_cache_all 70 bl arm920_flush_kern_cache_all
71#endif
70 72
71 @@ prepare cpu to sleep 73 @@ prepare cpu to sleep
72 74
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-04 17:02:03 -0500