diff options
Diffstat (limited to 'arch/arm/mach-s3c2410/sleep.S')
-rw-r--r-- | arch/arm/mach-s3c2410/sleep.S | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S index e977aa1ffe18..2018c2e1dcc5 100644 --- a/arch/arm/mach-s3c2410/sleep.S +++ b/arch/arm/mach-s3c2410/sleep.S | |||
@@ -75,39 +75,6 @@ ENTRY(s3c2410_cpu_save) | |||
75 | mov r0, #0 | 75 | mov r0, #0 |
76 | ldmfd sp, { r4 - r12, pc } | 76 | ldmfd sp, { r4 - r12, pc } |
77 | 77 | ||
78 | /* s3c2410_cpu_suspend | ||
79 | * | ||
80 | * put the cpu into sleep mode | ||
81 | */ | ||
82 | |||
83 | ENTRY(s3c2410_cpu_suspend) | ||
84 | @@ prepare cpu to sleep | ||
85 | |||
86 | ldr r4, =S3C2410_REFRESH | ||
87 | ldr r5, =S3C24XX_MISCCR | ||
88 | ldr r6, =S3C2410_CLKCON | ||
89 | ldr r7, [ r4 ] @ get REFRESH (and ensure in TLB) | ||
90 | ldr r8, [ r5 ] @ get MISCCR (and ensure in TLB) | ||
91 | ldr r9, [ r6 ] @ get CLKCON (and ensure in TLB) | ||
92 | |||
93 | orr r7, r7, #S3C2410_REFRESH_SELF @ SDRAM sleep command | ||
94 | orr r8, r8, #S3C2410_MISCCR_SDSLEEP @ SDRAM power-down signals | ||
95 | orr r9, r9, #S3C2410_CLKCON_POWER @ power down command | ||
96 | |||
97 | teq pc, #0 @ first as a trial-run to load cache | ||
98 | bl s3c2410_do_sleep | ||
99 | teq r0, r0 @ now do it for real | ||
100 | b s3c2410_do_sleep @ | ||
101 | |||
102 | @@ align next bit of code to cache line | ||
103 | .align 8 | ||
104 | s3c2410_do_sleep: | ||
105 | streq r7, [ r4 ] @ SDRAM sleep command | ||
106 | streq r8, [ r5 ] @ SDRAM power-down config | ||
107 | streq r9, [ r6 ] @ CPU sleep | ||
108 | 1: beq 1b | ||
109 | mov pc, r14 | ||
110 | |||
111 | @@ return to the caller, after having the MMU | 78 | @@ return to the caller, after having the MMU |
112 | @@ turned on, this restores the last bits from the | 79 | @@ turned on, this restores the last bits from the |
113 | @@ stack | 80 | @@ stack |