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-rw-r--r--arch/arm/mach-s3c2410/s3c2440.c234
1 files changed, 5 insertions, 229 deletions
diff --git a/arch/arm/mach-s3c2410/s3c2440.c b/arch/arm/mach-s3c2410/s3c2440.c
index b7fe6d9453fb..0ab50f44f318 100644
--- a/arch/arm/mach-s3c2410/s3c2440.c
+++ b/arch/arm/mach-s3c2410/s3c2440.c
@@ -1,6 +1,6 @@
1/* linux/arch/arm/mach-s3c2410/s3c2440.c 1/* linux/arch/arm/mach-s3c2410/s3c2440.c
2 * 2 *
3 * Copyright (c) 2004-2005 Simtec Electronics 3 * Copyright (c) 2004-2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * 5 *
6 * Samsung S3C2440 Mobile CPU support 6 * Samsung S3C2440 Mobile CPU support
@@ -8,16 +8,6 @@
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 *
12 * Modifications:
13 * 24-Aug-2004 BJD Start of s3c2440 support
14 * 12-Oct-2004 BJD Moved clock info out to clock.c
15 * 01-Nov-2004 BJD Fixed clock build code
16 * 09-Nov-2004 BJD Added sysdev for power management
17 * 04-Nov-2004 BJD New serial registration
18 * 15-Nov-2004 BJD Rename the i2c device for the s3c2440
19 * 14-Jan-2005 BJD Moved clock init code into seperate function
20 * 14-Jan-2005 BJD Removed un-used clock bits
21*/ 11*/
22 12
23#include <linux/kernel.h> 13#include <linux/kernel.h>
@@ -50,234 +40,20 @@
50#include "cpu.h" 40#include "cpu.h"
51#include "pm.h" 41#include "pm.h"
52 42
53
54static struct map_desc s3c2440_iodesc[] __initdata = {
55 IODESC_ENT(USBHOST),
56 IODESC_ENT(CLKPWR),
57 IODESC_ENT(LCD),
58 IODESC_ENT(TIMER),
59 IODESC_ENT(ADC),
60 IODESC_ENT(WATCHDOG),
61};
62
63static struct resource s3c_uart0_resource[] = {
64 [0] = {
65 .start = S3C2410_PA_UART0,
66 .end = S3C2410_PA_UART0 + 0x3fff,
67 .flags = IORESOURCE_MEM,
68 },
69 [1] = {
70 .start = IRQ_S3CUART_RX0,
71 .end = IRQ_S3CUART_ERR0,
72 .flags = IORESOURCE_IRQ,
73 }
74
75};
76
77static struct resource s3c_uart1_resource[] = {
78 [0] = {
79 .start = S3C2410_PA_UART1,
80 .end = S3C2410_PA_UART1 + 0x3fff,
81 .flags = IORESOURCE_MEM,
82 },
83 [1] = {
84 .start = IRQ_S3CUART_RX1,
85 .end = IRQ_S3CUART_ERR1,
86 .flags = IORESOURCE_IRQ,
87 }
88};
89
90static struct resource s3c_uart2_resource[] = {
91 [0] = {
92 .start = S3C2410_PA_UART2,
93 .end = S3C2410_PA_UART2 + 0x3fff,
94 .flags = IORESOURCE_MEM,
95 },
96 [1] = {
97 .start = IRQ_S3CUART_RX2,
98 .end = IRQ_S3CUART_ERR2,
99 .flags = IORESOURCE_IRQ,
100 }
101};
102
103/* our uart devices */
104
105static struct platform_device s3c_uart0 = {
106 .name = "s3c2440-uart",
107 .id = 0,
108 .num_resources = ARRAY_SIZE(s3c_uart0_resource),
109 .resource = s3c_uart0_resource,
110};
111
112static struct platform_device s3c_uart1 = {
113 .name = "s3c2440-uart",
114 .id = 1,
115 .num_resources = ARRAY_SIZE(s3c_uart1_resource),
116 .resource = s3c_uart1_resource,
117};
118
119static struct platform_device s3c_uart2 = {
120 .name = "s3c2440-uart",
121 .id = 2,
122 .num_resources = ARRAY_SIZE(s3c_uart2_resource),
123 .resource = s3c_uart2_resource,
124};
125
126static struct platform_device *uart_devices[] __initdata = {
127 &s3c_uart0,
128 &s3c_uart1,
129 &s3c_uart2
130};
131
132/* uart initialisation */
133
134static int __initdata s3c2440_uart_count;
135
136void __init s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
137{
138 struct platform_device *platdev;
139 int uart;
140
141 for (uart = 0; uart < no; uart++, cfg++) {
142 platdev = uart_devices[cfg->hwport];
143
144 s3c24xx_uart_devs[uart] = platdev;
145 platdev->dev.platform_data = cfg;
146 }
147
148 s3c2440_uart_count = uart;
149}
150
151
152#ifdef CONFIG_PM
153
154static struct sleep_save s3c2440_sleep[] = {
155 SAVE_ITEM(S3C2440_DSC0),
156 SAVE_ITEM(S3C2440_DSC1),
157 SAVE_ITEM(S3C2440_GPJDAT),
158 SAVE_ITEM(S3C2440_GPJCON),
159 SAVE_ITEM(S3C2440_GPJUP)
160};
161
162static int s3c2440_suspend(struct sys_device *dev, pm_message_t state)
163{
164 s3c2410_pm_do_save(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
165 return 0;
166}
167
168static int s3c2440_resume(struct sys_device *dev)
169{
170 s3c2410_pm_do_restore(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
171 return 0;
172}
173
174#else
175#define s3c2440_suspend NULL
176#define s3c2440_resume NULL
177#endif
178
179struct sysdev_class s3c2440_sysclass = {
180 set_kset_name("s3c2440-core"),
181 .suspend = s3c2440_suspend,
182 .resume = s3c2440_resume
183};
184
185static struct sys_device s3c2440_sysdev = { 43static struct sys_device s3c2440_sysdev = {
186 .cls = &s3c2440_sysclass, 44 .cls = &s3c2440_sysclass,
187}; 45};
188 46
189void __init s3c2440_map_io(struct map_desc *mach_desc, int size) 47int __init s3c2440_init(void)
190{ 48{
191 /* register our io-tables */ 49 printk("S3C2440: Initialising architecture\n");
192
193 iotable_init(s3c2440_iodesc, ARRAY_SIZE(s3c2440_iodesc));
194 iotable_init(mach_desc, size);
195
196 /* rename any peripherals used differing from the s3c2410 */
197
198 s3c_device_i2c.name = "s3c2440-i2c";
199 s3c_device_nand.name = "s3c2440-nand";
200 50
201 /* change irq for watchdog */ 51 /* change irq for watchdog */
202 52
203 s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT; 53 s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
204 s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT; 54 s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT;
205}
206
207void __init s3c2440_init_clocks(int xtal)
208{
209 unsigned long clkdiv;
210 unsigned long camdiv;
211 unsigned long hclk, fclk, pclk;
212 int hdiv = 1;
213
214 /* now we've got our machine bits initialised, work out what
215 * clocks we've got */
216
217 fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
218
219 clkdiv = __raw_readl(S3C2410_CLKDIVN);
220 camdiv = __raw_readl(S3C2440_CAMDIVN);
221
222 /* work out clock scalings */
223
224 switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
225 case S3C2440_CLKDIVN_HDIVN_1:
226 hdiv = 1;
227 break;
228
229 case S3C2440_CLKDIVN_HDIVN_2:
230 hdiv = 2;
231 break;
232
233 case S3C2440_CLKDIVN_HDIVN_4_8:
234 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
235 break;
236
237 case S3C2440_CLKDIVN_HDIVN_3_6:
238 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
239 break;
240 }
241
242 hclk = fclk / hdiv;
243 pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
244
245 /* print brief summary of clocks, etc */
246
247 printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
248 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
249
250 /* initialise the clocks here, to allow other things like the
251 * console to use them, and to add new ones after the initialisation
252 */
253
254 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
255}
256
257/* need to register class before we actually register the device, and
258 * we also need to ensure that it has been initialised before any of the
259 * drivers even try to use it (even if not on an s3c2440 based system)
260 * as a driver which may support both 2410 and 2440 may try and use it.
261*/
262
263static int __init s3c2440_core_init(void)
264{
265 return sysdev_class_register(&s3c2440_sysclass);
266}
267
268core_initcall(s3c2440_core_init);
269
270int __init s3c2440_init(void)
271{
272 int ret;
273
274 printk("S3C2440: Initialising architecture\n");
275 55
276 ret = sysdev_register(&s3c2440_sysdev); 56 /* register our system device for everything else */
277 if (ret != 0)
278 printk(KERN_ERR "failed to register sysdev for s3c2440\n");
279 else
280 ret = platform_add_devices(s3c24xx_uart_devs, s3c2440_uart_count);
281 57
282 return ret; 58 return sysdev_register(&s3c2440_sysdev);
283} 59}
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