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-rw-r--r--arch/arm/mach-s3c2410/s3c2440.c142
1 files changed, 4 insertions, 138 deletions
diff --git a/arch/arm/mach-s3c2410/s3c2440.c b/arch/arm/mach-s3c2410/s3c2440.c
index 54681740f9f1..0ab50f44f318 100644
--- a/arch/arm/mach-s3c2410/s3c2440.c
+++ b/arch/arm/mach-s3c2410/s3c2440.c
@@ -1,6 +1,6 @@
1/* linux/arch/arm/mach-s3c2410/s3c2440.c 1/* linux/arch/arm/mach-s3c2410/s3c2440.c
2 * 2 *
3 * Copyright (c) 2004-2005 Simtec Electronics 3 * Copyright (c) 2004-2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * 5 *
6 * Samsung S3C2440 Mobile CPU support 6 * Samsung S3C2440 Mobile CPU support
@@ -8,16 +8,6 @@
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 *
12 * Modifications:
13 * 24-Aug-2004 BJD Start of s3c2440 support
14 * 12-Oct-2004 BJD Moved clock info out to clock.c
15 * 01-Nov-2004 BJD Fixed clock build code
16 * 09-Nov-2004 BJD Added sysdev for power management
17 * 04-Nov-2004 BJD New serial registration
18 * 15-Nov-2004 BJD Rename the i2c device for the s3c2440
19 * 14-Jan-2005 BJD Moved clock init code into seperate function
20 * 14-Jan-2005 BJD Removed un-used clock bits
21*/ 11*/
22 12
23#include <linux/kernel.h> 13#include <linux/kernel.h>
@@ -50,144 +40,20 @@
50#include "cpu.h" 40#include "cpu.h"
51#include "pm.h" 41#include "pm.h"
52 42
53
54static struct map_desc s3c2440_iodesc[] __initdata = {
55 IODESC_ENT(USBHOST),
56 IODESC_ENT(CLKPWR),
57 IODESC_ENT(LCD),
58 IODESC_ENT(TIMER),
59 IODESC_ENT(ADC),
60 IODESC_ENT(WATCHDOG),
61};
62
63/* uart initialisation */
64
65void __init s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
66{
67 s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
68}
69
70#ifdef CONFIG_PM
71
72static struct sleep_save s3c2440_sleep[] = {
73 SAVE_ITEM(S3C2440_DSC0),
74 SAVE_ITEM(S3C2440_DSC1),
75 SAVE_ITEM(S3C2440_GPJDAT),
76 SAVE_ITEM(S3C2440_GPJCON),
77 SAVE_ITEM(S3C2440_GPJUP)
78};
79
80static int s3c2440_suspend(struct sys_device *dev, pm_message_t state)
81{
82 s3c2410_pm_do_save(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
83 return 0;
84}
85
86static int s3c2440_resume(struct sys_device *dev)
87{
88 s3c2410_pm_do_restore(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
89 return 0;
90}
91
92#else
93#define s3c2440_suspend NULL
94#define s3c2440_resume NULL
95#endif
96
97struct sysdev_class s3c2440_sysclass = {
98 set_kset_name("s3c2440-core"),
99 .suspend = s3c2440_suspend,
100 .resume = s3c2440_resume
101};
102
103static struct sys_device s3c2440_sysdev = { 43static struct sys_device s3c2440_sysdev = {
104 .cls = &s3c2440_sysclass, 44 .cls = &s3c2440_sysclass,
105}; 45};
106 46
107void __init s3c2440_map_io(struct map_desc *mach_desc, int size) 47int __init s3c2440_init(void)
108{ 48{
109 /* register our io-tables */ 49 printk("S3C2440: Initialising architecture\n");
110
111 iotable_init(s3c2440_iodesc, ARRAY_SIZE(s3c2440_iodesc));
112 iotable_init(mach_desc, size);
113
114 /* rename any peripherals used differing from the s3c2410 */
115
116 s3c_device_i2c.name = "s3c2440-i2c";
117 s3c_device_nand.name = "s3c2440-nand";
118 50
119 /* change irq for watchdog */ 51 /* change irq for watchdog */
120 52
121 s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT; 53 s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
122 s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT; 54 s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT;
123}
124 55
125void __init s3c2440_init_clocks(int xtal) 56 /* register our system device for everything else */
126{
127 unsigned long clkdiv;
128 unsigned long camdiv;
129 unsigned long hclk, fclk, pclk;
130 int hdiv = 1;
131
132 /* now we've got our machine bits initialised, work out what
133 * clocks we've got */
134
135 fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
136
137 clkdiv = __raw_readl(S3C2410_CLKDIVN);
138 camdiv = __raw_readl(S3C2440_CAMDIVN);
139
140 /* work out clock scalings */
141
142 switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
143 case S3C2440_CLKDIVN_HDIVN_1:
144 hdiv = 1;
145 break;
146
147 case S3C2440_CLKDIVN_HDIVN_2:
148 hdiv = 2;
149 break;
150
151 case S3C2440_CLKDIVN_HDIVN_4_8:
152 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
153 break;
154
155 case S3C2440_CLKDIVN_HDIVN_3_6:
156 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
157 break;
158 }
159
160 hclk = fclk / hdiv;
161 pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
162
163 /* print brief summary of clocks, etc */
164
165 printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
166 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
167
168 /* initialise the clocks here, to allow other things like the
169 * console to use them, and to add new ones after the initialisation
170 */
171
172 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
173}
174
175/* need to register class before we actually register the device, and
176 * we also need to ensure that it has been initialised before any of the
177 * drivers even try to use it (even if not on an s3c2440 based system)
178 * as a driver which may support both 2410 and 2440 may try and use it.
179*/
180
181static int __init s3c2440_core_init(void)
182{
183 return sysdev_class_register(&s3c2440_sysclass);
184}
185
186core_initcall(s3c2440_core_init);
187
188int __init s3c2440_init(void)
189{
190 printk("S3C2440: Initialising architecture\n");
191 57
192 return sysdev_register(&s3c2440_sysdev); 58 return sysdev_register(&s3c2440_sysdev);
193} 59}