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Diffstat (limited to 'arch/arm/mach-s3c2410/s3c2440-irq.c')
-rw-r--r--arch/arm/mach-s3c2410/s3c2440-irq.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-s3c2410/s3c2440-irq.c b/arch/arm/mach-s3c2410/s3c2440-irq.c
index 39db0752d53b..1ba19b27ab05 100644
--- a/arch/arm/mach-s3c2410/s3c2440-irq.c
+++ b/arch/arm/mach-s3c2410/s3c2440-irq.c
@@ -42,10 +42,10 @@
42/* WDT/AC97 */ 42/* WDT/AC97 */
43 43
44static void s3c_irq_demux_wdtac97(unsigned int irq, 44static void s3c_irq_demux_wdtac97(unsigned int irq,
45 struct irqdesc *desc) 45 struct irq_desc *desc)
46{ 46{
47 unsigned int subsrc, submsk; 47 unsigned int subsrc, submsk;
48 struct irqdesc *mydesc; 48 struct irq_desc *mydesc;
49 49
50 /* read the current pending interrupts, and the mask 50 /* read the current pending interrupts, and the mask
51 * for what it is available */ 51 * for what it is available */
@@ -90,7 +90,7 @@ s3c_irq_wdtac97_ack(unsigned int irqno)
90 s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13); 90 s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13);
91} 91}
92 92
93static struct irqchip s3c_irq_wdtac97 = { 93static struct irq_chip s3c_irq_wdtac97 = {
94 .mask = s3c_irq_wdtac97_mask, 94 .mask = s3c_irq_wdtac97_mask,
95 .unmask = s3c_irq_wdtac97_unmask, 95 .unmask = s3c_irq_wdtac97_unmask,
96 .ack = s3c_irq_wdtac97_ack, 96 .ack = s3c_irq_wdtac97_ack,
@@ -105,12 +105,12 @@ static int s3c2440_irq_add(struct sys_device *sysdev)
105 /* add new chained handler for wdt, ac7 */ 105 /* add new chained handler for wdt, ac7 */
106 106
107 set_irq_chip(IRQ_WDT, &s3c_irq_level_chip); 107 set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
108 set_irq_handler(IRQ_WDT, do_level_IRQ); 108 set_irq_handler(IRQ_WDT, handle_level_irq);
109 set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97); 109 set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
110 110
111 for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) { 111 for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) {
112 set_irq_chip(irqno, &s3c_irq_wdtac97); 112 set_irq_chip(irqno, &s3c_irq_wdtac97);
113 set_irq_handler(irqno, do_level_IRQ); 113 set_irq_handler(irqno, handle_level_irq);
114 set_irq_flags(irqno, IRQF_VALID); 114 set_irq_flags(irqno, IRQF_VALID);
115 } 115 }
116 116