1 files changed, 13 insertions, 2 deletions

diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c
index 966119c8efee..725636fc4dc3 100644
--- a/arch/arm/mach-s3c2410/pm.c
+++ b/arch/arm/mach-s3c2410/pm.c
@@ -60,10 +60,10 @@ static void s3c2410_pm_prepare(void)
                 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
         }
 
-        /* the RX3715 uses similar code and the same H1940 and the
+        /* RX3715 and RX1950 use similar to H1940 code and the
          * same offsets for resume and checksum pointers */
 
-        if (machine_is_rx3715()) {
+        if (machine_is_rx3715() || machine_is_rx1950()) {
                 void *base = phys_to_virt(H1940_SUSPEND_CHECK);
                 unsigned long ptr;
                 unsigned long calc = 0;
@@ -79,6 +79,17 @@ static void s3c2410_pm_prepare(void)
         if ( machine_is_aml_m5900() )
                 s3c2410_gpio_setpin(S3C2410_GPF(2), 1);
 
+        if (machine_is_rx1950()) {
+                /* According to S3C2442 user's manual, page 7-17,
+                 * when the system is operating in NAND boot mode,
+                 * the hardware pin configuration - EINT[23:21] –
+                 * must be set as input for starting up after
+                 * wakeup from sleep mode
+                 */
+                s3c_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPIO_INPUT);
+                s3c_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPIO_INPUT);
+                s3c_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPIO_INPUT);
+        }
 }
 
 static int s3c2410_pm_resume(struct sys_device *dev)