diff options
Diffstat (limited to 'arch/arm/mach-s3c2410/include/mach/regs-irq.h')
-rw-r--r-- | arch/arm/mach-s3c2410/include/mach/regs-irq.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-irq.h b/arch/arm/mach-s3c2410/include/mach/regs-irq.h index de86ee8812bd..0f07ba30b1fb 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-irq.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-irq.h | |||
@@ -27,6 +27,16 @@ | |||
27 | #define S3C2410_SUBSRCPND S3C2410_IRQREG(0x018) | 27 | #define S3C2410_SUBSRCPND S3C2410_IRQREG(0x018) |
28 | #define S3C2410_INTSUBMSK S3C2410_IRQREG(0x01C) | 28 | #define S3C2410_INTSUBMSK S3C2410_IRQREG(0x01C) |
29 | 29 | ||
30 | #define S3C2416_PRIORITY_MODE1 S3C2410_IRQREG(0x030) | ||
31 | #define S3C2416_PRIORITY_UPDATE1 S3C2410_IRQREG(0x034) | ||
32 | #define S3C2416_SRCPND2 S3C2410_IRQREG(0x040) | ||
33 | #define S3C2416_INTMOD2 S3C2410_IRQREG(0x044) | ||
34 | #define S3C2416_INTMSK2 S3C2410_IRQREG(0x048) | ||
35 | #define S3C2416_INTPND2 S3C2410_IRQREG(0x050) | ||
36 | #define S3C2416_INTOFFSET2 S3C2410_IRQREG(0x054) | ||
37 | #define S3C2416_PRIORITY_MODE2 S3C2410_IRQREG(0x070) | ||
38 | #define S3C2416_PRIORITY_UPDATE2 S3C2410_IRQREG(0x074) | ||
39 | |||
30 | /* mask: 0=enable, 1=disable | 40 | /* mask: 0=enable, 1=disable |
31 | * 1 bit EINT, 4=EINT4, 23=EINT23 | 41 | * 1 bit EINT, 4=EINT4, 23=EINT23 |
32 | * EINT0,1,2,3 are not handled here. | 42 | * EINT0,1,2,3 are not handled here. |