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-rw-r--r--arch/arm/mach-s3c2410/gpio.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c
index 94f1776cf312..23ea3d5fa09c 100644
--- a/arch/arm/mach-s3c2410/gpio.c
+++ b/arch/arm/mach-s3c2410/gpio.c
@@ -30,6 +30,7 @@
30 * 04-Oct-2004 BJD Added irq filter controls for GPIO 30 * 04-Oct-2004 BJD Added irq filter controls for GPIO
31 * 05-Nov-2004 BJD EXPORT_SYMBOL() added for all code 31 * 05-Nov-2004 BJD EXPORT_SYMBOL() added for all code
32 * 13-Mar-2005 BJD Updates for __iomem 32 * 13-Mar-2005 BJD Updates for __iomem
33 * 26-Oct-2005 BJD Added generic configuration types
33 */ 34 */
34 35
35 36
@@ -58,6 +59,27 @@ void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
58 mask = 3 << S3C2410_GPIO_OFFSET(pin)*2; 59 mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
59 } 60 }
60 61
62 switch (function) {
63 case S3C2410_GPIO_LEAVE:
64 mask = 0;
65 function = 0;
66 break;
67
68 case S3C2410_GPIO_INPUT:
69 case S3C2410_GPIO_OUTPUT:
70 case S3C2410_GPIO_SFN2:
71 case S3C2410_GPIO_SFN3:
72 if (pin < S3C2410_GPIO_BANKB) {
73 function &= 1;
74 function <<= S3C2410_GPIO_OFFSET(pin);
75 } else {
76 function &= 3;
77 function <<= S3C2410_GPIO_OFFSET(pin)*2;
78 }
79 }
80
81 /* modify the specified register wwith IRQs off */
82
61 local_irq_save(flags); 83 local_irq_save(flags);
62 84
63 con = __raw_readl(base + 0x00); 85 con = __raw_readl(base + 0x00);