diff options
Diffstat (limited to 'arch/arm/mach-s3c2410/clock.c')
-rw-r--r-- | arch/arm/mach-s3c2410/clock.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c index c5c93c333ac6..90a0610b5142 100644 --- a/arch/arm/mach-s3c2410/clock.c +++ b/arch/arm/mach-s3c2410/clock.c | |||
@@ -213,7 +213,7 @@ EXPORT_SYMBOL(clk_set_parent); | |||
213 | 213 | ||
214 | /* base clocks */ | 214 | /* base clocks */ |
215 | 215 | ||
216 | static struct clk clk_xtal = { | 216 | struct clk clk_xtal = { |
217 | .name = "xtal", | 217 | .name = "xtal", |
218 | .id = -1, | 218 | .id = -1, |
219 | .rate = 0, | 219 | .rate = 0, |
@@ -221,6 +221,11 @@ static struct clk clk_xtal = { | |||
221 | .ctrlbit = 0, | 221 | .ctrlbit = 0, |
222 | }; | 222 | }; |
223 | 223 | ||
224 | struct clk clk_mpll = { | ||
225 | .name = "mpll", | ||
226 | .id = -1, | ||
227 | }; | ||
228 | |||
224 | struct clk clk_upll = { | 229 | struct clk clk_upll = { |
225 | .name = "upll", | 230 | .name = "upll", |
226 | .id = -1, | 231 | .id = -1, |
@@ -232,7 +237,7 @@ struct clk clk_f = { | |||
232 | .name = "fclk", | 237 | .name = "fclk", |
233 | .id = -1, | 238 | .id = -1, |
234 | .rate = 0, | 239 | .rate = 0, |
235 | .parent = NULL, | 240 | .parent = &clk_mpll, |
236 | .ctrlbit = 0, | 241 | .ctrlbit = 0, |
237 | }; | 242 | }; |
238 | 243 | ||
@@ -413,6 +418,7 @@ int __init s3c24xx_setup_clocks(unsigned long xtal, | |||
413 | clk_xtal.rate = xtal; | 418 | clk_xtal.rate = xtal; |
414 | clk_upll.rate = s3c2410_get_pll(__raw_readl(S3C2410_UPLLCON), xtal); | 419 | clk_upll.rate = s3c2410_get_pll(__raw_readl(S3C2410_UPLLCON), xtal); |
415 | 420 | ||
421 | clk_mpll.rate = fclk; | ||
416 | clk_h.rate = hclk; | 422 | clk_h.rate = hclk; |
417 | clk_p.rate = pclk; | 423 | clk_p.rate = pclk; |
418 | clk_f.rate = fclk; | 424 | clk_f.rate = fclk; |
@@ -424,6 +430,9 @@ int __init s3c24xx_setup_clocks(unsigned long xtal, | |||
424 | if (s3c24xx_register_clock(&clk_xtal) < 0) | 430 | if (s3c24xx_register_clock(&clk_xtal) < 0) |
425 | printk(KERN_ERR "failed to register master xtal\n"); | 431 | printk(KERN_ERR "failed to register master xtal\n"); |
426 | 432 | ||
433 | if (s3c24xx_register_clock(&clk_mpll) < 0) | ||
434 | printk(KERN_ERR "failed to register mpll clock\n"); | ||
435 | |||
427 | if (s3c24xx_register_clock(&clk_upll) < 0) | 436 | if (s3c24xx_register_clock(&clk_upll) < 0) |
428 | printk(KERN_ERR "failed to register upll clock\n"); | 437 | printk(KERN_ERR "failed to register upll clock\n"); |
429 | 438 | ||