aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s3c2410/clock.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-s3c2410/clock.c')
-rw-r--r--arch/arm/mach-s3c2410/clock.c57
1 files changed, 0 insertions, 57 deletions
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c
index 8d986b8401c2..9a66050e887d 100644
--- a/arch/arm/mach-s3c2410/clock.c
+++ b/arch/arm/mach-s3c2410/clock.c
@@ -448,60 +448,3 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
448 448
449 return 0; 449 return 0;
450} 450}
451
452/* S3C2440 extended clock support */
453
454#ifdef CONFIG_CPU_S3C2440
455
456static struct clk s3c2440_clk_upll = {
457 .name = "upll",
458 .id = -1,
459};
460
461static struct clk s3c2440_clk_cam = {
462 .name = "camif",
463 .parent = &clk_h,
464 .id = -1,
465 .enable = s3c24xx_clkcon_enable,
466 .ctrlbit = S3C2440_CLKCON_CAMERA,
467};
468
469static struct clk s3c2440_clk_ac97 = {
470 .name = "ac97",
471 .parent = &clk_p,
472 .id = -1,
473 .enable = s3c24xx_clkcon_enable,
474 .ctrlbit = S3C2440_CLKCON_CAMERA,
475};
476
477static int s3c2440_clk_add(struct sys_device *sysdev)
478{
479 unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
480
481 s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal.rate);
482
483 printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n",
484 print_mhz(s3c2440_clk_upll.rate));
485
486 s3c24xx_register_clock(&s3c2440_clk_ac97);
487 s3c24xx_register_clock(&s3c2440_clk_cam);
488 s3c24xx_register_clock(&s3c2440_clk_upll);
489
490 clk_disable(&s3c2440_clk_ac97);
491 clk_disable(&s3c2440_clk_cam);
492
493 return 0;
494}
495
496static struct sysdev_driver s3c2440_clk_driver = {
497 .add = s3c2440_clk_add,
498};
499
500static int s3c24xx_clk_driver(void)
501{
502 return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver);
503}
504
505arch_initcall(s3c24xx_clk_driver);
506
507#endif /* CONFIG_CPU_S3C2440 */