diff options
Diffstat (limited to 'arch/arm/mach-rpc/dma.c')
-rw-r--r-- | arch/arm/mach-rpc/dma.c | 68 |
1 files changed, 45 insertions, 23 deletions
diff --git a/arch/arm/mach-rpc/dma.c b/arch/arm/mach-rpc/dma.c index a86d3ed859a7..efcf6718d1d0 100644 --- a/arch/arm/mach-rpc/dma.c +++ b/arch/arm/mach-rpc/dma.c | |||
@@ -302,8 +302,22 @@ static struct dma_ops sound_dma_ops = { | |||
302 | .disable = sound_enable_disable_dma, | 302 | .disable = sound_enable_disable_dma, |
303 | }; | 303 | }; |
304 | 304 | ||
305 | void __init arch_dma_init(dma_t *dma) | 305 | static dma_t iomd_dma[6]; |
306 | |||
307 | static dma_t floppy_dma = { | ||
308 | .dma_irq = FIQ_FLOPPYDATA, | ||
309 | .d_ops = &floppy_dma_ops, | ||
310 | }; | ||
311 | |||
312 | static dma_t sound_dma = { | ||
313 | .d_ops = &sound_dma_ops, | ||
314 | }; | ||
315 | |||
316 | static int __init rpc_dma_init(void) | ||
306 | { | 317 | { |
318 | unsigned int i; | ||
319 | int ret; | ||
320 | |||
307 | iomd_writeb(0, IOMD_IO0CR); | 321 | iomd_writeb(0, IOMD_IO0CR); |
308 | iomd_writeb(0, IOMD_IO1CR); | 322 | iomd_writeb(0, IOMD_IO1CR); |
309 | iomd_writeb(0, IOMD_IO2CR); | 323 | iomd_writeb(0, IOMD_IO2CR); |
@@ -311,31 +325,39 @@ void __init arch_dma_init(dma_t *dma) | |||
311 | 325 | ||
312 | iomd_writeb(0xa0, IOMD_DMATCR); | 326 | iomd_writeb(0xa0, IOMD_DMATCR); |
313 | 327 | ||
314 | dma[DMA_0].dma_base = IOMD_IO0CURA; | ||
315 | dma[DMA_0].dma_irq = IRQ_DMA0; | ||
316 | dma[DMA_0].d_ops = &iomd_dma_ops; | ||
317 | dma[DMA_1].dma_base = IOMD_IO1CURA; | ||
318 | dma[DMA_1].dma_irq = IRQ_DMA1; | ||
319 | dma[DMA_1].d_ops = &iomd_dma_ops; | ||
320 | dma[DMA_2].dma_base = IOMD_IO2CURA; | ||
321 | dma[DMA_2].dma_irq = IRQ_DMA2; | ||
322 | dma[DMA_2].d_ops = &iomd_dma_ops; | ||
323 | dma[DMA_3].dma_base = IOMD_IO3CURA; | ||
324 | dma[DMA_3].dma_irq = IRQ_DMA3; | ||
325 | dma[DMA_3].d_ops = &iomd_dma_ops; | ||
326 | dma[DMA_S0].dma_base = IOMD_SD0CURA; | ||
327 | dma[DMA_S0].dma_irq = IRQ_DMAS0; | ||
328 | dma[DMA_S0].d_ops = &iomd_dma_ops; | ||
329 | dma[DMA_S1].dma_base = IOMD_SD1CURA; | ||
330 | dma[DMA_S1].dma_irq = IRQ_DMAS1; | ||
331 | dma[DMA_S1].d_ops = &iomd_dma_ops; | ||
332 | dma[DMA_VIRTUAL_FLOPPY].dma_irq = FIQ_FLOPPYDATA; | ||
333 | dma[DMA_VIRTUAL_FLOPPY].d_ops = &floppy_dma_ops; | ||
334 | dma[DMA_VIRTUAL_SOUND].d_ops = &sound_dma_ops; | ||
335 | |||
336 | /* | 328 | /* |
337 | * Setup DMA channels 2,3 to be for podules | 329 | * Setup DMA channels 2,3 to be for podules |
338 | * and channels 0,1 for internal devices | 330 | * and channels 0,1 for internal devices |
339 | */ | 331 | */ |
340 | iomd_writeb(DMA_EXT_IO3|DMA_EXT_IO2, IOMD_DMAEXT); | 332 | iomd_writeb(DMA_EXT_IO3|DMA_EXT_IO2, IOMD_DMAEXT); |
333 | |||
334 | iomd_dma[DMA_0].dma_base = IOMD_IO0CURA; | ||
335 | iomd_dma[DMA_0].dma_irq = IRQ_DMA0; | ||
336 | iomd_dma[DMA_1].dma_base = IOMD_IO1CURA; | ||
337 | iomd_dma[DMA_1].dma_irq = IRQ_DMA1; | ||
338 | iomd_dma[DMA_2].dma_base = IOMD_IO2CURA; | ||
339 | iomd_dma[DMA_2].dma_irq = IRQ_DMA2; | ||
340 | iomd_dma[DMA_3].dma_base = IOMD_IO3CURA; | ||
341 | iomd_dma[DMA_3].dma_irq = IRQ_DMA3; | ||
342 | iomd_dma[DMA_S0].dma_base = IOMD_SD0CURA; | ||
343 | iomd_dma[DMA_S0].dma_irq = IRQ_DMAS0; | ||
344 | iomd_dma[DMA_S1].dma_base = IOMD_SD1CURA; | ||
345 | iomd_dma[DMA_S1].dma_irq = IRQ_DMAS1; | ||
346 | |||
347 | for (i = DMA_0; i <= DMA_S1; i++) { | ||
348 | iomd_dma[i].d_ops = &iomd_dma_ops; | ||
349 | |||
350 | ret = isa_dma_add(i, &iomd_dma[i]); | ||
351 | if (ret) | ||
352 | printk("IOMDDMA%u: unable to register: %d\n", i, ret); | ||
353 | } | ||
354 | |||
355 | ret = isa_dma_add(DMA_VIRTUAL_FLOPPY, &floppy_dma); | ||
356 | if (ret) | ||
357 | printk("IOMDFLOPPY: unable to register: %d\n", ret); | ||
358 | ret = isa_dma_add(DMA_VIRTUAL_SOUND, &sound_dma); | ||
359 | if (ret) | ||
360 | printk("IOMDSOUND: unable to register: %d\n", ret); | ||
361 | return 0; | ||
341 | } | 362 | } |
363 | core_initcall(rpc_dma_init); | ||