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-rw-r--r--arch/arm/mach-realview/core.h20
-rw-r--r--arch/arm/mach-realview/include/mach/entry-macro.S16
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-eb.h23
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-pb1176.h2
-rw-r--r--arch/arm/mach-realview/include/mach/system.h33
-rw-r--r--arch/arm/mach-realview/realview_eb.c105
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c78
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c99
-rw-r--r--arch/arm/mach-realview/realview_pba8.c78
-rw-r--r--arch/arm/mach-realview/realview_pbx.c98
10 files changed, 268 insertions, 284 deletions
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 735b57aaf2d6..f8f2c0ac4c01 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -28,21 +28,11 @@
28#include <asm/setup.h> 28#include <asm/setup.h>
29#include <asm/leds.h> 29#include <asm/leds.h>
30 30
31#define AMBA_DEVICE(name,busid,base,plat) \ 31#define APB_DEVICE(name, busid, base, plat) \
32static struct amba_device name##_device = { \ 32static AMBA_APB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat)
33 .dev = { \ 33
34 .coherent_dma_mask = ~0, \ 34#define AHB_DEVICE(name, busid, base, plat) \
35 .init_name = busid, \ 35static AMBA_AHB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat)
36 .platform_data = plat, \
37 }, \
38 .res = { \
39 .start = REALVIEW_##base##_BASE, \
40 .end = (REALVIEW_##base##_BASE) + SZ_4K - 1, \
41 .flags = IORESOURCE_MEM, \
42 }, \
43 .dma_mask = ~0, \
44 .irq = base##_IRQ, \
45}
46 36
47struct machine_desc; 37struct machine_desc;
48 38
diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S
deleted file mode 100644
index e8a5179c2653..000000000000
--- a/arch/arm/mach-realview/include/mach/entry-macro.S
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * arch/arm/mach-realview/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for RealView platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11 .macro disable_fiq
12 .endm
13
14 .macro arch_ret_to_user, tmp1, tmp2
15 .endm
16
diff --git a/arch/arm/mach-realview/include/mach/irqs-eb.h b/arch/arm/mach-realview/include/mach/irqs-eb.h
index 204d5378f309..d6b5073692d2 100644
--- a/arch/arm/mach-realview/include/mach/irqs-eb.h
+++ b/arch/arm/mach-realview/include/mach/irqs-eb.h
@@ -96,16 +96,19 @@
96#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30) 96#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
97#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31) 97#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
98 98
99#define IRQ_EB11MP_UART2 -1 99/*
100#define IRQ_EB11MP_UART3 -1 100 * The 11MPcore tile leaves the following unconnected.
101#define IRQ_EB11MP_CLCD -1 101 */
102#define IRQ_EB11MP_DMA -1 102#define IRQ_EB11MP_UART2 0
103#define IRQ_EB11MP_WDOG -1 103#define IRQ_EB11MP_UART3 0
104#define IRQ_EB11MP_GPIO0 -1 104#define IRQ_EB11MP_CLCD 0
105#define IRQ_EB11MP_GPIO1 -1 105#define IRQ_EB11MP_DMA 0
106#define IRQ_EB11MP_GPIO2 -1 106#define IRQ_EB11MP_WDOG 0
107#define IRQ_EB11MP_SCI -1 107#define IRQ_EB11MP_GPIO0 0
108#define IRQ_EB11MP_SSP -1 108#define IRQ_EB11MP_GPIO1 0
109#define IRQ_EB11MP_GPIO2 0
110#define IRQ_EB11MP_SCI 0
111#define IRQ_EB11MP_SSP 0
109 112
110#define NR_GIC_EB11MP 2 113#define NR_GIC_EB11MP 2
111 114
diff --git a/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
index 5c3c625e3e04..708f84156f2c 100644
--- a/arch/arm/mach-realview/include/mach/irqs-pb1176.h
+++ b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
@@ -40,6 +40,7 @@
40#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) 40#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
41#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) 41#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
42#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ 42#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
43#define IRQ_DC1176_GPIO0 (IRQ_DC1176_GIC_START + 16)
43#define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ 44#define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */
44#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ 45#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
45#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ 46#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
@@ -73,7 +74,6 @@
73#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ 74#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
74#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ 75#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
75 76
76#define IRQ_PB1176_GPIO0 -1
77#define IRQ_PB1176_SCTL -1 77#define IRQ_PB1176_SCTL -1
78 78
79#define NR_GIC_PB1176 2 79#define NR_GIC_PB1176 2
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h
deleted file mode 100644
index 471b671159ce..000000000000
--- a/arch/arm/mach-realview/include/mach/system.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * arch/arm/mach-realview/include/mach/system.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H
23
24static inline void arch_idle(void)
25{
26 /*
27 * This should do all the clock switching
28 * and wait for interrupt tricks
29 */
30 cpu_do_idle();
31}
32
33#endif
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 9578145f2df0..baf382c5e776 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -36,7 +36,7 @@
36#include <asm/pgtable.h> 36#include <asm/pgtable.h>
37#include <asm/hardware/gic.h> 37#include <asm/hardware/gic.h>
38#include <asm/hardware/cache-l2x0.h> 38#include <asm/hardware/cache-l2x0.h>
39#include <asm/localtimer.h> 39#include <asm/smp_twd.h>
40 40
41#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
42#include <asm/mach/map.h> 42#include <asm/mach/map.h>
@@ -135,63 +135,63 @@ static struct pl022_ssp_controller ssp0_plat_data = {
135/* 135/*
136 * These devices are connected via the core APB bridge 136 * These devices are connected via the core APB bridge
137 */ 137 */
138#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } 138#define GPIO2_IRQ { IRQ_EB_GPIO2 }
139#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } 139#define GPIO3_IRQ { IRQ_EB_GPIO3 }
140 140
141#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } 141#define AACI_IRQ { IRQ_EB_AACI }
142#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } 142#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
143#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } 143#define KMI0_IRQ { IRQ_EB_KMI0 }
144#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } 144#define KMI1_IRQ { IRQ_EB_KMI1 }
145 145
146/* 146/*
147 * These devices are connected directly to the multi-layer AHB switch 147 * These devices are connected directly to the multi-layer AHB switch
148 */ 148 */
149#define EB_SMC_IRQ { NO_IRQ, NO_IRQ } 149#define EB_SMC_IRQ { }
150#define MPMC_IRQ { NO_IRQ, NO_IRQ } 150#define MPMC_IRQ { }
151#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } 151#define EB_CLCD_IRQ { IRQ_EB_CLCD }
152#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } 152#define DMAC_IRQ { IRQ_EB_DMA }
153 153
154/* 154/*
155 * These devices are connected via the core APB bridge 155 * These devices are connected via the core APB bridge
156 */ 156 */
157#define SCTL_IRQ { NO_IRQ, NO_IRQ } 157#define SCTL_IRQ { }
158#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } 158#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG }
159#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } 159#define EB_GPIO0_IRQ { IRQ_EB_GPIO0 }
160#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } 160#define GPIO1_IRQ { IRQ_EB_GPIO1 }
161#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } 161#define EB_RTC_IRQ { IRQ_EB_RTC }
162 162
163/* 163/*
164 * These devices are connected via the DMA APB bridge 164 * These devices are connected via the DMA APB bridge
165 */ 165 */
166#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } 166#define SCI_IRQ { IRQ_EB_SCI }
167#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } 167#define EB_UART0_IRQ { IRQ_EB_UART0 }
168#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } 168#define EB_UART1_IRQ { IRQ_EB_UART1 }
169#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } 169#define EB_UART2_IRQ { IRQ_EB_UART2 }
170#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } 170#define EB_UART3_IRQ { IRQ_EB_UART3 }
171#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } 171#define EB_SSP_IRQ { IRQ_EB_SSP }
172 172
173/* FPGA Primecells */ 173/* FPGA Primecells */
174AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 174APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
175AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); 175APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
176AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); 176APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
177AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); 177APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
178AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); 178APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
179 179
180/* DevChip Primecells */ 180/* DevChip Primecells */
181AMBA_DEVICE(smc, "dev:smc", EB_SMC, NULL); 181AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL);
182AMBA_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); 182AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data);
183AMBA_DEVICE(dmac, "dev:dmac", DMAC, NULL); 183AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL);
184AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); 184AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
185AMBA_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); 185APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL);
186AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); 186APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
187AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); 187APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
188AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); 188APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
189AMBA_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); 189APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL);
190AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); 190APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
191AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); 191APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
192AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); 192APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
193AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); 193APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
194AMBA_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); 194APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data);
195 195
196static struct amba_device *amba_devs[] __initdata = { 196static struct amba_device *amba_devs[] __initdata = {
197 &dmac_device, 197 &dmac_device,
@@ -383,6 +383,23 @@ static void realview_eb11mp_fixup(void)
383 realview_eb_isp1761_resources[1].end = IRQ_EB11MP_USB; 383 realview_eb_isp1761_resources[1].end = IRQ_EB11MP_USB;
384} 384}
385 385
386#ifdef CONFIG_HAVE_ARM_TWD
387static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
388 REALVIEW_EB11MP_TWD_BASE,
389 IRQ_LOCALTIMER);
390
391static void __init realview_eb_twd_init(void)
392{
393 if (core_tile_eb11mp() || core_tile_a9mp()) {
394 int err = twd_local_timer_register(&twd_local_timer);
395 if (err)
396 pr_err("twd_local_timer_register failed %d\n", err);
397 }
398}
399#else
400#define realview_eb_twd_init() do { } while(0)
401#endif
402
386static void __init realview_eb_timer_init(void) 403static void __init realview_eb_timer_init(void)
387{ 404{
388 unsigned int timer_irq; 405 unsigned int timer_irq;
@@ -392,15 +409,13 @@ static void __init realview_eb_timer_init(void)
392 timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE); 409 timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
393 timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20; 410 timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
394 411
395 if (core_tile_eb11mp() || core_tile_a9mp()) { 412 if (core_tile_eb11mp() || core_tile_a9mp())
396#ifdef CONFIG_LOCAL_TIMERS
397 twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
398#endif
399 timer_irq = IRQ_EB11MP_TIMER0_1; 413 timer_irq = IRQ_EB11MP_TIMER0_1;
400 } else 414 else
401 timer_irq = IRQ_EB_TIMER0_1; 415 timer_irq = IRQ_EB_TIMER0_1;
402 416
403 realview_timer_init(timer_irq); 417 realview_timer_init(timer_irq);
418 realview_eb_twd_init();
404} 419}
405 420
406static struct sys_timer realview_eb_timer = { 421static struct sys_timer realview_eb_timer = {
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index e4abe94fb11a..b1d7cafa1a6d 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -132,50 +132,50 @@ static struct pl022_ssp_controller ssp0_plat_data = {
132/* 132/*
133 * RealView PB1176 AMBA devices 133 * RealView PB1176 AMBA devices
134 */ 134 */
135#define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } 135#define GPIO2_IRQ { IRQ_PB1176_GPIO2 }
136#define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } 136#define GPIO3_IRQ { IRQ_PB1176_GPIO3 }
137#define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } 137#define AACI_IRQ { IRQ_PB1176_AACI }
138#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } 138#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
139#define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } 139#define KMI0_IRQ { IRQ_PB1176_KMI0 }
140#define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } 140#define KMI1_IRQ { IRQ_PB1176_KMI1 }
141#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } 141#define PB1176_SMC_IRQ { }
142#define MPMC_IRQ { NO_IRQ, NO_IRQ } 142#define MPMC_IRQ { }
143#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } 143#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD }
144#define SCTL_IRQ { NO_IRQ, NO_IRQ } 144#define SCTL_IRQ { }
145#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } 145#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG }
146#define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ } 146#define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 }
147#define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } 147#define GPIO1_IRQ { IRQ_PB1176_GPIO1 }
148#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } 148#define PB1176_RTC_IRQ { IRQ_DC1176_RTC }
149#define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } 149#define SCI_IRQ { IRQ_PB1176_SCI }
150#define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } 150#define PB1176_UART0_IRQ { IRQ_DC1176_UART0 }
151#define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } 151#define PB1176_UART1_IRQ { IRQ_DC1176_UART1 }
152#define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } 152#define PB1176_UART2_IRQ { IRQ_DC1176_UART2 }
153#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } 153#define PB1176_UART3_IRQ { IRQ_DC1176_UART3 }
154#define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } 154#define PB1176_UART4_IRQ { IRQ_PB1176_UART4 }
155#define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } 155#define PB1176_SSP_IRQ { IRQ_DC1176_SSP }
156 156
157/* FPGA Primecells */ 157/* FPGA Primecells */
158AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 158APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
159AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); 159APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
160AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); 160APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
161AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); 161APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
162AMBA_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); 162APB_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL);
163 163
164/* DevChip Primecells */ 164/* DevChip Primecells */
165AMBA_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); 165AHB_DEVICE(smc, "dev:smc", PB1176_SMC, NULL);
166AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); 166AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
167AMBA_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); 167APB_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL);
168AMBA_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); 168APB_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data);
169AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); 169APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
170AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); 170APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
171AMBA_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); 171APB_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL);
172AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); 172APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
173AMBA_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); 173APB_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL);
174AMBA_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); 174APB_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL);
175AMBA_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); 175APB_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL);
176AMBA_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); 176APB_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL);
177AMBA_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); 177APB_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data);
178AMBA_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); 178AHB_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data);
179 179
180static struct amba_device *amba_devs[] __initdata = { 180static struct amba_device *amba_devs[] __initdata = {
181 &uart0_device, 181 &uart0_device,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 2147335f66f5..a98c536e3327 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -36,7 +36,7 @@
36#include <asm/pgtable.h> 36#include <asm/pgtable.h>
37#include <asm/hardware/gic.h> 37#include <asm/hardware/gic.h>
38#include <asm/hardware/cache-l2x0.h> 38#include <asm/hardware/cache-l2x0.h>
39#include <asm/localtimer.h> 39#include <asm/smp_twd.h>
40 40
41#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
42#include <asm/mach/flash.h> 42#include <asm/mach/flash.h>
@@ -127,52 +127,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
127 * RealView PB11MPCore AMBA devices 127 * RealView PB11MPCore AMBA devices
128 */ 128 */
129 129
130#define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } 130#define GPIO2_IRQ { IRQ_PB11MP_GPIO2 }
131#define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } 131#define GPIO3_IRQ { IRQ_PB11MP_GPIO3 }
132#define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } 132#define AACI_IRQ { IRQ_TC11MP_AACI }
133#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } 133#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
134#define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } 134#define KMI0_IRQ { IRQ_TC11MP_KMI0 }
135#define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } 135#define KMI1_IRQ { IRQ_TC11MP_KMI1 }
136#define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } 136#define PB11MP_SMC_IRQ { }
137#define MPMC_IRQ { NO_IRQ, NO_IRQ } 137#define MPMC_IRQ { }
138#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } 138#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD }
139#define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } 139#define DMAC_IRQ { IRQ_PB11MP_DMAC }
140#define SCTL_IRQ { NO_IRQ, NO_IRQ } 140#define SCTL_IRQ { }
141#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } 141#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG }
142#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } 142#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 }
143#define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } 143#define GPIO1_IRQ { IRQ_PB11MP_GPIO1 }
144#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } 144#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC }
145#define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } 145#define SCI_IRQ { IRQ_PB11MP_SCI }
146#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } 146#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 }
147#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } 147#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 }
148#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } 148#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 }
149#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } 149#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 }
150#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } 150#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP }
151 151
152/* FPGA Primecells */ 152/* FPGA Primecells */
153AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 153APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
154AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); 154APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
155AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); 155APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
156AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); 156APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
157AMBA_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); 157APB_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL);
158 158
159/* DevChip Primecells */ 159/* DevChip Primecells */
160AMBA_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); 160AHB_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL);
161AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); 161AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
162AMBA_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); 162APB_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL);
163AMBA_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); 163APB_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data);
164AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); 164APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
165AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); 165APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
166AMBA_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); 166APB_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL);
167AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); 167APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
168AMBA_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); 168APB_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL);
169AMBA_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); 169APB_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL);
170AMBA_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); 170APB_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL);
171AMBA_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); 171APB_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data);
172 172
173/* Primecells on the NEC ISSP chip */ 173/* Primecells on the NEC ISSP chip */
174AMBA_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); 174AHB_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data);
175AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); 175AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL);
176 176
177static struct amba_device *amba_devs[] __initdata = { 177static struct amba_device *amba_devs[] __initdata = {
178 &dmac_device, 178 &dmac_device,
@@ -290,6 +290,21 @@ static void __init gic_init_irq(void)
290 gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1); 290 gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1);
291} 291}
292 292
293#ifdef CONFIG_HAVE_ARM_TWD
294static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
295 REALVIEW_TC11MP_TWD_BASE,
296 IRQ_LOCALTIMER);
297
298static void __init realview_pb11mp_twd_init(void)
299{
300 int err = twd_local_timer_register(&twd_local_timer);
301 if (err)
302 pr_err("twd_local_timer_register failed %d\n", err);
303}
304#else
305#define realview_pb11mp_twd_init() do {} while(0)
306#endif
307
293static void __init realview_pb11mp_timer_init(void) 308static void __init realview_pb11mp_timer_init(void)
294{ 309{
295 timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE); 310 timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE);
@@ -297,10 +312,8 @@ static void __init realview_pb11mp_timer_init(void)
297 timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE); 312 timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE);
298 timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20; 313 timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
299 314
300#ifdef CONFIG_LOCAL_TIMERS
301 twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
302#endif
303 realview_timer_init(IRQ_TC11MP_TIMER0_1); 315 realview_timer_init(IRQ_TC11MP_TIMER0_1);
316 realview_pb11mp_twd_init();
304} 317}
305 318
306static struct sys_timer realview_pb11mp_timer = { 319static struct sys_timer realview_pb11mp_timer = {
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 25b2e59296f8..59650174e6ed 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -122,52 +122,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
122 * RealView PBA8Core AMBA devices 122 * RealView PBA8Core AMBA devices
123 */ 123 */
124 124
125#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ } 125#define GPIO2_IRQ { IRQ_PBA8_GPIO2 }
126#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ } 126#define GPIO3_IRQ { IRQ_PBA8_GPIO3 }
127#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ } 127#define AACI_IRQ { IRQ_PBA8_AACI }
128#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } 128#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
129#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ } 129#define KMI0_IRQ { IRQ_PBA8_KMI0 }
130#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ } 130#define KMI1_IRQ { IRQ_PBA8_KMI1 }
131#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ } 131#define PBA8_SMC_IRQ { }
132#define MPMC_IRQ { NO_IRQ, NO_IRQ } 132#define MPMC_IRQ { }
133#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ } 133#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD }
134#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ } 134#define DMAC_IRQ { IRQ_PBA8_DMAC }
135#define SCTL_IRQ { NO_IRQ, NO_IRQ } 135#define SCTL_IRQ { }
136#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ } 136#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG }
137#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ } 137#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 }
138#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ } 138#define GPIO1_IRQ { IRQ_PBA8_GPIO1 }
139#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ } 139#define PBA8_RTC_IRQ { IRQ_PBA8_RTC }
140#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ } 140#define SCI_IRQ { IRQ_PBA8_SCI }
141#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ } 141#define PBA8_UART0_IRQ { IRQ_PBA8_UART0 }
142#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ } 142#define PBA8_UART1_IRQ { IRQ_PBA8_UART1 }
143#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ } 143#define PBA8_UART2_IRQ { IRQ_PBA8_UART2 }
144#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ } 144#define PBA8_UART3_IRQ { IRQ_PBA8_UART3 }
145#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ } 145#define PBA8_SSP_IRQ { IRQ_PBA8_SSP }
146 146
147/* FPGA Primecells */ 147/* FPGA Primecells */
148AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 148APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
149AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); 149APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
150AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); 150APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
151AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); 151APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
152AMBA_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); 152APB_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL);
153 153
154/* DevChip Primecells */ 154/* DevChip Primecells */
155AMBA_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); 155AHB_DEVICE(smc, "dev:smc", PBA8_SMC, NULL);
156AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); 156AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
157AMBA_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); 157APB_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL);
158AMBA_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); 158APB_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data);
159AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); 159APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
160AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); 160APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
161AMBA_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); 161APB_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL);
162AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); 162APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
163AMBA_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); 163APB_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL);
164AMBA_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); 164APB_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL);
165AMBA_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); 165APB_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL);
166AMBA_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); 166APB_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data);
167 167
168/* Primecells on the NEC ISSP chip */ 168/* Primecells on the NEC ISSP chip */
169AMBA_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); 169AHB_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data);
170AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); 170AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL);
171 171
172static struct amba_device *amba_devs[] __initdata = { 172static struct amba_device *amba_devs[] __initdata = {
173 &dmac_device, 173 &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index ac715645b860..3f2f605624e9 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -144,52 +144,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
144 * RealView PBXCore AMBA devices 144 * RealView PBXCore AMBA devices
145 */ 145 */
146 146
147#define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ } 147#define GPIO2_IRQ { IRQ_PBX_GPIO2 }
148#define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ } 148#define GPIO3_IRQ { IRQ_PBX_GPIO3 }
149#define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ } 149#define AACI_IRQ { IRQ_PBX_AACI }
150#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } 150#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B }
151#define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ } 151#define KMI0_IRQ { IRQ_PBX_KMI0 }
152#define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ } 152#define KMI1_IRQ { IRQ_PBX_KMI1 }
153#define PBX_SMC_IRQ { NO_IRQ, NO_IRQ } 153#define PBX_SMC_IRQ { }
154#define MPMC_IRQ { NO_IRQ, NO_IRQ } 154#define MPMC_IRQ { }
155#define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ } 155#define PBX_CLCD_IRQ { IRQ_PBX_CLCD }
156#define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ } 156#define DMAC_IRQ { IRQ_PBX_DMAC }
157#define SCTL_IRQ { NO_IRQ, NO_IRQ } 157#define SCTL_IRQ { }
158#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ } 158#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG }
159#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ } 159#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0 }
160#define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ } 160#define GPIO1_IRQ { IRQ_PBX_GPIO1 }
161#define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ } 161#define PBX_RTC_IRQ { IRQ_PBX_RTC }
162#define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ } 162#define SCI_IRQ { IRQ_PBX_SCI }
163#define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ } 163#define PBX_UART0_IRQ { IRQ_PBX_UART0 }
164#define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ } 164#define PBX_UART1_IRQ { IRQ_PBX_UART1 }
165#define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ } 165#define PBX_UART2_IRQ { IRQ_PBX_UART2 }
166#define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ } 166#define PBX_UART3_IRQ { IRQ_PBX_UART3 }
167#define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ } 167#define PBX_SSP_IRQ { IRQ_PBX_SSP }
168 168
169/* FPGA Primecells */ 169/* FPGA Primecells */
170AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 170APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
171AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); 171APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
172AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); 172APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
173AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); 173APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
174AMBA_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); 174APB_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL);
175 175
176/* DevChip Primecells */ 176/* DevChip Primecells */
177AMBA_DEVICE(smc, "dev:smc", PBX_SMC, NULL); 177AHB_DEVICE(smc, "dev:smc", PBX_SMC, NULL);
178AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); 178AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
179AMBA_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); 179APB_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL);
180AMBA_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); 180APB_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data);
181AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); 181APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
182AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); 182APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
183AMBA_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); 183APB_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL);
184AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); 184APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
185AMBA_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); 185APB_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL);
186AMBA_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); 186APB_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL);
187AMBA_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); 187APB_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL);
188AMBA_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); 188APB_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data);
189 189
190/* Primecells on the NEC ISSP chip */ 190/* Primecells on the NEC ISSP chip */
191AMBA_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); 191AHB_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data);
192AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); 192AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL);
193 193
194static struct amba_device *amba_devs[] __initdata = { 194static struct amba_device *amba_devs[] __initdata = {
195 &dmac_device, 195 &dmac_device,
@@ -298,6 +298,21 @@ static void __init gic_init_irq(void)
298 } 298 }
299} 299}
300 300
301#ifdef CONFIG_HAVE_ARM_TWD
302static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
303 REALVIEW_PBX_TILE_TWD_BASE,
304 IRQ_LOCALTIMER);
305
306static void __init realview_pbx_twd_init(void)
307{
308 int err = twd_local_timer_register(&twd_local_timer);
309 if (err)
310 pr_err("twd_local_timer_register failed %d\n", err);
311}
312#else
313#define realview_pbx_twd_init() do { } while(0)
314#endif
315
301static void __init realview_pbx_timer_init(void) 316static void __init realview_pbx_timer_init(void)
302{ 317{
303 timer0_va_base = __io_address(REALVIEW_PBX_TIMER0_1_BASE); 318 timer0_va_base = __io_address(REALVIEW_PBX_TIMER0_1_BASE);
@@ -305,11 +320,8 @@ static void __init realview_pbx_timer_init(void)
305 timer2_va_base = __io_address(REALVIEW_PBX_TIMER2_3_BASE); 320 timer2_va_base = __io_address(REALVIEW_PBX_TIMER2_3_BASE);
306 timer3_va_base = __io_address(REALVIEW_PBX_TIMER2_3_BASE) + 0x20; 321 timer3_va_base = __io_address(REALVIEW_PBX_TIMER2_3_BASE) + 0x20;
307 322
308#ifdef CONFIG_LOCAL_TIMERS
309 if (core_tile_pbx11mp() || core_tile_pbxa9mp())
310 twd_base = __io_address(REALVIEW_PBX_TILE_TWD_BASE);
311#endif
312 realview_timer_init(IRQ_PBX_TIMER0_1); 323 realview_timer_init(IRQ_PBX_TIMER0_1);
324 realview_pbx_twd_init();
313} 325}
314 326
315static struct sys_timer realview_pbx_timer = { 327static struct sys_timer realview_pbx_timer = {
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-24 06:13:52 -0500