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-rw-r--r--arch/arm/mach-realview/Kconfig28
-rw-r--r--arch/arm/mach-realview/Makefile1
-rw-r--r--arch/arm/mach-realview/Makefile.boot7
-rw-r--r--arch/arm/mach-realview/core.c89
-rw-r--r--arch/arm/mach-realview/core.h4
-rw-r--r--arch/arm/mach-realview/hotplug.c5
-rw-r--r--arch/arm/mach-realview/include/mach/board-eb.h18
-rw-r--r--arch/arm/mach-realview/include/mach/board-pb11mp.h3
-rw-r--r--arch/arm/mach-realview/include/mach/board-pba8.h152
-rw-r--r--arch/arm/mach-realview/include/mach/debug-macro.S29
-rw-r--r--arch/arm/mach-realview/include/mach/hardware.h9
-rw-r--r--arch/arm/mach-realview/include/mach/irqs.h1
-rw-r--r--arch/arm/mach-realview/include/mach/memory.h4
-rw-r--r--arch/arm/mach-realview/include/mach/uncompress.h3
-rw-r--r--arch/arm/mach-realview/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mach-realview/localtimer.c44
-rw-r--r--arch/arm/mach-realview/platsmp.c37
-rw-r--r--arch/arm/mach-realview/realview_eb.c31
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c11
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c14
-rw-r--r--arch/arm/mach-realview/realview_pba8.c300
21 files changed, 677 insertions, 115 deletions
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index 603d1db9baf0..ad911854eb4c 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -7,6 +7,13 @@ config MACH_REALVIEW_EB
7 help 7 help
8 Include support for the ARM(R) RealView Emulation Baseboard platform. 8 Include support for the ARM(R) RealView Emulation Baseboard platform.
9 9
10config REALVIEW_EB_A9MP
11 bool "Support Multicore Cortex-A9"
12 depends on MACH_REALVIEW_EB
13 select CPU_V7
14 help
15 Enable support for the Cortex-A9MPCore tile on the Realview platform.
16
10config REALVIEW_EB_ARM11MP 17config REALVIEW_EB_ARM11MP
11 bool "Support ARM11MPCore tile" 18 bool "Support ARM11MPCore tile"
12 depends on MACH_REALVIEW_EB 19 depends on MACH_REALVIEW_EB
@@ -26,6 +33,7 @@ config REALVIEW_EB_ARM11MP_REVB
26 33
27config MACH_REALVIEW_PB11MP 34config MACH_REALVIEW_PB11MP
28 bool "Support RealView/PB11MPCore platform" 35 bool "Support RealView/PB11MPCore platform"
36 select CPU_V6
29 select ARM_GIC 37 select ARM_GIC
30 help 38 help
31 Include support for the ARM(R) RealView MPCore Platform Baseboard. 39 Include support for the ARM(R) RealView MPCore Platform Baseboard.
@@ -39,4 +47,24 @@ config MACH_REALVIEW_PB1176
39 help 47 help
40 Include support for the ARM(R) RealView ARM1176 Platform Baseboard. 48 Include support for the ARM(R) RealView ARM1176 Platform Baseboard.
41 49
50config MACH_REALVIEW_PBA8
51 bool "Support RealView/PB-A8 platform"
52 select CPU_V7
53 select ARM_GIC
54 help
55 Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard.
56 PB-A8 is a platform with an on-board Cortex-A8 and has support for
57 PCI-E and Compact Flash.
58
59config REALVIEW_HIGH_PHYS_OFFSET
60 bool "High physical base address for the RealView platform"
61 depends on !MACH_REALVIEW_PB1176
62 default y
63 help
64 RealView boards other than PB1176 have the RAM available at
65 0x70000000, 256MB of which being mirrored at 0x00000000. If
66 the board supports 512MB of RAM, this option allows the
67 memory to be accessed contiguously at the high physical
68 offset.
69
42endmenu 70endmenu
diff --git a/arch/arm/mach-realview/Makefile b/arch/arm/mach-realview/Makefile
index d2ae077431dd..7bea8ffc4b59 100644
--- a/arch/arm/mach-realview/Makefile
+++ b/arch/arm/mach-realview/Makefile
@@ -6,5 +6,6 @@ obj-y := core.o clock.o
6obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o 6obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o
7obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o 7obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o
8obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o 8obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o
9obj-$(CONFIG_MACH_REALVIEW_PBA8) += realview_pba8.o
9obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o 10obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o
10obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 11obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
diff --git a/arch/arm/mach-realview/Makefile.boot b/arch/arm/mach-realview/Makefile.boot
index c7e75acfe6c9..d97e003d3df4 100644
--- a/arch/arm/mach-realview/Makefile.boot
+++ b/arch/arm/mach-realview/Makefile.boot
@@ -1,4 +1,9 @@
1ifeq ($(CONFIG_REALVIEW_HIGH_PHYS_OFFSET),y)
2 zreladdr-y := 0x70008000
3params_phys-y := 0x70000100
4initrd_phys-y := 0x70800000
5else
1 zreladdr-y := 0x00008000 6 zreladdr-y := 0x00008000
2params_phys-y := 0x00000100 7params_phys-y := 0x00000100
3initrd_phys-y := 0x00800000 8initrd_phys-y := 0x00800000
4 9endif
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 2491374818e9..5f1d55963ced 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -28,12 +28,14 @@
28#include <linux/clocksource.h> 28#include <linux/clocksource.h>
29#include <linux/clockchips.h> 29#include <linux/clockchips.h>
30#include <linux/io.h> 30#include <linux/io.h>
31#include <linux/smc911x.h>
31 32
32#include <asm/clkdev.h> 33#include <asm/clkdev.h>
33#include <asm/system.h> 34#include <asm/system.h>
34#include <mach/hardware.h> 35#include <mach/hardware.h>
35#include <asm/irq.h> 36#include <asm/irq.h>
36#include <asm/leds.h> 37#include <asm/leds.h>
38#include <asm/mach-types.h>
37#include <asm/hardware/arm_timer.h> 39#include <asm/hardware/arm_timer.h>
38#include <asm/hardware/icst307.h> 40#include <asm/hardware/icst307.h>
39 41
@@ -50,7 +52,7 @@
50 52
51#define REALVIEW_REFCOUNTER (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_24MHz_OFFSET) 53#define REALVIEW_REFCOUNTER (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_24MHz_OFFSET)
52 54
53/* used by entry-macro.S */ 55/* used by entry-macro.S and platsmp.c */
54void __iomem *gic_cpu_base_addr; 56void __iomem *gic_cpu_base_addr;
55 57
56/* 58/*
@@ -125,6 +127,29 @@ int realview_flash_register(struct resource *res, u32 num)
125 return platform_device_register(&realview_flash_device); 127 return platform_device_register(&realview_flash_device);
126} 128}
127 129
130static struct smc911x_platdata realview_smc911x_platdata = {
131 .flags = SMC911X_USE_32BIT,
132 .irq_flags = IRQF_SHARED,
133 .irq_polarity = 1,
134};
135
136static struct platform_device realview_eth_device = {
137 .name = "smc911x",
138 .id = 0,
139 .num_resources = 2,
140};
141
142int realview_eth_register(const char *name, struct resource *res)
143{
144 if (name)
145 realview_eth_device.name = name;
146 realview_eth_device.resource = res;
147 if (strcmp(realview_eth_device.name, "smc911x") == 0)
148 realview_eth_device.dev.platform_data = &realview_smc911x_platdata;
149
150 return platform_device_register(&realview_eth_device);
151}
152
128static struct resource realview_i2c_resource = { 153static struct resource realview_i2c_resource = {
129 .start = REALVIEW_I2C_BASE, 154 .start = REALVIEW_I2C_BASE,
130 .end = REALVIEW_I2C_BASE + SZ_4K - 1, 155 .end = REALVIEW_I2C_BASE + SZ_4K - 1,
@@ -178,9 +203,14 @@ static const struct icst307_params realview_oscvco_params = {
178static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco) 203static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco)
179{ 204{
180 void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET; 205 void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET;
181 void __iomem *sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET; 206 void __iomem *sys_osc;
182 u32 val; 207 u32 val;
183 208
209 if (machine_is_realview_pb1176())
210 sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC0_OFFSET;
211 else
212 sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET;
213
184 val = readl(sys_osc) & ~0x7ffff; 214 val = readl(sys_osc) & ~0x7ffff;
185 val |= vco.v | (vco.r << 9) | (vco.s << 16); 215 val |= vco.v | (vco.r << 9) | (vco.s << 16);
186 216
@@ -274,7 +304,30 @@ static struct clcd_panel vga = {
274 .width = -1, 304 .width = -1,
275 .height = -1, 305 .height = -1,
276 .tim2 = TIM2_BCD | TIM2_IPC, 306 .tim2 = TIM2_BCD | TIM2_IPC,
277 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 307 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
308 .bpp = 16,
309};
310
311static struct clcd_panel xvga = {
312 .mode = {
313 .name = "XVGA",
314 .refresh = 60,
315 .xres = 1024,
316 .yres = 768,
317 .pixclock = 15748,
318 .left_margin = 152,
319 .right_margin = 48,
320 .upper_margin = 23,
321 .lower_margin = 3,
322 .hsync_len = 104,
323 .vsync_len = 4,
324 .sync = 0,
325 .vmode = FB_VMODE_NONINTERLACED,
326 },
327 .width = -1,
328 .height = -1,
329 .tim2 = TIM2_BCD | TIM2_IPC,
330 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
278 .bpp = 16, 331 .bpp = 16,
279}; 332};
280 333
@@ -297,7 +350,7 @@ static struct clcd_panel sanyo_3_8_in = {
297 .width = -1, 350 .width = -1,
298 .height = -1, 351 .height = -1,
299 .tim2 = TIM2_BCD, 352 .tim2 = TIM2_BCD,
300 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 353 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
301 .bpp = 16, 354 .bpp = 16,
302}; 355};
303 356
@@ -320,7 +373,7 @@ static struct clcd_panel sanyo_2_5_in = {
320 .width = -1, 373 .width = -1,
321 .height = -1, 374 .height = -1,
322 .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC, 375 .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC,
323 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 376 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
324 .bpp = 16, 377 .bpp = 16,
325}; 378};
326 379
@@ -343,7 +396,7 @@ static struct clcd_panel epson_2_2_in = {
343 .width = -1, 396 .width = -1,
344 .height = -1, 397 .height = -1,
345 .tim2 = TIM2_BCD | TIM2_IPC, 398 .tim2 = TIM2_BCD | TIM2_IPC,
346 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), 399 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
347 .bpp = 16, 400 .bpp = 16,
348}; 401};
349 402
@@ -356,9 +409,15 @@ static struct clcd_panel epson_2_2_in = {
356static struct clcd_panel *realview_clcd_panel(void) 409static struct clcd_panel *realview_clcd_panel(void)
357{ 410{
358 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; 411 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
359 struct clcd_panel *panel = &vga; 412 struct clcd_panel *vga_panel;
413 struct clcd_panel *panel;
360 u32 val; 414 u32 val;
361 415
416 if (machine_is_realview_eb())
417 vga_panel = &vga;
418 else
419 vga_panel = &xvga;
420
362 val = readl(sys_clcd) & SYS_CLCD_ID_MASK; 421 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
363 if (val == SYS_CLCD_ID_SANYO_3_8) 422 if (val == SYS_CLCD_ID_SANYO_3_8)
364 panel = &sanyo_3_8_in; 423 panel = &sanyo_3_8_in;
@@ -367,11 +426,11 @@ static struct clcd_panel *realview_clcd_panel(void)
367 else if (val == SYS_CLCD_ID_EPSON_2_2) 426 else if (val == SYS_CLCD_ID_EPSON_2_2)
368 panel = &epson_2_2_in; 427 panel = &epson_2_2_in;
369 else if (val == SYS_CLCD_ID_VGA) 428 else if (val == SYS_CLCD_ID_VGA)
370 panel = &vga; 429 panel = vga_panel;
371 else { 430 else {
372 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n", 431 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
373 val); 432 val);
374 panel = &vga; 433 panel = vga_panel;
375 } 434 }
376 435
377 return panel; 436 return panel;
@@ -406,12 +465,18 @@ static void realview_clcd_enable(struct clcd_fb *fb)
406 writel(val, sys_clcd); 465 writel(val, sys_clcd);
407} 466}
408 467
409static unsigned long framesize = SZ_1M;
410
411static int realview_clcd_setup(struct clcd_fb *fb) 468static int realview_clcd_setup(struct clcd_fb *fb)
412{ 469{
470 unsigned long framesize;
413 dma_addr_t dma; 471 dma_addr_t dma;
414 472
473 if (machine_is_realview_eb())
474 /* VGA, 16bpp */
475 framesize = 640 * 480 * 2;
476 else
477 /* XVGA, 16bpp */
478 framesize = 1024 * 768 * 2;
479
415 fb->panel = realview_clcd_panel(); 480 fb->panel = realview_clcd_panel();
416 481
417 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize, 482 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
@@ -636,7 +701,7 @@ void __init realview_timer_init(unsigned int timer_irq)
636 * The dummy clock device has to be registered before the main device 701 * The dummy clock device has to be registered before the main device
637 * so that the latter will broadcast the clock events 702 * so that the latter will broadcast the clock events
638 */ 703 */
639 local_timer_setup(smp_processor_id()); 704 local_timer_setup();
640#endif 705#endif
641 706
642 /* 707 /*
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 614e8cb31713..63be2abdc19c 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -51,8 +51,7 @@ extern struct mmc_platform_data realview_mmc1_plat_data;
51extern struct clcd_board clcd_plat_data; 51extern struct clcd_board clcd_plat_data;
52extern void __iomem *gic_cpu_base_addr; 52extern void __iomem *gic_cpu_base_addr;
53#ifdef CONFIG_LOCAL_TIMERS 53#ifdef CONFIG_LOCAL_TIMERS
54extern void __iomem *twd_base_addr; 54extern void __iomem *twd_base;
55extern unsigned int twd_size;
56#endif 55#endif
57extern void __iomem *timer0_va_base; 56extern void __iomem *timer0_va_base;
58extern void __iomem *timer1_va_base; 57extern void __iomem *timer1_va_base;
@@ -62,5 +61,6 @@ extern void __iomem *timer3_va_base;
62extern void realview_leds_event(led_event_t ledevt); 61extern void realview_leds_event(led_event_t ledevt);
63extern void realview_timer_init(unsigned int timer_irq); 62extern void realview_timer_init(unsigned int timer_irq);
64extern int realview_flash_register(struct resource *res, u32 num); 63extern int realview_flash_register(struct resource *res, u32 num);
64extern int realview_eth_register(const char *name, struct resource *res);
65 65
66#endif 66#endif
diff --git a/arch/arm/mach-realview/hotplug.c b/arch/arm/mach-realview/hotplug.c
index 09748cbcd10e..be048e3e8799 100644
--- a/arch/arm/mach-realview/hotplug.c
+++ b/arch/arm/mach-realview/hotplug.c
@@ -13,6 +13,8 @@
13#include <linux/smp.h> 13#include <linux/smp.h>
14#include <linux/completion.h> 14#include <linux/completion.h>
15 15
16#include <asm/cacheflush.h>
17
16extern volatile int pen_release; 18extern volatile int pen_release;
17 19
18static DECLARE_COMPLETION(cpu_killed); 20static DECLARE_COMPLETION(cpu_killed);
@@ -21,7 +23,8 @@ static inline void cpu_enter_lowpower(void)
21{ 23{
22 unsigned int v; 24 unsigned int v;
23 25
24 asm volatile( "mcr p15, 0, %1, c7, c14, 0\n" 26 flush_cache_all();
27 asm volatile(
25 " mcr p15, 0, %1, c7, c5, 0\n" 28 " mcr p15, 0, %1, c7, c5, 0\n"
26 " mcr p15, 0, %1, c7, c10, 4\n" 29 " mcr p15, 0, %1, c7, c10, 4\n"
27 /* 30 /*
diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h
index 8d699fd324d0..268d7701fa9b 100644
--- a/arch/arm/mach-realview/include/mach/board-eb.h
+++ b/arch/arm/mach-realview/include/mach/board-eb.h
@@ -49,16 +49,14 @@
49#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB 49#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
50#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */ 50#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
51#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */ 51#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
52#define REALVIEW_EB11MP_TWD_BASE 0x10100700 52#define REALVIEW_EB11MP_TWD_BASE 0x10100600
53#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
54#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ 53#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
55#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */ 54#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
56#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */ 55#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
57#else 56#else
58#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */ 57#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */
59#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */ 58#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
60#define REALVIEW_EB11MP_TWD_BASE 0x1F000700 59#define REALVIEW_EB11MP_TWD_BASE 0x1F000600
61#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
62#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */ 60#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
63#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */ 61#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
64#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ 62#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
@@ -163,7 +161,7 @@
163#define NR_IRQS NR_IRQS_EB 161#define NR_IRQS NR_IRQS_EB
164#endif 162#endif
165 163
166#if defined(CONFIG_REALVIEW_EB_ARM11MP) \ 164#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
167 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP)) 165 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
168#undef MAX_GIC_NR 166#undef MAX_GIC_NR
169#define MAX_GIC_NR NR_GIC_EB11MP 167#define MAX_GIC_NR NR_GIC_EB11MP
@@ -177,6 +175,7 @@
177#define REALVIEW_EB_PROC_ARM9 0x02000000 175#define REALVIEW_EB_PROC_ARM9 0x02000000
178#define REALVIEW_EB_PROC_ARM11 0x04000000 176#define REALVIEW_EB_PROC_ARM11 0x04000000
179#define REALVIEW_EB_PROC_ARM11MP 0x06000000 177#define REALVIEW_EB_PROC_ARM11MP 0x06000000
178#define REALVIEW_EB_PROC_A9MP 0x0C000000
180 179
181#define check_eb_proc(proc_type) \ 180#define check_eb_proc(proc_type) \
182 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \ 181 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
@@ -188,4 +187,13 @@
188#define core_tile_eb11mp() 0 187#define core_tile_eb11mp() 0
189#endif 188#endif
190 189
190#ifdef CONFIG_REALVIEW_EB_A9MP
191#define core_tile_a9mp() check_eb_proc(REALVIEW_EB_PROC_A9MP)
192#else
193#define core_tile_a9mp() 0
194#endif
195
196#define machine_is_realview_eb_mp() \
197 (machine_is_realview_eb() && (core_tile_eb11mp() || core_tile_a9mp()))
198
191#endif /* __ASM_ARCH_BOARD_EB_H */ 199#endif /* __ASM_ARCH_BOARD_EB_H */
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h
index ecd80e58631e..53ea0e7a1267 100644
--- a/arch/arm/mach-realview/include/mach/board-pb11mp.h
+++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h
@@ -77,8 +77,7 @@
77 */ 77 */
78#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */ 78#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */
79#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */ 79#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */
80#define REALVIEW_TC11MP_TWD_BASE 0x1F000700 80#define REALVIEW_TC11MP_TWD_BASE 0x1F000600
81#define REALVIEW_TC11MP_TWD_SIZE 0x00000100
82#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ 81#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */
83#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ 82#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */
84 83
diff --git a/arch/arm/mach-realview/include/mach/board-pba8.h b/arch/arm/mach-realview/include/mach/board-pba8.h
new file mode 100644
index 000000000000..c8bed8f58bab
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/board-pba8.h
@@ -0,0 +1,152 @@
1/*
2 * include/asm-arm/arch-realview/board-pba8.h
3 *
4 * Copyright (C) 2008 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __ASM_ARCH_BOARD_PBA8_H
22#define __ASM_ARCH_BOARD_PBA8_H
23
24#include <mach/platform.h>
25
26/*
27 * Peripheral addresses
28 */
29#define REALVIEW_PBA8_UART0_BASE 0x10009000 /* UART 0 */
30#define REALVIEW_PBA8_UART1_BASE 0x1000A000 /* UART 1 */
31#define REALVIEW_PBA8_UART2_BASE 0x1000B000 /* UART 2 */
32#define REALVIEW_PBA8_UART3_BASE 0x1000C000 /* UART 3 */
33#define REALVIEW_PBA8_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
34#define REALVIEW_PBA8_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */
35#define REALVIEW_PBA8_WATCHDOG_BASE 0x10010000 /* watchdog interface */
36#define REALVIEW_PBA8_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
37#define REALVIEW_PBA8_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
38#define REALVIEW_PBA8_GPIO0_BASE 0x10013000 /* GPIO port 0 */
39#define REALVIEW_PBA8_RTC_BASE 0x10017000 /* Real Time Clock */
40#define REALVIEW_PBA8_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */
41#define REALVIEW_PBA8_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */
42#define REALVIEW_PBA8_SCTL_BASE 0x1001A000 /* System Controller */
43#define REALVIEW_PBA8_CLCD_BASE 0x10020000 /* CLCD */
44#define REALVIEW_PBA8_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */
45#define REALVIEW_PBA8_DMC_BASE 0x100E0000 /* DMC configuration */
46#define REALVIEW_PBA8_SMC_BASE 0x100E1000 /* SMC configuration */
47#define REALVIEW_PBA8_CAN_BASE 0x100E2000 /* CAN bus */
48#define REALVIEW_PBA8_CF_BASE 0x18000000 /* Compact flash */
49#define REALVIEW_PBA8_CF_MEM_BASE 0x18003000 /* SMC for Compact flash */
50#define REALVIEW_PBA8_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */
51#define REALVIEW_PBA8_FLASH0_BASE 0x40000000
52#define REALVIEW_PBA8_FLASH0_SIZE SZ_64M
53#define REALVIEW_PBA8_FLASH1_BASE 0x44000000
54#define REALVIEW_PBA8_FLASH1_SIZE SZ_64M
55#define REALVIEW_PBA8_ETH_BASE 0x4E000000 /* Ethernet */
56#define REALVIEW_PBA8_USB_BASE 0x4F000000 /* USB */
57#define REALVIEW_PBA8_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */
58#define REALVIEW_PBA8_LT_BASE 0xC0000000 /* Logic Tile expansion */
59#define REALVIEW_PBA8_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */
60#define REALVIEW_PBA8_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */
61
62#define REALVIEW_PBA8_SYS_PLD_CTRL1 0x74
63
64/*
65 * PBA8 PCI regions
66 */
67#define REALVIEW_PBA8_PCI_BASE 0x90040000 /* PCI-X Unit base */
68#define REALVIEW_PBA8_PCI_IO_BASE 0x90050000 /* IO Region on AHB */
69#define REALVIEW_PBA8_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */
70
71#define REALVIEW_PBA8_PCI_BASE_SIZE 0x10000 /* 16 Kb */
72#define REALVIEW_PBA8_PCI_IO_SIZE 0x1000 /* 4 Kb */
73#define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000 /* 512 MB */
74
75/*
76 * Irqs
77 */
78#define IRQ_PBA8_GIC_START 32
79
80/* L220
81#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
82#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
83#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
84*/
85
86/*
87 * PB-A8 on-board gic irq sources
88 */
89#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
90#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
91#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
92#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
93#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
94#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
95#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
96#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
97#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
98 /* 9 reserved */
99#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
100#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
101#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
102#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
103#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
104#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
105#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
106#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
107#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
108#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
109#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
110#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
111#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
112#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
113#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
114#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
115#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
116#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
117#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
118#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
119#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
120#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
121
122/* ... */
123#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
124#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
125#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
126#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
127
128#define IRQ_PBA8_SMC -1
129#define IRQ_PBA8_SCTL -1
130
131#define NR_GIC_PBA8 1
132
133/*
134 * Only define NR_IRQS if less than NR_IRQS_PBA8
135 */
136#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
137
138#if defined(CONFIG_MACH_REALVIEW_PBA8)
139
140#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
141#undef NR_IRQS
142#define NR_IRQS NR_IRQS_PBA8
143#endif
144
145#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
146#undef MAX_GIC_NR
147#define MAX_GIC_NR NR_GIC_PBA8
148#endif
149
150#endif /* CONFIG_MACH_REALVIEW_PBA8 */
151
152#endif /* __ASM_ARCH_BOARD_PBA8_H */
diff --git a/arch/arm/mach-realview/include/mach/debug-macro.S b/arch/arm/mach-realview/include/mach/debug-macro.S
index 7196bcadff0c..92dbcb9e1792 100644
--- a/arch/arm/mach-realview/include/mach/debug-macro.S
+++ b/arch/arm/mach-realview/include/mach/debug-macro.S
@@ -8,15 +8,36 @@
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 * 11 */
12*/ 12
13#if defined(CONFIG_MACH_REALVIEW_EB) || \
14 defined(CONFIG_MACH_REALVIEW_PB11MP) || \
15 defined(CONFIG_MACH_REALVIEW_PBA8)
16#ifndef DEBUG_LL_UART_OFFSET
17#define DEBUG_LL_UART_OFFSET 0x00009000
18#elif DEBUG_LL_UART_OFFSET != 0x00009000
19#warning "DEBUG_LL_UART_OFFSET already defined to a different value"
20#endif
21#endif
22
23#ifdef CONFIG_MACH_REALVIEW_PB1176
24#ifndef DEBUG_LL_UART_OFFSET
25#define DEBUG_LL_UART_OFFSET 0x0010c000
26#elif DEBUG_LL_UART_OFFSET != 0x0010c000
27#warning "DEBUG_LL_UART_OFFSET already defined to a different value"
28#endif
29#endif
30
31#ifndef DEBUG_LL_UART_OFFSET
32#error "Unknown RealView platform"
33#endif
13 34
14 .macro addruart,rx 35 .macro addruart,rx
15 mrc p15, 0, \rx, c1, c0 36 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1 @ MMU enabled? 37 tst \rx, #1 @ MMU enabled?
17 moveq \rx, #0x10000000 38 moveq \rx, #0x10000000
18 movne \rx, #0xf0000000 @ virtual base 39 movne \rx, #0xfb000000 @ virtual base
19 orr \rx, \rx, #0x00009000 40 orr \rx, \rx, #DEBUG_LL_UART_OFFSET
20 .endm 41 .endm
21 42
22#include <asm/hardware/debug-pl01x.S> 43#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-realview/include/mach/hardware.h b/arch/arm/mach-realview/include/mach/hardware.h
index 79a93b3dfca9..b42c14f89acb 100644
--- a/arch/arm/mach-realview/include/mach/hardware.h
+++ b/arch/arm/mach-realview/include/mach/hardware.h
@@ -25,7 +25,14 @@
25#include <asm/sizes.h> 25#include <asm/sizes.h>
26 26
27/* macro to get at IO space when running virtually */ 27/* macro to get at IO space when running virtually */
28#define IO_ADDRESS(x) (((x) & 0x0fffffff) + 0xf0000000) 28/*
29 * Statically mapped addresses:
30 *
31 * 10xx xxxx -> fbxx xxxx
32 * 1exx xxxx -> fdxx xxxx
33 * 1fxx xxxx -> fexx xxxx
34 */
35#define IO_ADDRESS(x) (((x) & 0x03ffffff) + 0xfb000000)
29#define __io_address(n) __io(IO_ADDRESS(n)) 36#define __io_address(n) __io(IO_ADDRESS(n))
30 37
31#endif 38#endif
diff --git a/arch/arm/mach-realview/include/mach/irqs.h b/arch/arm/mach-realview/include/mach/irqs.h
index 02a918529db3..fe5cb987aa21 100644
--- a/arch/arm/mach-realview/include/mach/irqs.h
+++ b/arch/arm/mach-realview/include/mach/irqs.h
@@ -25,6 +25,7 @@
25#include <mach/board-eb.h> 25#include <mach/board-eb.h>
26#include <mach/board-pb11mp.h> 26#include <mach/board-pb11mp.h>
27#include <mach/board-pb1176.h> 27#include <mach/board-pb1176.h>
28#include <mach/board-pba8.h>
28 29
29#define IRQ_LOCALTIMER 29 30#define IRQ_LOCALTIMER 29
30#define IRQ_LOCALWDOG 30 31#define IRQ_LOCALWDOG 30
diff --git a/arch/arm/mach-realview/include/mach/memory.h b/arch/arm/mach-realview/include/mach/memory.h
index 65a0742094f7..293c30025e7e 100644
--- a/arch/arm/mach-realview/include/mach/memory.h
+++ b/arch/arm/mach-realview/include/mach/memory.h
@@ -23,6 +23,10 @@
23/* 23/*
24 * Physical DRAM offset. 24 * Physical DRAM offset.
25 */ 25 */
26#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
27#define PHYS_OFFSET UL(0x70000000)
28#else
26#define PHYS_OFFSET UL(0x00000000) 29#define PHYS_OFFSET UL(0x00000000)
30#endif
27 31
28#endif 32#endif
diff --git a/arch/arm/mach-realview/include/mach/uncompress.h b/arch/arm/mach-realview/include/mach/uncompress.h
index 79f50f218e77..415d634d52ab 100644
--- a/arch/arm/mach-realview/include/mach/uncompress.h
+++ b/arch/arm/mach-realview/include/mach/uncompress.h
@@ -23,6 +23,7 @@
23#include <mach/board-eb.h> 23#include <mach/board-eb.h>
24#include <mach/board-pb11mp.h> 24#include <mach/board-pb11mp.h>
25#include <mach/board-pb1176.h> 25#include <mach/board-pb1176.h>
26#include <mach/board-pba8.h>
26 27
27#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00)) 28#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
28#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c)) 29#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
@@ -40,6 +41,8 @@ static inline unsigned long get_uart_base(void)
40 return REALVIEW_PB11MP_UART0_BASE; 41 return REALVIEW_PB11MP_UART0_BASE;
41 else if (machine_is_realview_pb1176()) 42 else if (machine_is_realview_pb1176())
42 return REALVIEW_PB1176_UART0_BASE; 43 return REALVIEW_PB1176_UART0_BASE;
44 else if (machine_is_realview_pba8())
45 return REALVIEW_PBA8_UART0_BASE;
43 else 46 else
44 return 0; 47 return 0;
45} 48}
diff --git a/arch/arm/mach-realview/include/mach/vmalloc.h b/arch/arm/mach-realview/include/mach/vmalloc.h
index 48cbcc873db2..fe0de1b507ac 100644
--- a/arch/arm/mach-realview/include/mach/vmalloc.h
+++ b/arch/arm/mach-realview/include/mach/vmalloc.h
@@ -18,4 +18,4 @@
18 * along with this program; if not, write to the Free Software 18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21#define VMALLOC_END (PAGE_OFFSET + 0x18000000) 21#define VMALLOC_END 0xf8000000
diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c
index 44d178cd5733..9019ef2e5611 100644
--- a/arch/arm/mach-realview/localtimer.c
+++ b/arch/arm/mach-realview/localtimer.c
@@ -38,18 +38,14 @@ void local_timer_interrupt(void)
38 38
39#ifdef CONFIG_LOCAL_TIMERS 39#ifdef CONFIG_LOCAL_TIMERS
40 40
41#define TWD_BASE(cpu) (twd_base_addr + (cpu) * twd_size)
42
43/* set up by the platform code */ 41/* set up by the platform code */
44void __iomem *twd_base_addr; 42void __iomem *twd_base;
45unsigned int twd_size;
46 43
47static unsigned long mpcore_timer_rate; 44static unsigned long mpcore_timer_rate;
48 45
49static void local_timer_set_mode(enum clock_event_mode mode, 46static void local_timer_set_mode(enum clock_event_mode mode,
50 struct clock_event_device *clk) 47 struct clock_event_device *clk)
51{ 48{
52 void __iomem *base = TWD_BASE(smp_processor_id());
53 unsigned long ctrl; 49 unsigned long ctrl;
54 50
55 switch(mode) { 51 switch(mode) {
@@ -68,17 +64,16 @@ static void local_timer_set_mode(enum clock_event_mode mode,
68 ctrl = 0; 64 ctrl = 0;
69 } 65 }
70 66
71 __raw_writel(ctrl, base + TWD_TIMER_CONTROL); 67 __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
72} 68}
73 69
74static int local_timer_set_next_event(unsigned long evt, 70static int local_timer_set_next_event(unsigned long evt,
75 struct clock_event_device *unused) 71 struct clock_event_device *unused)
76{ 72{
77 void __iomem *base = TWD_BASE(smp_processor_id()); 73 unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL);
78 unsigned long ctrl = __raw_readl(base + TWD_TIMER_CONTROL);
79 74
80 __raw_writel(evt, base + TWD_TIMER_COUNTER); 75 __raw_writel(evt, twd_base + TWD_TIMER_COUNTER);
81 __raw_writel(ctrl | TWD_TIMER_CONTROL_ENABLE, base + TWD_TIMER_CONTROL); 76 __raw_writel(ctrl | TWD_TIMER_CONTROL_ENABLE, twd_base + TWD_TIMER_CONTROL);
82 77
83 return 0; 78 return 0;
84} 79}
@@ -91,19 +86,16 @@ static int local_timer_set_next_event(unsigned long evt,
91 */ 86 */
92int local_timer_ack(void) 87int local_timer_ack(void)
93{ 88{
94 void __iomem *base = TWD_BASE(smp_processor_id()); 89 if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) {
95 90 __raw_writel(1, twd_base + TWD_TIMER_INTSTAT);
96 if (__raw_readl(base + TWD_TIMER_INTSTAT)) {
97 __raw_writel(1, base + TWD_TIMER_INTSTAT);
98 return 1; 91 return 1;
99 } 92 }
100 93
101 return 0; 94 return 0;
102} 95}
103 96
104static void __cpuinit twd_calibrate_rate(unsigned int cpu) 97static void __cpuinit twd_calibrate_rate(void)
105{ 98{
106 void __iomem *base = TWD_BASE(cpu);
107 unsigned long load, count; 99 unsigned long load, count;
108 u64 waitjiffies; 100 u64 waitjiffies;
109 101
@@ -124,15 +116,15 @@ static void __cpuinit twd_calibrate_rate(unsigned int cpu)
124 waitjiffies += 5; 116 waitjiffies += 5;
125 117
126 /* enable, no interrupt or reload */ 118 /* enable, no interrupt or reload */
127 __raw_writel(0x1, base + TWD_TIMER_CONTROL); 119 __raw_writel(0x1, twd_base + TWD_TIMER_CONTROL);
128 120
129 /* maximum value */ 121 /* maximum value */
130 __raw_writel(0xFFFFFFFFU, base + TWD_TIMER_COUNTER); 122 __raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);
131 123
132 while (get_jiffies_64() < waitjiffies) 124 while (get_jiffies_64() < waitjiffies)
133 udelay(10); 125 udelay(10);
134 126
135 count = __raw_readl(base + TWD_TIMER_COUNTER); 127 count = __raw_readl(twd_base + TWD_TIMER_COUNTER);
136 128
137 mpcore_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5); 129 mpcore_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
138 130
@@ -142,18 +134,19 @@ static void __cpuinit twd_calibrate_rate(unsigned int cpu)
142 134
143 load = mpcore_timer_rate / HZ; 135 load = mpcore_timer_rate / HZ;
144 136
145 __raw_writel(load, base + TWD_TIMER_LOAD); 137 __raw_writel(load, twd_base + TWD_TIMER_LOAD);
146} 138}
147 139
148/* 140/*
149 * Setup the local clock events for a CPU. 141 * Setup the local clock events for a CPU.
150 */ 142 */
151void __cpuinit local_timer_setup(unsigned int cpu) 143void __cpuinit local_timer_setup(void)
152{ 144{
145 unsigned int cpu = smp_processor_id();
153 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu); 146 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
154 unsigned long flags; 147 unsigned long flags;
155 148
156 twd_calibrate_rate(cpu); 149 twd_calibrate_rate();
157 150
158 clk->name = "local_timer"; 151 clk->name = "local_timer";
159 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; 152 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
@@ -178,9 +171,9 @@ void __cpuinit local_timer_setup(unsigned int cpu)
178/* 171/*
179 * take a local timer down 172 * take a local timer down
180 */ 173 */
181void __cpuexit local_timer_stop(unsigned int cpu) 174void __cpuexit local_timer_stop(void)
182{ 175{
183 __raw_writel(0, TWD_BASE(cpu) + TWD_TIMER_CONTROL); 176 __raw_writel(0, twd_base + TWD_TIMER_CONTROL);
184} 177}
185 178
186#else /* CONFIG_LOCAL_TIMERS */ 179#else /* CONFIG_LOCAL_TIMERS */
@@ -190,8 +183,9 @@ static void dummy_timer_set_mode(enum clock_event_mode mode,
190{ 183{
191} 184}
192 185
193void __cpuinit local_timer_setup(unsigned int cpu) 186void __cpuinit local_timer_setup(void)
194{ 187{
188 unsigned int cpu = smp_processor_id();
195 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu); 189 struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
196 190
197 clk->name = "dummy_timer"; 191 clk->name = "dummy_timer";
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index e102aeb0f76e..8fce85f33033 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -23,6 +23,8 @@
23#include <mach/board-pb11mp.h> 23#include <mach/board-pb11mp.h>
24#include <mach/scu.h> 24#include <mach/scu.h>
25 25
26#include "core.h"
27
26extern void realview_secondary_startup(void); 28extern void realview_secondary_startup(void);
27 29
28/* 30/*
@@ -31,15 +33,20 @@ extern void realview_secondary_startup(void);
31 */ 33 */
32volatile int __cpuinitdata pen_release = -1; 34volatile int __cpuinitdata pen_release = -1;
33 35
36static void __iomem *scu_base_addr(void)
37{
38 if (machine_is_realview_eb_mp())
39 return __io_address(REALVIEW_EB11MP_SCU_BASE);
40 else if (machine_is_realview_pb11mp())
41 return __io_address(REALVIEW_TC11MP_SCU_BASE);
42 else
43 return (void __iomem *)0;
44}
45
34static unsigned int __init get_core_count(void) 46static unsigned int __init get_core_count(void)
35{ 47{
36 unsigned int ncores; 48 unsigned int ncores;
37 void __iomem *scu_base = 0; 49 void __iomem *scu_base = scu_base_addr();
38
39 if (machine_is_realview_eb() && core_tile_eb11mp())
40 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
41 else if (machine_is_realview_pb11mp())
42 scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
43 50
44 if (scu_base) { 51 if (scu_base) {
45 ncores = __raw_readl(scu_base + SCU_CONFIG); 52 ncores = __raw_readl(scu_base + SCU_CONFIG);
@@ -56,14 +63,7 @@ static unsigned int __init get_core_count(void)
56static void scu_enable(void) 63static void scu_enable(void)
57{ 64{
58 u32 scu_ctrl; 65 u32 scu_ctrl;
59 void __iomem *scu_base; 66 void __iomem *scu_base = scu_base_addr();
60
61 if (machine_is_realview_eb() && core_tile_eb11mp())
62 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
63 else if (machine_is_realview_pb11mp())
64 scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
65 else
66 BUG();
67 67
68 scu_ctrl = __raw_readl(scu_base + SCU_CTRL); 68 scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
69 scu_ctrl |= 1; 69 scu_ctrl |= 1;
@@ -88,10 +88,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
88 * core (e.g. timer irq), then they will not have been enabled 88 * core (e.g. timer irq), then they will not have been enabled
89 * for us: do so 89 * for us: do so
90 */ 90 */
91 if (machine_is_realview_eb() && core_tile_eb11mp()) 91 gic_cpu_init(0, gic_cpu_base_addr);
92 gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
93 else if (machine_is_realview_pb11mp())
94 gic_cpu_init(0, __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
95 92
96 /* 93 /*
97 * let the primary processor know we're out of the 94 * let the primary processor know we're out of the
@@ -232,9 +229,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
232 * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in 229 * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
233 * realview_timer_init 230 * realview_timer_init
234 */ 231 */
235 if ((machine_is_realview_eb() && core_tile_eb11mp()) || 232 local_timer_setup();
236 machine_is_realview_pb11mp())
237 local_timer_setup(cpu);
238#endif 233#endif
239 234
240 /* 235 /*
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 3420e2e719e6..bed39ed97613 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -108,7 +108,7 @@ static struct map_desc realview_eb11mp_io_desc[] __initdata = {
108static void __init realview_eb_map_io(void) 108static void __init realview_eb_map_io(void)
109{ 109{
110 iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc)); 110 iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
111 if (core_tile_eb11mp()) 111 if (core_tile_eb11mp() || core_tile_a9mp())
112 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc)); 112 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
113} 113}
114 114
@@ -242,12 +242,6 @@ static struct resource realview_eb_eth_resources[] = {
242 }, 242 },
243}; 243};
244 244
245static struct platform_device realview_eb_eth_device = {
246 .id = 0,
247 .num_resources = ARRAY_SIZE(realview_eb_eth_resources),
248 .resource = realview_eb_eth_resources,
249};
250
251/* 245/*
252 * Detect and register the correct Ethernet device. RealView/EB rev D 246 * Detect and register the correct Ethernet device. RealView/EB rev D
253 * platforms use the newer SMSC LAN9118 Ethernet chip 247 * platforms use the newer SMSC LAN9118 Ethernet chip
@@ -255,26 +249,24 @@ static struct platform_device realview_eb_eth_device = {
255static int eth_device_register(void) 249static int eth_device_register(void)
256{ 250{
257 void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K); 251 void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
252 const char *name = NULL;
258 u32 idrev; 253 u32 idrev;
259 254
260 if (!eth_addr) 255 if (!eth_addr)
261 return -ENOMEM; 256 return -ENOMEM;
262 257
263 idrev = readl(eth_addr + 0x50); 258 idrev = readl(eth_addr + 0x50);
264 if ((idrev & 0xFFFF0000) == 0x01180000) 259 if ((idrev & 0xFFFF0000) != 0x01180000)
265 /* SMSC LAN9118 chip present */ 260 /* SMSC LAN9118 not present, use LAN91C111 instead */
266 realview_eb_eth_device.name = "smc911x"; 261 name = "smc91x";
267 else
268 /* SMSC 91C111 chip present */
269 realview_eb_eth_device.name = "smc91x";
270 262
271 iounmap(eth_addr); 263 iounmap(eth_addr);
272 return platform_device_register(&realview_eb_eth_device); 264 return realview_eth_register(name, realview_eb_eth_resources);
273} 265}
274 266
275static void __init gic_init_irq(void) 267static void __init gic_init_irq(void)
276{ 268{
277 if (core_tile_eb11mp()) { 269 if (core_tile_eb11mp() || core_tile_a9mp()) {
278 unsigned int pldctrl; 270 unsigned int pldctrl;
279 271
280 /* new irq mode */ 272 /* new irq mode */
@@ -342,10 +334,9 @@ static void __init realview_eb_timer_init(void)
342 timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE); 334 timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
343 timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20; 335 timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
344 336
345 if (core_tile_eb11mp()) { 337 if (core_tile_eb11mp() || core_tile_a9mp()) {
346#ifdef CONFIG_LOCAL_TIMERS 338#ifdef CONFIG_LOCAL_TIMERS
347 twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE); 339 twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
348 twd_size = REALVIEW_EB11MP_TWD_SIZE;
349#endif 340#endif
350 timer_irq = IRQ_EB11MP_TIMER0_1; 341 timer_irq = IRQ_EB11MP_TIMER0_1;
351 } else 342 } else
@@ -362,7 +353,7 @@ static void __init realview_eb_init(void)
362{ 353{
363 int i; 354 int i;
364 355
365 if (core_tile_eb11mp()) { 356 if (core_tile_eb11mp() || core_tile_a9mp()) {
366 realview_eb11mp_fixup(); 357 realview_eb11mp_fixup();
367 358
368#ifdef CONFIG_CACHE_L2X0 359#ifdef CONFIG_CACHE_L2X0
@@ -390,7 +381,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
390 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 381 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
391 .phys_io = REALVIEW_EB_UART0_BASE, 382 .phys_io = REALVIEW_EB_UART0_BASE,
392 .io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc, 383 .io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc,
393 .boot_params = 0x00000100, 384 .boot_params = PHYS_OFFSET + 0x00000100,
394 .map_io = realview_eb_map_io, 385 .map_io = realview_eb_map_io,
395 .init_irq = gic_init_irq, 386 .init_irq = gic_init_irq,
396 .timer = &realview_eb_timer, 387 .timer = &realview_eb_timer,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 0481416d37c9..8f0683c22140 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -222,13 +222,6 @@ static struct resource realview_pb1176_smsc911x_resources[] = {
222 }, 222 },
223}; 223};
224 224
225static struct platform_device realview_pb1176_smsc911x_device = {
226 .name = "smc911x",
227 .id = 0,
228 .num_resources = ARRAY_SIZE(realview_pb1176_smsc911x_resources),
229 .resource = realview_pb1176_smsc911x_resources,
230};
231
232static void __init gic_init_irq(void) 225static void __init gic_init_irq(void)
233{ 226{
234 /* ARM1176 DevChip GIC, primary */ 227 /* ARM1176 DevChip GIC, primary */
@@ -266,7 +259,7 @@ static void __init realview_pb1176_init(void)
266#endif 259#endif
267 260
268 realview_flash_register(&realview_pb1176_flash_resource, 1); 261 realview_flash_register(&realview_pb1176_flash_resource, 1);
269 platform_device_register(&realview_pb1176_smsc911x_device); 262 realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
270 263
271 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 264 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
272 struct amba_device *d = amba_devs[i]; 265 struct amba_device *d = amba_devs[i];
@@ -282,7 +275,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
282 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 275 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
283 .phys_io = REALVIEW_PB1176_UART0_BASE, 276 .phys_io = REALVIEW_PB1176_UART0_BASE,
284 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc, 277 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
285 .boot_params = 0x00000100, 278 .boot_params = PHYS_OFFSET + 0x00000100,
286 .map_io = realview_pb1176_map_io, 279 .map_io = realview_pb1176_map_io,
287 .init_irq = gic_init_irq, 280 .init_irq = gic_init_irq,
288 .timer = &realview_pb1176_timer, 281 .timer = &realview_pb1176_timer,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 6197dd8e8edf..3ebdb2dadd6f 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -230,13 +230,6 @@ static struct resource realview_pb11mp_smsc911x_resources[] = {
230 }, 230 },
231}; 231};
232 232
233static struct platform_device realview_pb11mp_smsc911x_device = {
234 .name = "smc911x",
235 .id = 0,
236 .num_resources = ARRAY_SIZE(realview_pb11mp_smsc911x_resources),
237 .resource = realview_pb11mp_smsc911x_resources,
238};
239
240struct resource realview_pb11mp_cf_resources[] = { 233struct resource realview_pb11mp_cf_resources[] = {
241 [0] = { 234 [0] = {
242 .start = REALVIEW_PB11MP_CF_BASE, 235 .start = REALVIEW_PB11MP_CF_BASE,
@@ -292,8 +285,7 @@ static void __init realview_pb11mp_timer_init(void)
292 timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20; 285 timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
293 286
294#ifdef CONFIG_LOCAL_TIMERS 287#ifdef CONFIG_LOCAL_TIMERS
295 twd_base_addr = __io_address(REALVIEW_TC11MP_TWD_BASE); 288 twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
296 twd_size = REALVIEW_TC11MP_TWD_SIZE;
297#endif 289#endif
298 realview_timer_init(IRQ_TC11MP_TIMER0_1); 290 realview_timer_init(IRQ_TC11MP_TIMER0_1);
299} 291}
@@ -314,7 +306,7 @@ static void __init realview_pb11mp_init(void)
314 306
315 realview_flash_register(realview_pb11mp_flash_resource, 307 realview_flash_register(realview_pb11mp_flash_resource,
316 ARRAY_SIZE(realview_pb11mp_flash_resource)); 308 ARRAY_SIZE(realview_pb11mp_flash_resource));
317 platform_device_register(&realview_pb11mp_smsc911x_device); 309 realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
318 platform_device_register(&realview_i2c_device); 310 platform_device_register(&realview_i2c_device);
319 platform_device_register(&realview_pb11mp_cf_device); 311 platform_device_register(&realview_pb11mp_cf_device);
320 312
@@ -332,7 +324,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
332 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 324 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
333 .phys_io = REALVIEW_PB11MP_UART0_BASE, 325 .phys_io = REALVIEW_PB11MP_UART0_BASE,
334 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc, 326 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc,
335 .boot_params = 0x00000100, 327 .boot_params = PHYS_OFFSET + 0x00000100,
336 .map_io = realview_pb11mp_map_io, 328 .map_io = realview_pb11mp_map_io,
337 .init_irq = gic_init_irq, 329 .init_irq = gic_init_irq,
338 .timer = &realview_pb11mp_timer, 330 .timer = &realview_pb11mp_timer,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
new file mode 100644
index 000000000000..34c94435d2d8
--- /dev/null
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -0,0 +1,300 @@
1/*
2 * linux/arch/arm/mach-realview/realview_pba8.c
3 *
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/init.h>
23#include <linux/platform_device.h>
24#include <linux/sysdev.h>
25#include <linux/amba/bus.h>
26#include <linux/io.h>
27
28#include <asm/irq.h>
29#include <asm/leds.h>
30#include <asm/mach-types.h>
31#include <asm/hardware/gic.h>
32#include <asm/hardware/icst307.h>
33
34#include <asm/mach/arch.h>
35#include <asm/mach/map.h>
36#include <asm/mach/mmc.h>
37#include <asm/mach/time.h>
38
39#include <mach/hardware.h>
40#include <mach/board-pba8.h>
41#include <mach/irqs.h>
42
43#include "core.h"
44#include "clock.h"
45
46static struct map_desc realview_pba8_io_desc[] __initdata = {
47 {
48 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
49 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
50 .length = SZ_4K,
51 .type = MT_DEVICE,
52 }, {
53 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
54 .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE),
55 .length = SZ_4K,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
59 .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE),
60 .length = SZ_4K,
61 .type = MT_DEVICE,
62 }, {
63 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
64 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
65 .length = SZ_4K,
66 .type = MT_DEVICE,
67 }, {
68 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
69 .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE),
70 .length = SZ_4K,
71 .type = MT_DEVICE,
72 }, {
73 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
74 .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE),
75 .length = SZ_4K,
76 .type = MT_DEVICE,
77 },
78#ifdef CONFIG_PCI
79 {
80 .virtual = PCIX_UNIT_BASE,
81 .pfn = __phys_to_pfn(REALVIEW_PBA8_PCI_BASE),
82 .length = REALVIEW_PBA8_PCI_BASE_SIZE,
83 .type = MT_DEVICE
84 },
85#endif
86#ifdef CONFIG_DEBUG_LL
87 {
88 .virtual = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
89 .pfn = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE),
90 .length = SZ_4K,
91 .type = MT_DEVICE,
92 },
93#endif
94};
95
96static void __init realview_pba8_map_io(void)
97{
98 iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc));
99}
100
101/*
102 * RealView PBA8Core AMBA devices
103 */
104
105#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ }
106#define GPIO2_DMA { 0, 0 }
107#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ }
108#define GPIO3_DMA { 0, 0 }
109#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ }
110#define AACI_DMA { 0x80, 0x81 }
111#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
112#define MMCI0_DMA { 0x84, 0 }
113#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ }
114#define KMI0_DMA { 0, 0 }
115#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ }
116#define KMI1_DMA { 0, 0 }
117#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ }
118#define PBA8_SMC_DMA { 0, 0 }
119#define MPMC_IRQ { NO_IRQ, NO_IRQ }
120#define MPMC_DMA { 0, 0 }
121#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ }
122#define PBA8_CLCD_DMA { 0, 0 }
123#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ }
124#define DMAC_DMA { 0, 0 }
125#define SCTL_IRQ { NO_IRQ, NO_IRQ }
126#define SCTL_DMA { 0, 0 }
127#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ }
128#define PBA8_WATCHDOG_DMA { 0, 0 }
129#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ }
130#define PBA8_GPIO0_DMA { 0, 0 }
131#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ }
132#define GPIO1_DMA { 0, 0 }
133#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ }
134#define PBA8_RTC_DMA { 0, 0 }
135#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ }
136#define SCI_DMA { 7, 6 }
137#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ }
138#define PBA8_UART0_DMA { 15, 14 }
139#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ }
140#define PBA8_UART1_DMA { 13, 12 }
141#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ }
142#define PBA8_UART2_DMA { 11, 10 }
143#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ }
144#define PBA8_UART3_DMA { 0x86, 0x87 }
145#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ }
146#define PBA8_SSP_DMA { 9, 8 }
147
148/* FPGA Primecells */
149AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
150AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
151AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
152AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
153AMBA_DEVICE(uart3, "fpga:09", PBA8_UART3, NULL);
154
155/* DevChip Primecells */
156AMBA_DEVICE(smc, "dev:00", PBA8_SMC, NULL);
157AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
158AMBA_DEVICE(wdog, "dev:e1", PBA8_WATCHDOG, NULL);
159AMBA_DEVICE(gpio0, "dev:e4", PBA8_GPIO0, NULL);
160AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
161AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
162AMBA_DEVICE(rtc, "dev:e8", PBA8_RTC, NULL);
163AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
164AMBA_DEVICE(uart0, "dev:f1", PBA8_UART0, NULL);
165AMBA_DEVICE(uart1, "dev:f2", PBA8_UART1, NULL);
166AMBA_DEVICE(uart2, "dev:f3", PBA8_UART2, NULL);
167AMBA_DEVICE(ssp0, "dev:f4", PBA8_SSP, NULL);
168
169/* Primecells on the NEC ISSP chip */
170AMBA_DEVICE(clcd, "issp:20", PBA8_CLCD, &clcd_plat_data);
171AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
172
173static struct amba_device *amba_devs[] __initdata = {
174 &dmac_device,
175 &uart0_device,
176 &uart1_device,
177 &uart2_device,
178 &uart3_device,
179 &smc_device,
180 &clcd_device,
181 &sctl_device,
182 &wdog_device,
183 &gpio0_device,
184 &gpio1_device,
185 &gpio2_device,
186 &rtc_device,
187 &sci0_device,
188 &ssp0_device,
189 &aaci_device,
190 &mmc0_device,
191 &kmi0_device,
192 &kmi1_device,
193};
194
195/*
196 * RealView PB-A8 platform devices
197 */
198static struct resource realview_pba8_flash_resource[] = {
199 [0] = {
200 .start = REALVIEW_PBA8_FLASH0_BASE,
201 .end = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1,
202 .flags = IORESOURCE_MEM,
203 },
204 [1] = {
205 .start = REALVIEW_PBA8_FLASH1_BASE,
206 .end = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1,
207 .flags = IORESOURCE_MEM,
208 },
209};
210
211static struct resource realview_pba8_smsc911x_resources[] = {
212 [0] = {
213 .start = REALVIEW_PBA8_ETH_BASE,
214 .end = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1,
215 .flags = IORESOURCE_MEM,
216 },
217 [1] = {
218 .start = IRQ_PBA8_ETH,
219 .end = IRQ_PBA8_ETH,
220 .flags = IORESOURCE_IRQ,
221 },
222};
223
224struct resource realview_pba8_cf_resources[] = {
225 [0] = {
226 .start = REALVIEW_PBA8_CF_BASE,
227 .end = REALVIEW_PBA8_CF_BASE + SZ_4K - 1,
228 .flags = IORESOURCE_MEM,
229 },
230 [1] = {
231 .start = REALVIEW_PBA8_CF_MEM_BASE,
232 .end = REALVIEW_PBA8_CF_MEM_BASE + SZ_4K - 1,
233 .flags = IORESOURCE_MEM,
234 },
235 [2] = {
236 .start = -1, /* FIXME: Find correct irq */
237 .end = -1,
238 .flags = IORESOURCE_IRQ,
239 },
240};
241
242struct platform_device realview_pba8_cf_device = {
243 .name = "compactflash",
244 .id = 0,
245 .num_resources = ARRAY_SIZE(realview_pba8_cf_resources),
246 .resource = realview_pba8_cf_resources,
247};
248
249static void __init gic_init_irq(void)
250{
251 /* ARM PB-A8 on-board GIC */
252 gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE);
253 gic_dist_init(0, __io_address(REALVIEW_PBA8_GIC_DIST_BASE), IRQ_PBA8_GIC_START);
254 gic_cpu_init(0, __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
255}
256
257static void __init realview_pba8_timer_init(void)
258{
259 timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE);
260 timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20;
261 timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE);
262 timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20;
263
264 realview_timer_init(IRQ_PBA8_TIMER0_1);
265}
266
267static struct sys_timer realview_pba8_timer = {
268 .init = realview_pba8_timer_init,
269};
270
271static void __init realview_pba8_init(void)
272{
273 int i;
274
275 realview_flash_register(realview_pba8_flash_resource,
276 ARRAY_SIZE(realview_pba8_flash_resource));
277 realview_eth_register(NULL, realview_pba8_smsc911x_resources);
278 platform_device_register(&realview_i2c_device);
279 platform_device_register(&realview_pba8_cf_device);
280
281 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
282 struct amba_device *d = amba_devs[i];
283 amba_device_register(d, &iomem_resource);
284 }
285
286#ifdef CONFIG_LEDS
287 leds_event = realview_leds_event;
288#endif
289}
290
291MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
292 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
293 .phys_io = REALVIEW_PBA8_UART0_BASE,
294 .io_pg_offst = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc,
295 .boot_params = PHYS_OFFSET + 0x00000100,
296 .map_io = realview_pba8_map_io,
297 .init_irq = gic_init_irq,
298 .timer = &realview_pba8_timer,
299 .init_machine = realview_pba8_init,
300MACHINE_END
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 10:27:36 -0500