aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-realview/realview_pba8.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-realview/realview_pba8.c')
-rw-r--r--arch/arm/mach-realview/realview_pba8.c22
1 files changed, 1 insertions, 21 deletions
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 7d0f1734a217..fb6866558760 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -126,47 +126,26 @@ static struct pl022_ssp_controller ssp0_plat_data = {
126 */ 126 */
127 127
128#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ } 128#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ }
129#define GPIO2_DMA { 0, 0 }
130#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ } 129#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ }
131#define GPIO3_DMA { 0, 0 }
132#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ } 130#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ }
133#define AACI_DMA { 0x80, 0x81 }
134#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } 131#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
135#define MMCI0_DMA { 0x84, 0 }
136#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ } 132#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ }
137#define KMI0_DMA { 0, 0 }
138#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ } 133#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ }
139#define KMI1_DMA { 0, 0 }
140#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ } 134#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ }
141#define PBA8_SMC_DMA { 0, 0 }
142#define MPMC_IRQ { NO_IRQ, NO_IRQ } 135#define MPMC_IRQ { NO_IRQ, NO_IRQ }
143#define MPMC_DMA { 0, 0 }
144#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ } 136#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ }
145#define PBA8_CLCD_DMA { 0, 0 }
146#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ } 137#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ }
147#define DMAC_DMA { 0, 0 }
148#define SCTL_IRQ { NO_IRQ, NO_IRQ } 138#define SCTL_IRQ { NO_IRQ, NO_IRQ }
149#define SCTL_DMA { 0, 0 }
150#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ } 139#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ }
151#define PBA8_WATCHDOG_DMA { 0, 0 }
152#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ } 140#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ }
153#define PBA8_GPIO0_DMA { 0, 0 }
154#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ } 141#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ }
155#define GPIO1_DMA { 0, 0 }
156#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ } 142#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ }
157#define PBA8_RTC_DMA { 0, 0 }
158#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ } 143#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ }
159#define SCI_DMA { 7, 6 }
160#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ } 144#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ }
161#define PBA8_UART0_DMA { 15, 14 }
162#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ } 145#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ }
163#define PBA8_UART1_DMA { 13, 12 }
164#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ } 146#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ }
165#define PBA8_UART2_DMA { 11, 10 }
166#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ } 147#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ }
167#define PBA8_UART3_DMA { 0x86, 0x87 }
168#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ } 148#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ }
169#define PBA8_SSP_DMA { 9, 8 }
170 149
171/* FPGA Primecells */ 150/* FPGA Primecells */
172AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 151AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
@@ -334,6 +313,7 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
334 .boot_params = PLAT_PHYS_OFFSET + 0x00000100, 313 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
335 .fixup = realview_fixup, 314 .fixup = realview_fixup,
336 .map_io = realview_pba8_map_io, 315 .map_io = realview_pba8_map_io,
316 .init_early = realview_init_early,
337 .init_irq = gic_init_irq, 317 .init_irq = gic_init_irq,
338 .timer = &realview_pba8_timer, 318 .timer = &realview_pba8_timer,
339 .init_machine = realview_pba8_init, 319 .init_machine = realview_pba8_init,