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1/*
2 * linux/arch/arm/mach-realview/realview_pba8.c
3 *
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/init.h>
23#include <linux/platform_device.h>
24#include <linux/sysdev.h>
25#include <linux/amba/bus.h>
26#include <linux/io.h>
27
28#include <asm/irq.h>
29#include <asm/leds.h>
30#include <asm/mach-types.h>
31#include <asm/hardware/gic.h>
32#include <asm/hardware/icst307.h>
33
34#include <asm/mach/arch.h>
35#include <asm/mach/map.h>
36#include <asm/mach/mmc.h>
37#include <asm/mach/time.h>
38
39#include <mach/hardware.h>
40#include <mach/board-pba8.h>
41#include <mach/irqs.h>
42
43#include "core.h"
44#include "clock.h"
45
46static struct map_desc realview_pba8_io_desc[] __initdata = {
47 {
48 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
49 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
50 .length = SZ_4K,
51 .type = MT_DEVICE,
52 }, {
53 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
54 .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE),
55 .length = SZ_4K,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
59 .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE),
60 .length = SZ_4K,
61 .type = MT_DEVICE,
62 }, {
63 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
64 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
65 .length = SZ_4K,
66 .type = MT_DEVICE,
67 }, {
68 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
69 .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE),
70 .length = SZ_4K,
71 .type = MT_DEVICE,
72 }, {
73 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
74 .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE),
75 .length = SZ_4K,
76 .type = MT_DEVICE,
77 },
78#ifdef CONFIG_PCI
79 {
80 .virtual = PCIX_UNIT_BASE,
81 .pfn = __phys_to_pfn(REALVIEW_PBA8_PCI_BASE),
82 .length = REALVIEW_PBA8_PCI_BASE_SIZE,
83 .type = MT_DEVICE
84 },
85#endif
86#ifdef CONFIG_DEBUG_LL
87 {
88 .virtual = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
89 .pfn = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE),
90 .length = SZ_4K,
91 .type = MT_DEVICE,
92 },
93#endif
94};
95
96static void __init realview_pba8_map_io(void)
97{
98 iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc));
99}
100
101/*
102 * RealView PBA8Core AMBA devices
103 */
104
105#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ }
106#define GPIO2_DMA { 0, 0 }
107#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ }
108#define GPIO3_DMA { 0, 0 }
109#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ }
110#define AACI_DMA { 0x80, 0x81 }
111#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
112#define MMCI0_DMA { 0x84, 0 }
113#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ }
114#define KMI0_DMA { 0, 0 }
115#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ }
116#define KMI1_DMA { 0, 0 }
117#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ }
118#define PBA8_SMC_DMA { 0, 0 }
119#define MPMC_IRQ { NO_IRQ, NO_IRQ }
120#define MPMC_DMA { 0, 0 }
121#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ }
122#define PBA8_CLCD_DMA { 0, 0 }
123#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ }
124#define DMAC_DMA { 0, 0 }
125#define SCTL_IRQ { NO_IRQ, NO_IRQ }
126#define SCTL_DMA { 0, 0 }
127#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ }
128#define PBA8_WATCHDOG_DMA { 0, 0 }
129#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ }
130#define PBA8_GPIO0_DMA { 0, 0 }
131#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ }
132#define GPIO1_DMA { 0, 0 }
133#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ }
134#define PBA8_RTC_DMA { 0, 0 }
135#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ }
136#define SCI_DMA { 7, 6 }
137#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ }
138#define PBA8_UART0_DMA { 15, 14 }
139#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ }
140#define PBA8_UART1_DMA { 13, 12 }
141#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ }
142#define PBA8_UART2_DMA { 11, 10 }
143#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ }
144#define PBA8_UART3_DMA { 0x86, 0x87 }
145#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ }
146#define PBA8_SSP_DMA { 9, 8 }
147
148/* FPGA Primecells */
149AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
150AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
151AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
152AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
153AMBA_DEVICE(uart3, "fpga:09", PBA8_UART3, NULL);
154
155/* DevChip Primecells */
156AMBA_DEVICE(smc, "dev:00", PBA8_SMC, NULL);
157AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
158AMBA_DEVICE(wdog, "dev:e1", PBA8_WATCHDOG, NULL);
159AMBA_DEVICE(gpio0, "dev:e4", PBA8_GPIO0, NULL);
160AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
161AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
162AMBA_DEVICE(rtc, "dev:e8", PBA8_RTC, NULL);
163AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
164AMBA_DEVICE(uart0, "dev:f1", PBA8_UART0, NULL);
165AMBA_DEVICE(uart1, "dev:f2", PBA8_UART1, NULL);
166AMBA_DEVICE(uart2, "dev:f3", PBA8_UART2, NULL);
167AMBA_DEVICE(ssp0, "dev:f4", PBA8_SSP, NULL);
168
169/* Primecells on the NEC ISSP chip */
170AMBA_DEVICE(clcd, "issp:20", PBA8_CLCD, &clcd_plat_data);
171AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
172
173static struct amba_device *amba_devs[] __initdata = {
174 &dmac_device,
175 &uart0_device,
176 &uart1_device,
177 &uart2_device,
178 &uart3_device,
179 &smc_device,
180 &clcd_device,
181 &sctl_device,
182 &wdog_device,
183 &gpio0_device,
184 &gpio1_device,
185 &gpio2_device,
186 &rtc_device,
187 &sci0_device,
188 &ssp0_device,
189 &aaci_device,
190 &mmc0_device,
191 &kmi0_device,
192 &kmi1_device,
193};
194
195/*
196 * RealView PB-A8 platform devices
197 */
198static struct resource realview_pba8_flash_resource[] = {
199 [0] = {
200 .start = REALVIEW_PBA8_FLASH0_BASE,
201 .end = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1,
202 .flags = IORESOURCE_MEM,
203 },
204 [1] = {
205 .start = REALVIEW_PBA8_FLASH1_BASE,
206 .end = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1,
207 .flags = IORESOURCE_MEM,
208 },
209};
210
211static struct resource realview_pba8_smsc911x_resources[] = {
212 [0] = {
213 .start = REALVIEW_PBA8_ETH_BASE,
214 .end = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1,
215 .flags = IORESOURCE_MEM,
216 },
217 [1] = {
218 .start = IRQ_PBA8_ETH,
219 .end = IRQ_PBA8_ETH,
220 .flags = IORESOURCE_IRQ,
221 },
222};
223
224static struct platform_device realview_pba8_smsc911x_device = {
225 .name = "smc911x",
226 .id = 0,
227 .num_resources = ARRAY_SIZE(realview_pba8_smsc911x_resources),
228 .resource = realview_pba8_smsc911x_resources,
229};
230
231struct resource realview_pba8_cf_resources[] = {
232 [0] = {
233 .start = REALVIEW_PBA8_CF_BASE,
234 .end = REALVIEW_PBA8_CF_BASE + SZ_4K - 1,
235 .flags = IORESOURCE_MEM,
236 },
237 [1] = {
238 .start = REALVIEW_PBA8_CF_MEM_BASE,
239 .end = REALVIEW_PBA8_CF_MEM_BASE + SZ_4K - 1,
240 .flags = IORESOURCE_MEM,
241 },
242 [2] = {
243 .start = -1, /* FIXME: Find correct irq */
244 .end = -1,
245 .flags = IORESOURCE_IRQ,
246 },
247};
248
249struct platform_device realview_pba8_cf_device = {
250 .name = "compactflash",
251 .id = 0,
252 .num_resources = ARRAY_SIZE(realview_pba8_cf_resources),
253 .resource = realview_pba8_cf_resources,
254};
255
256static void __init gic_init_irq(void)
257{
258 /* ARM PB-A8 on-board GIC */
259 gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE);
260 gic_dist_init(0, __io_address(REALVIEW_PBA8_GIC_DIST_BASE), IRQ_PBA8_GIC_START);
261 gic_cpu_init(0, __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
262}
263
264static void __init realview_pba8_timer_init(void)
265{
266 timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE);
267 timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20;
268 timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE);
269 timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20;
270
271 realview_timer_init(IRQ_PBA8_TIMER0_1);
272}
273
274static struct sys_timer realview_pba8_timer = {
275 .init = realview_pba8_timer_init,
276};
277
278static void __init realview_pba8_init(void)
279{
280 int i;
281
282 realview_flash_register(realview_pba8_flash_resource,
283 ARRAY_SIZE(realview_pba8_flash_resource));
284 platform_device_register(&realview_pba8_smsc911x_device);
285 platform_device_register(&realview_i2c_device);
286 platform_device_register(&realview_pba8_cf_device);
287
288 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
289 struct amba_device *d = amba_devs[i];
290 amba_device_register(d, &iomem_resource);
291 }
292
293#ifdef CONFIG_LEDS
294 leds_event = realview_leds_event;
295#endif
296}
297
298MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
299 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
300 .phys_io = REALVIEW_PBA8_UART0_BASE,
301 .io_pg_offst = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc,
302 .boot_params = PHYS_OFFSET + 0x00000100,
303 .map_io = realview_pba8_map_io,
304 .init_irq = gic_init_irq,
305 .timer = &realview_pba8_timer,
306 .init_machine = realview_pba8_init,
307MACHINE_END