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Diffstat (limited to 'arch/arm/mach-realview/realview_eb.c')
-rw-r--r--arch/arm/mach-realview/realview_eb.c21
1 files changed, 0 insertions, 21 deletions
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index c00e52754efe..d0f851b886db 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -144,60 +144,39 @@ static struct pl022_ssp_controller ssp0_plat_data = {
144 * These devices are connected via the core APB bridge 144 * These devices are connected via the core APB bridge
145 */ 145 */
146#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } 146#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ }
147#define GPIO2_DMA { 0, 0 }
148#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } 147#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ }
149#define GPIO3_DMA { 0, 0 }
150 148
151#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } 149#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ }
152#define AACI_DMA { 0x80, 0x81 }
153#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } 150#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
154#define MMCI0_DMA { 0x84, 0 }
155#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } 151#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ }
156#define KMI0_DMA { 0, 0 }
157#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } 152#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ }
158#define KMI1_DMA { 0, 0 }
159 153
160/* 154/*
161 * These devices are connected directly to the multi-layer AHB switch 155 * These devices are connected directly to the multi-layer AHB switch
162 */ 156 */
163#define EB_SMC_IRQ { NO_IRQ, NO_IRQ } 157#define EB_SMC_IRQ { NO_IRQ, NO_IRQ }
164#define EB_SMC_DMA { 0, 0 }
165#define MPMC_IRQ { NO_IRQ, NO_IRQ } 158#define MPMC_IRQ { NO_IRQ, NO_IRQ }
166#define MPMC_DMA { 0, 0 }
167#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } 159#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
168#define EB_CLCD_DMA { 0, 0 }
169#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } 160#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ }
170#define DMAC_DMA { 0, 0 }
171 161
172/* 162/*
173 * These devices are connected via the core APB bridge 163 * These devices are connected via the core APB bridge
174 */ 164 */
175#define SCTL_IRQ { NO_IRQ, NO_IRQ } 165#define SCTL_IRQ { NO_IRQ, NO_IRQ }
176#define SCTL_DMA { 0, 0 }
177#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } 166#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
178#define EB_WATCHDOG_DMA { 0, 0 }
179#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } 167#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
180#define EB_GPIO0_DMA { 0, 0 }
181#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } 168#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ }
182#define GPIO1_DMA { 0, 0 }
183#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } 169#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
184#define EB_RTC_DMA { 0, 0 }
185 170
186/* 171/*
187 * These devices are connected via the DMA APB bridge 172 * These devices are connected via the DMA APB bridge
188 */ 173 */
189#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } 174#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ }
190#define SCI_DMA { 7, 6 }
191#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } 175#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ }
192#define EB_UART0_DMA { 15, 14 }
193#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } 176#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ }
194#define EB_UART1_DMA { 13, 12 }
195#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } 177#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ }
196#define EB_UART2_DMA { 11, 10 }
197#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } 178#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ }
198#define EB_UART3_DMA { 0x86, 0x87 }
199#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } 179#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
200#define EB_SSP_DMA { 9, 8 }
201 180
202/* FPGA Primecells */ 181/* FPGA Primecells */
203AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 182AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);