1 files changed, 129 insertions, 0 deletions
diff --git a/arch/arm/mach-realview/include/mach/irqs-eb.h b/arch/arm/mach-realview/include/mach/irqs-eb.h
new file mode 100644
index 000000000000..204d5378f309
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/irqs-eb.h
@@ -0,0 +1,129 @@
+/*
+ * arch/arm/mach-realview/include/mach/irqs-eb.h
+ *
+ * Copyright (C) 2007 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#ifndef __MACH_IRQS_EB_H
+#define __MACH_IRQS_EB_H
+#define IRQ_EB_GIC_START        32
+/*
+ * RealView EB interrupt sources
+ */
+#define IRQ_EB_WDOG             (IRQ_EB_GIC_START + 0)          /* Watchdog timer */
+#define IRQ_EB_SOFT             (IRQ_EB_GIC_START + 1)          /* Software interrupt */
+#define IRQ_EB_COMMRx           (IRQ_EB_GIC_START + 2)          /* Debug Comm Rx interrupt */
+#define IRQ_EB_COMMTx           (IRQ_EB_GIC_START + 3)          /* Debug Comm Tx interrupt */
+#define IRQ_EB_TIMER0_1         (IRQ_EB_GIC_START + 4)          /* Timer 0 and 1 */
+#define IRQ_EB_TIMER2_3         (IRQ_EB_GIC_START + 5)          /* Timer 2 and 3 */
+#define IRQ_EB_GPIO0            (IRQ_EB_GIC_START + 6)          /* GPIO 0 */
+#define IRQ_EB_GPIO1            (IRQ_EB_GIC_START + 7)          /* GPIO 1 */
+#define IRQ_EB_GPIO2            (IRQ_EB_GIC_START + 8)          /* GPIO 2 */
+                                                                /* 9 reserved */
+#define IRQ_EB_RTC              (IRQ_EB_GIC_START + 10)         /* Real Time Clock */
+#define IRQ_EB_SSP              (IRQ_EB_GIC_START + 11)         /* Synchronous Serial Port */
+#define IRQ_EB_UART0            (IRQ_EB_GIC_START + 12)         /* UART 0 on development chip */
+#define IRQ_EB_UART1            (IRQ_EB_GIC_START + 13)         /* UART 1 on development chip */
+#define IRQ_EB_UART2            (IRQ_EB_GIC_START + 14)         /* UART 2 on development chip */
+#define IRQ_EB_UART3            (IRQ_EB_GIC_START + 15)         /* UART 3 on development chip */
+#define IRQ_EB_SCI              (IRQ_EB_GIC_START + 16)         /* Smart Card Interface */
+#define IRQ_EB_MMCI0A           (IRQ_EB_GIC_START + 17)         /* Multimedia Card 0A */
+#define IRQ_EB_MMCI0B           (IRQ_EB_GIC_START + 18)         /* Multimedia Card 0B */
+#define IRQ_EB_AACI             (IRQ_EB_GIC_START + 19)         /* Audio Codec */
+#define IRQ_EB_KMI0             (IRQ_EB_GIC_START + 20)         /* Keyboard/Mouse port 0 */
+#define IRQ_EB_KMI1             (IRQ_EB_GIC_START + 21)         /* Keyboard/Mouse port 1 */
+#define IRQ_EB_CHARLCD          (IRQ_EB_GIC_START + 22)         /* Character LCD */
+#define IRQ_EB_CLCD             (IRQ_EB_GIC_START + 23)         /* CLCD controller */
+#define IRQ_EB_DMA              (IRQ_EB_GIC_START + 24)         /* DMA controller */
+#define IRQ_EB_PWRFAIL          (IRQ_EB_GIC_START + 25)         /* Power failure */
+#define IRQ_EB_PISMO            (IRQ_EB_GIC_START + 26)         /* PISMO interface */
+#define IRQ_EB_DoC              (IRQ_EB_GIC_START + 27)         /* Disk on Chip memory controller */
+#define IRQ_EB_ETH              (IRQ_EB_GIC_START + 28)         /* Ethernet controller */
+#define IRQ_EB_USB              (IRQ_EB_GIC_START + 29)         /* USB controller */
+#define IRQ_EB_TSPEN            (IRQ_EB_GIC_START + 30)         /* Touchscreen pen */
+#define IRQ_EB_TSKPAD           (IRQ_EB_GIC_START + 31)         /* Touchscreen keypad */
+/*
+ * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
+ */
+#define IRQ_EB11MP_AACI         (IRQ_EB_GIC_START + 0)
+#define IRQ_EB11MP_TIMER0_1     (IRQ_EB_GIC_START + 1)
+#define IRQ_EB11MP_TIMER2_3     (IRQ_EB_GIC_START + 2)
+#define IRQ_EB11MP_USB          (IRQ_EB_GIC_START + 3)
+#define IRQ_EB11MP_UART0        (IRQ_EB_GIC_START + 4)
+#define IRQ_EB11MP_UART1        (IRQ_EB_GIC_START + 5)
+#define IRQ_EB11MP_RTC          (IRQ_EB_GIC_START + 6)
+#define IRQ_EB11MP_KMI0         (IRQ_EB_GIC_START + 7)
+#define IRQ_EB11MP_KMI1         (IRQ_EB_GIC_START + 8)
+#define IRQ_EB11MP_ETH          (IRQ_EB_GIC_START + 9)
+#define IRQ_EB11MP_EB_IRQ1      (IRQ_EB_GIC_START + 10)         /* main GIC */
+#define IRQ_EB11MP_EB_IRQ2      (IRQ_EB_GIC_START + 11)         /* tile GIC */
+#define IRQ_EB11MP_EB_FIQ1      (IRQ_EB_GIC_START + 12)         /* main GIC */
+#define IRQ_EB11MP_EB_FIQ2      (IRQ_EB_GIC_START + 13)         /* tile GIC */
+#define IRQ_EB11MP_MMCI0A       (IRQ_EB_GIC_START + 14)
+#define IRQ_EB11MP_MMCI0B       (IRQ_EB_GIC_START + 15)
+#define IRQ_EB11MP_PMU_CPU0     (IRQ_EB_GIC_START + 17)
+#define IRQ_EB11MP_PMU_CPU1     (IRQ_EB_GIC_START + 18)
+#define IRQ_EB11MP_PMU_CPU2     (IRQ_EB_GIC_START + 19)
+#define IRQ_EB11MP_PMU_CPU3     (IRQ_EB_GIC_START + 20)
+#define IRQ_EB11MP_PMU_SCU0     (IRQ_EB_GIC_START + 21)
+#define IRQ_EB11MP_PMU_SCU1     (IRQ_EB_GIC_START + 22)
+#define IRQ_EB11MP_PMU_SCU2     (IRQ_EB_GIC_START + 23)
+#define IRQ_EB11MP_PMU_SCU3     (IRQ_EB_GIC_START + 24)
+#define IRQ_EB11MP_PMU_SCU4     (IRQ_EB_GIC_START + 25)
+#define IRQ_EB11MP_PMU_SCU5     (IRQ_EB_GIC_START + 26)
+#define IRQ_EB11MP_PMU_SCU6     (IRQ_EB_GIC_START + 27)
+#define IRQ_EB11MP_PMU_SCU7     (IRQ_EB_GIC_START + 28)
+#define IRQ_EB11MP_L220_EVENT   (IRQ_EB_GIC_START + 29)
+#define IRQ_EB11MP_L220_SLAVE   (IRQ_EB_GIC_START + 30)
+#define IRQ_EB11MP_L220_DECODE  (IRQ_EB_GIC_START + 31)
+#define IRQ_EB11MP_UART2        -1
+#define IRQ_EB11MP_UART3        -1
+#define IRQ_EB11MP_CLCD         -1
+#define IRQ_EB11MP_DMA          -1
+#define IRQ_EB11MP_WDOG         -1
+#define IRQ_EB11MP_GPIO0        -1
+#define IRQ_EB11MP_GPIO1        -1
+#define IRQ_EB11MP_GPIO2        -1
+#define IRQ_EB11MP_SCI          -1
+#define IRQ_EB11MP_SSP          -1
+#define NR_GIC_EB11MP           2
+/*
+ * Only define NR_IRQS if less than NR_IRQS_EB
+ */
+#define NR_IRQS_EB              (IRQ_EB_GIC_START + 96)
+#if defined(CONFIG_MACH_REALVIEW_EB) \
+        && (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
+#undef NR_IRQS
+#define NR_IRQS                 NR_IRQS_EB
+#endif
+#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
+        && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
+#undef MAX_GIC_NR
+#define MAX_GIC_NR              NR_GIC_EB11MP
+#endif
+#endif  /* __MACH_IRQS_EB_H */

diff --git a/arch/arm/mach-realview/include/mach/irqs-eb.h b/arch/arm/mach-realview/include/mach/irqs-eb.h new file mode 100644 index 000000000000..204d5378f309 --- /dev/null +++ b/arch/arm/mach-realview/include/mach/irqs-eb.h
@@ -0,0 +1,129 @@
	1	/*
	2	* arch/arm/mach-realview/include/mach/irqs-eb.h
	3	*
	4	* Copyright (C) 2007 ARM Limited
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	18	* MA 02110-1301, USA.
	19	*/
	20
	21	#ifndef __MACH_IRQS_EB_H
	22	#define __MACH_IRQS_EB_H
	23
	24	#define IRQ_EB_GIC_START 32
	25
	26	/*
	27	* RealView EB interrupt sources
	28	*/
	29	#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
	30	#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
	31	#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
	32	#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
	33	#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
	34	#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
	35	#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
	36	#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
	37	#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
	38	/* 9 reserved */
	39	#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
	40	#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
	41	#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
	42	#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
	43	#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
	44	#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
	45	#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
	46	#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
	47	#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
	48	#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
	49	#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
	50	#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
	51	#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
	52	#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
	53	#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
	54	#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
	55	#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
	56	#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
	57	#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
	58	#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
	59	#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
	60	#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
	61
	62	/*
	63	* RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
	64	*/
	65	#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
	66	#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
	67	#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
	68	#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
	69	#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
	70	#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
	71	#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
	72	#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
	73	#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
	74	#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
	75	#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
	76	#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
	77	#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
	78	#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
	79	#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
	80	#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
	81
	82	#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
	83	#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
	84	#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
	85	#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
	86	#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
	87	#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
	88	#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
	89	#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
	90	#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
	91	#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
	92	#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
	93	#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
	94
	95	#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
	96	#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
	97	#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
	98
	99	#define IRQ_EB11MP_UART2 -1
	100	#define IRQ_EB11MP_UART3 -1
	101	#define IRQ_EB11MP_CLCD -1
	102	#define IRQ_EB11MP_DMA -1
	103	#define IRQ_EB11MP_WDOG -1
	104	#define IRQ_EB11MP_GPIO0 -1
	105	#define IRQ_EB11MP_GPIO1 -1
	106	#define IRQ_EB11MP_GPIO2 -1
	107	#define IRQ_EB11MP_SCI -1
	108	#define IRQ_EB11MP_SSP -1
	109
	110	#define NR_GIC_EB11MP 2
	111
	112	/*
	113	* Only define NR_IRQS if less than NR_IRQS_EB
	114	*/
	115	#define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
	116
	117	#if defined(CONFIG_MACH_REALVIEW_EB) \
	118	&& (!defined(NR_IRQS) \|\| (NR_IRQS < NR_IRQS_EB))
	119	#undef NR_IRQS
	120	#define NR_IRQS NR_IRQS_EB
	121	#endif
	122
	123	#if defined(CONFIG_REALVIEW_EB_ARM11MP) \|\| defined(CONFIG_REALVIEW_EB_A9MP) \
	124	&& (!defined(MAX_GIC_NR) \|\| (MAX_GIC_NR < NR_GIC_EB11MP))
	125	#undef MAX_GIC_NR
	126	#define MAX_GIC_NR NR_GIC_EB11MP
	127	#endif
	128
	129	#endif /* __MACH_IRQS_EB_H */