diff options
Diffstat (limited to 'arch/arm/mach-realview/include/mach/board-pb11mp.h')
-rw-r--r-- | arch/arm/mach-realview/include/mach/board-pb11mp.h | 101 |
1 files changed, 0 insertions, 101 deletions
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h index 53ea0e7a1267..f0d68e0fea01 100644 --- a/arch/arm/mach-realview/include/mach/board-pb11mp.h +++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h | |||
@@ -81,105 +81,4 @@ | |||
81 | #define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ | 81 | #define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ |
82 | #define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ | 82 | #define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ |
83 | 83 | ||
84 | /* | ||
85 | * Irqs | ||
86 | */ | ||
87 | #define IRQ_TC11MP_GIC_START 32 | ||
88 | #define IRQ_PB11MP_GIC_START 64 | ||
89 | |||
90 | /* | ||
91 | * ARM11MPCore test chip interrupt sources (primary GIC on the test chip) | ||
92 | */ | ||
93 | #define IRQ_TC11MP_AACI (IRQ_TC11MP_GIC_START + 0) | ||
94 | #define IRQ_TC11MP_TIMER0_1 (IRQ_TC11MP_GIC_START + 1) | ||
95 | #define IRQ_TC11MP_TIMER2_3 (IRQ_TC11MP_GIC_START + 2) | ||
96 | #define IRQ_TC11MP_USB (IRQ_TC11MP_GIC_START + 3) | ||
97 | #define IRQ_TC11MP_UART0 (IRQ_TC11MP_GIC_START + 4) | ||
98 | #define IRQ_TC11MP_UART1 (IRQ_TC11MP_GIC_START + 5) | ||
99 | #define IRQ_TC11MP_RTC (IRQ_TC11MP_GIC_START + 6) | ||
100 | #define IRQ_TC11MP_KMI0 (IRQ_TC11MP_GIC_START + 7) | ||
101 | #define IRQ_TC11MP_KMI1 (IRQ_TC11MP_GIC_START + 8) | ||
102 | #define IRQ_TC11MP_ETH (IRQ_TC11MP_GIC_START + 9) | ||
103 | #define IRQ_TC11MP_PB_IRQ1 (IRQ_TC11MP_GIC_START + 10) /* main GIC */ | ||
104 | #define IRQ_TC11MP_PB_IRQ2 (IRQ_TC11MP_GIC_START + 11) /* tile GIC */ | ||
105 | #define IRQ_TC11MP_PB_FIQ1 (IRQ_TC11MP_GIC_START + 12) /* main GIC */ | ||
106 | #define IRQ_TC11MP_PB_FIQ2 (IRQ_TC11MP_GIC_START + 13) /* tile GIC */ | ||
107 | #define IRQ_TC11MP_MMCI0A (IRQ_TC11MP_GIC_START + 14) | ||
108 | #define IRQ_TC11MP_MMCI0B (IRQ_TC11MP_GIC_START + 15) | ||
109 | |||
110 | #define IRQ_TC11MP_PMU_CPU0 (IRQ_TC11MP_GIC_START + 17) | ||
111 | #define IRQ_TC11MP_PMU_CPU1 (IRQ_TC11MP_GIC_START + 18) | ||
112 | #define IRQ_TC11MP_PMU_CPU2 (IRQ_TC11MP_GIC_START + 19) | ||
113 | #define IRQ_TC11MP_PMU_CPU3 (IRQ_TC11MP_GIC_START + 20) | ||
114 | #define IRQ_TC11MP_PMU_SCU0 (IRQ_TC11MP_GIC_START + 21) | ||
115 | #define IRQ_TC11MP_PMU_SCU1 (IRQ_TC11MP_GIC_START + 22) | ||
116 | #define IRQ_TC11MP_PMU_SCU2 (IRQ_TC11MP_GIC_START + 23) | ||
117 | #define IRQ_TC11MP_PMU_SCU3 (IRQ_TC11MP_GIC_START + 24) | ||
118 | #define IRQ_TC11MP_PMU_SCU4 (IRQ_TC11MP_GIC_START + 25) | ||
119 | #define IRQ_TC11MP_PMU_SCU5 (IRQ_TC11MP_GIC_START + 26) | ||
120 | #define IRQ_TC11MP_PMU_SCU6 (IRQ_TC11MP_GIC_START + 27) | ||
121 | #define IRQ_TC11MP_PMU_SCU7 (IRQ_TC11MP_GIC_START + 28) | ||
122 | |||
123 | #define IRQ_TC11MP_L220_EVENT (IRQ_TC11MP_GIC_START + 29) | ||
124 | #define IRQ_TC11MP_L220_SLAVE (IRQ_TC11MP_GIC_START + 30) | ||
125 | #define IRQ_TC11MP_L220_DECODE (IRQ_TC11MP_GIC_START + 31) | ||
126 | |||
127 | /* | ||
128 | * RealView PB11MPCore GIC interrupt sources (secondary GIC on the board) | ||
129 | */ | ||
130 | #define IRQ_PB11MP_WATCHDOG (IRQ_PB11MP_GIC_START + 0) /* Watchdog timer */ | ||
131 | #define IRQ_PB11MP_SOFT (IRQ_PB11MP_GIC_START + 1) /* Software interrupt */ | ||
132 | #define IRQ_PB11MP_COMMRx (IRQ_PB11MP_GIC_START + 2) /* Debug Comm Rx interrupt */ | ||
133 | #define IRQ_PB11MP_COMMTx (IRQ_PB11MP_GIC_START + 3) /* Debug Comm Tx interrupt */ | ||
134 | #define IRQ_PB11MP_GPIO0 (IRQ_PB11MP_GIC_START + 6) /* GPIO 0 */ | ||
135 | #define IRQ_PB11MP_GPIO1 (IRQ_PB11MP_GIC_START + 7) /* GPIO 1 */ | ||
136 | #define IRQ_PB11MP_GPIO2 (IRQ_PB11MP_GIC_START + 8) /* GPIO 2 */ | ||
137 | /* 9 reserved */ | ||
138 | #define IRQ_PB11MP_RTC_GIC1 (IRQ_PB11MP_GIC_START + 10) /* Real Time Clock */ | ||
139 | #define IRQ_PB11MP_SSP (IRQ_PB11MP_GIC_START + 11) /* Synchronous Serial Port */ | ||
140 | #define IRQ_PB11MP_UART0_GIC1 (IRQ_PB11MP_GIC_START + 12) /* UART 0 on development chip */ | ||
141 | #define IRQ_PB11MP_UART1_GIC1 (IRQ_PB11MP_GIC_START + 13) /* UART 1 on development chip */ | ||
142 | #define IRQ_PB11MP_UART2 (IRQ_PB11MP_GIC_START + 14) /* UART 2 on development chip */ | ||
143 | #define IRQ_PB11MP_UART3 (IRQ_PB11MP_GIC_START + 15) /* UART 3 on development chip */ | ||
144 | #define IRQ_PB11MP_SCI (IRQ_PB11MP_GIC_START + 16) /* Smart Card Interface */ | ||
145 | #define IRQ_PB11MP_MMCI0A_GIC1 (IRQ_PB11MP_GIC_START + 17) /* Multimedia Card 0A */ | ||
146 | #define IRQ_PB11MP_MMCI0B_GIC1 (IRQ_PB11MP_GIC_START + 18) /* Multimedia Card 0B */ | ||
147 | #define IRQ_PB11MP_AACI_GIC1 (IRQ_PB11MP_GIC_START + 19) /* Audio Codec */ | ||
148 | #define IRQ_PB11MP_KMI0_GIC1 (IRQ_PB11MP_GIC_START + 20) /* Keyboard/Mouse port 0 */ | ||
149 | #define IRQ_PB11MP_KMI1_GIC1 (IRQ_PB11MP_GIC_START + 21) /* Keyboard/Mouse port 1 */ | ||
150 | #define IRQ_PB11MP_CHARLCD (IRQ_PB11MP_GIC_START + 22) /* Character LCD */ | ||
151 | #define IRQ_PB11MP_CLCD (IRQ_PB11MP_GIC_START + 23) /* CLCD controller */ | ||
152 | #define IRQ_PB11MP_DMAC (IRQ_PB11MP_GIC_START + 24) /* DMA controller */ | ||
153 | #define IRQ_PB11MP_PWRFAIL (IRQ_PB11MP_GIC_START + 25) /* Power failure */ | ||
154 | #define IRQ_PB11MP_PISMO (IRQ_PB11MP_GIC_START + 26) /* PISMO interface */ | ||
155 | #define IRQ_PB11MP_DoC (IRQ_PB11MP_GIC_START + 27) /* Disk on Chip memory controller */ | ||
156 | #define IRQ_PB11MP_ETH_GIC1 (IRQ_PB11MP_GIC_START + 28) /* Ethernet controller */ | ||
157 | #define IRQ_PB11MP_USB_GIC1 (IRQ_PB11MP_GIC_START + 29) /* USB controller */ | ||
158 | #define IRQ_PB11MP_TSPEN (IRQ_PB11MP_GIC_START + 30) /* Touchscreen pen */ | ||
159 | #define IRQ_PB11MP_TSKPAD (IRQ_PB11MP_GIC_START + 31) /* Touchscreen keypad */ | ||
160 | |||
161 | #define IRQ_PB11MP_SMC -1 | ||
162 | #define IRQ_PB11MP_SCTL -1 | ||
163 | |||
164 | #define NR_GIC_PB11MP 2 | ||
165 | |||
166 | /* | ||
167 | * Only define NR_IRQS if less than NR_IRQS_PB11MP | ||
168 | */ | ||
169 | #define NR_IRQS_PB11MP (IRQ_TC11MP_GIC_START + 96) | ||
170 | |||
171 | #if defined(CONFIG_MACH_REALVIEW_PB11MP) | ||
172 | |||
173 | #if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB11MP) | ||
174 | #undef NR_IRQS | ||
175 | #define NR_IRQS NR_IRQS_PB11MP | ||
176 | #endif | ||
177 | |||
178 | #if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB11MP) | ||
179 | #undef MAX_GIC_NR | ||
180 | #define MAX_GIC_NR NR_GIC_PB11MP | ||
181 | #endif | ||
182 | |||
183 | #endif /* CONFIG_MACH_REALVIEW_PB11MP */ | ||
184 | |||
185 | #endif /* __ASM_ARCH_BOARD_PB11MP_H */ | 84 | #endif /* __ASM_ARCH_BOARD_PB11MP_H */ |