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Diffstat (limited to 'arch/arm/mach-realview/include/mach/board-eb.h')
-rw-r--r--arch/arm/mach-realview/include/mach/board-eb.h105
1 files changed, 0 insertions, 105 deletions
diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h
index 268d7701fa9b..794a8d91a6a6 100644
--- a/arch/arm/mach-realview/include/mach/board-eb.h
+++ b/arch/arm/mach-realview/include/mach/board-eb.h
@@ -62,111 +62,6 @@
62#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ 62#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
63#endif 63#endif
64 64
65#define IRQ_EB_GIC_START 32
66
67/*
68 * RealView EB interrupt sources
69 */
70#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
71#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
72#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
73#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
74#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
75#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
76#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
77#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
78#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
79 /* 9 reserved */
80#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
81#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
82#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
83#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
84#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
85#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
86#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
87#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
88#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
89#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
90#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
91#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
92#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
93#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
94#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
95#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
96#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
97#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
98#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
99#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
100#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
101#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
102
103/*
104 * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
105 */
106#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
107#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
108#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
109#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
110#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
111#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
112#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
113#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
114#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
115#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
116#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
117#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
118#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
119#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
120#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
121#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
122
123#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
124#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
125#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
126#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
127#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
128#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
129#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
130#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
131#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
132#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
133#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
134#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
135
136#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
137#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
138#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
139
140#define IRQ_EB11MP_UART2 -1
141#define IRQ_EB11MP_UART3 -1
142#define IRQ_EB11MP_CLCD -1
143#define IRQ_EB11MP_DMA -1
144#define IRQ_EB11MP_WDOG -1
145#define IRQ_EB11MP_GPIO0 -1
146#define IRQ_EB11MP_GPIO1 -1
147#define IRQ_EB11MP_GPIO2 -1
148#define IRQ_EB11MP_SCI -1
149#define IRQ_EB11MP_SSP -1
150
151#define NR_GIC_EB11MP 2
152
153/*
154 * Only define NR_IRQS if less than NR_IRQS_EB
155 */
156#define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
157
158#if defined(CONFIG_MACH_REALVIEW_EB) \
159 && (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
160#undef NR_IRQS
161#define NR_IRQS NR_IRQS_EB
162#endif
163
164#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
165 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
166#undef MAX_GIC_NR
167#define MAX_GIC_NR NR_GIC_EB11MP
168#endif
169
170/* 65/*
171 * Core tile identification (REALVIEW_SYS_PROCID) 66 * Core tile identification (REALVIEW_SYS_PROCID)
172 */ 67 */