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-rw-r--r--arch/arm/mach-pxa/Kconfig80
-rw-r--r--arch/arm/mach-pxa/Makefile30
-rw-r--r--arch/arm/mach-pxa/akita-ioexp.c222
-rw-r--r--arch/arm/mach-pxa/am200epd.c374
-rw-r--r--arch/arm/mach-pxa/cm-x255.c258
-rw-r--r--arch/arm/mach-pxa/cm-x270-pci.h13
-rw-r--r--arch/arm/mach-pxa/cm-x270.c461
-rw-r--r--arch/arm/mach-pxa/cm-x2xx-pci.c (renamed from arch/arm/mach-pxa/cm-x270-pci.c)56
-rw-r--r--arch/arm/mach-pxa/cm-x2xx-pci.h13
-rw-r--r--arch/arm/mach-pxa/cm-x2xx.c531
-rw-r--r--arch/arm/mach-pxa/cm-x300.c473
-rw-r--r--arch/arm/mach-pxa/colibri.c11
-rw-r--r--arch/arm/mach-pxa/corgi.c478
-rw-r--r--arch/arm/mach-pxa/corgi_lcd.c290
-rw-r--r--arch/arm/mach-pxa/corgi_pm.c1
-rw-r--r--arch/arm/mach-pxa/corgi_ssp.c276
-rw-r--r--arch/arm/mach-pxa/e330.c43
-rw-r--r--arch/arm/mach-pxa/e350.c43
-rw-r--r--arch/arm/mach-pxa/e400.c94
-rw-r--r--arch/arm/mach-pxa/e400_lcd.c56
-rw-r--r--arch/arm/mach-pxa/e740.c169
-rw-r--r--arch/arm/mach-pxa/e740_lcd.c123
-rw-r--r--arch/arm/mach-pxa/e750.c (renamed from arch/arm/mach-pxa/e750_lcd.c)67
-rw-r--r--arch/arm/mach-pxa/e800.c (renamed from arch/arm/mach-pxa/e800_lcd.c)79
-rw-r--r--arch/arm/mach-pxa/eseries.c157
-rw-r--r--arch/arm/mach-pxa/eseries.h4
-rw-r--r--arch/arm/mach-pxa/eseries_udc.c57
-rw-r--r--arch/arm/mach-pxa/generic.h1
-rw-r--r--arch/arm/mach-pxa/gumstix.c100
-rw-r--r--arch/arm/mach-pxa/idp.c78
-rw-r--r--arch/arm/mach-pxa/include/mach/akita.h32
-rw-r--r--arch/arm/mach-pxa/include/mach/corgi.h11
-rw-r--r--arch/arm/mach-pxa/include/mach/littleton.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/memory.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa25x.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa320.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp.h5
-rw-r--r--arch/arm/mach-pxa/include/mach/mioa701.h67
-rw-r--r--arch/arm/mach-pxa/include/mach/palmz72.h67
-rw-r--r--arch/arm/mach-pxa/include/mach/poodle.h9
-rw-r--r--arch/arm/mach-pxa/include/mach/spitz.h42
-rw-r--r--arch/arm/mach-pxa/include/mach/trizeps4.h84
-rw-r--r--arch/arm/mach-pxa/include/mach/viper.h96
-rw-r--r--arch/arm/mach-pxa/leds-trizeps4.c134
-rw-r--r--arch/arm/mach-pxa/leds.c2
-rw-r--r--arch/arm/mach-pxa/littleton.c205
-rw-r--r--arch/arm/mach-pxa/lpd270.c84
-rw-r--r--arch/arm/mach-pxa/lubbock.c23
-rw-r--r--arch/arm/mach-pxa/magician.c2
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c222
-rw-r--r--arch/arm/mach-pxa/mioa701.c905
-rw-r--r--arch/arm/mach-pxa/mioa701_bootresume.S36
-rw-r--r--arch/arm/mach-pxa/mp900.c100
-rw-r--r--arch/arm/mach-pxa/palmtx.c20
-rw-r--r--arch/arm/mach-pxa/palmz72.c480
-rw-r--r--arch/arm/mach-pxa/pcm027.c32
-rw-r--r--arch/arm/mach-pxa/poodle.c355
-rw-r--r--arch/arm/mach-pxa/pxa25x.c28
-rw-r--r--arch/arm/mach-pxa/pxa27x.c37
-rw-r--r--arch/arm/mach-pxa/sharpsl_pm.c16
-rw-r--r--arch/arm/mach-pxa/spitz.c527
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c28
-rw-r--r--arch/arm/mach-pxa/trizeps4.c549
-rw-r--r--arch/arm/mach-pxa/viper.c951
-rw-r--r--arch/arm/mach-pxa/zylonite_pxa300.c8
-rw-r--r--arch/arm/mach-pxa/zylonite_pxa320.c6
66 files changed, 6638 insertions, 3181 deletions
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index b0417122d4e4..f781873431f3 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -52,6 +52,10 @@ config MACH_MAINSTONE
52 select HAVE_PWM 52 select HAVE_PWM
53 select PXA_HAVE_BOARD_IRQS 53 select PXA_HAVE_BOARD_IRQS
54 54
55config MACH_MP900C
56 bool "Nec Mobilepro 900/c"
57 select PXA25x
58
55config ARCH_PXA_IDP 59config ARCH_PXA_IDP
56 bool "Accelent Xscale IDP" 60 bool "Accelent Xscale IDP"
57 select PXA25x 61 select PXA25x
@@ -119,6 +123,15 @@ config MACH_TOSA
119 select PXA25x 123 select PXA25x
120 select PXA_HAVE_BOARD_IRQS 124 select PXA_HAVE_BOARD_IRQS
121 125
126config ARCH_VIPER
127 bool "Arcom/Eurotech VIPER SBC"
128 select PXA25x
129 select ISA
130 select I2C_GPIO
131 select HAVE_PWM
132 select PXA_HAVE_BOARD_IRQS
133 select PXA_HAVE_ISA_IRQS
134
122config ARCH_PXA_ESERIES 135config ARCH_PXA_ESERIES
123 bool "PXA based Toshiba e-series PDAs" 136 bool "PXA based Toshiba e-series PDAs"
124 select PXA25x 137 select PXA25x
@@ -175,13 +188,41 @@ config MACH_E800
175 Say Y here if you intend to run this kernel on a Toshiba 188 Say Y here if you intend to run this kernel on a Toshiba
176 e800 family PDA. 189 e800 family PDA.
177 190
191config TRIZEPS_PXA
192 bool "PXA based Keith und Koep Trizeps DIMM-Modules"
193
178config MACH_TRIZEPS4 194config MACH_TRIZEPS4
179 bool "Keith und Koep Trizeps4 DIMM-Module" 195 bool "Keith und Koep Trizeps4 DIMM-Module"
196 depends on TRIZEPS_PXA
197 select TRIZEPS_PCMCIA
180 select PXA27x 198 select PXA27x
181 199
182config MACH_TRIZEPS4_CONXS 200config MACH_TRIZEPS4WL
201 bool "Keith und Koep Trizeps4-WL DIMM-Module"
202 depends on TRIZEPS_PXA
203 select TRIZEPS_PCMCIA
204 select PXA27x
205 select PXA_SSP
206
207choice
208 prompt "Select base board for Trizeps module"
209 depends on TRIZEPS_PXA
210
211config MACH_TRIZEPS_CONXS
183 bool "ConXS Eval Board" 212 bool "ConXS Eval Board"
184 depends on MACH_TRIZEPS4 213
214config MACH_TRIZEPS_UCONXS
215 bool "uConXS Eval Board"
216
217config MACH_TRIZEPS_ANY
218 bool "another Board"
219
220endchoice
221
222config TRIZEPS_PCMCIA
223 bool
224 help
225 Enable PCMCIA support for Trizeps modules
185 226
186config MACH_EM_X270 227config MACH_EM_X270
187 bool "CompuLab EM-x270 platform" 228 bool "CompuLab EM-x270 platform"
@@ -194,6 +235,7 @@ config MACH_COLIBRI
194config MACH_ZYLONITE 235config MACH_ZYLONITE
195 bool "PXA3xx Development Platform (aka Zylonite)" 236 bool "PXA3xx Development Platform (aka Zylonite)"
196 select PXA3xx 237 select PXA3xx
238 select PXA_SSP
197 select HAVE_PWM 239 select HAVE_PWM
198 240
199config MACH_LITTLETON 241config MACH_LITTLETON
@@ -212,9 +254,16 @@ config MACH_SAAR
212 select PXA930 254 select PXA930
213 255
214config MACH_ARMCORE 256config MACH_ARMCORE
215 bool "CompuLab CM-X270 modules" 257 bool "CompuLab CM-X255/CM-X270 modules"
216 select PXA27x 258 select PXA27x
217 select IWMMXT 259 select IWMMXT
260 select PXA25x
261 select PXA_SSP
262
263config MACH_CM_X300
264 bool "CompuLab CM-X300 modules"
265 select PXA3xx
266 select CPU_PXA300
218 267
219config MACH_MAGICIAN 268config MACH_MAGICIAN
220 bool "Enable HTC Magician Support" 269 bool "Enable HTC Magician Support"
@@ -222,6 +271,18 @@ config MACH_MAGICIAN
222 select IWMMXT 271 select IWMMXT
223 select PXA_HAVE_BOARD_IRQS 272 select PXA_HAVE_BOARD_IRQS
224 273
274config MACH_MIOA701
275 bool "Mitac Mio A701 Support"
276 select PXA27x
277 select IWMMXT
278 select LEDS_GPIO
279 select HAVE_PWM
280 select GPIO_SYSFS
281 help
282 Say Y here if you intend to run this kernel on a
283 MIO A701. Currently there is only basic support
284 for this PDA.
285
225config MACH_PCM027 286config MACH_PCM027
226 bool "Phytec phyCORE-PXA270 CPU module (PCM-027)" 287 bool "Phytec phyCORE-PXA270 CPU module (PCM-027)"
227 select PXA27x 288 select PXA27x
@@ -243,6 +304,16 @@ config MACH_PALMTX
243 Say Y here if you intend to run this kernel on a Palm T|X 304 Say Y here if you intend to run this kernel on a Palm T|X
244 handheld computer. 305 handheld computer.
245 306
307config MACH_PALMZ72
308 bool "Palm Zire 72"
309 default y
310 depends on ARCH_PXA_PALM
311 select PXA27x
312 select IWMMXT
313 help
314 Say Y here if you intend to run this kernel on Palm Zire 72
315 handheld computer.
316
246config MACH_PCM990_BASEBOARD 317config MACH_PCM990_BASEBOARD
247 bool "PHYTEC PCM-990 development board" 318 bool "PHYTEC PCM-990 development board"
248 select HAVE_PWM 319 select HAVE_PWM
@@ -263,6 +334,9 @@ config PCM990_DISPLAY_NONE
263 334
264endchoice 335endchoice
265 336
337config MACH_AM200EPD
338 depends on MACH_GUMSTIX_F
339 bool "Enable AM200EPD board support"
266 340
267config PXA_EZX 341config PXA_EZX
268 bool "Motorola EZX Platform" 342 bool "Motorola EZX Platform"
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 99ecbe7f8506..3d2dea4afb87 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -22,27 +22,33 @@ obj-$(CONFIG_CPU_PXA930) += pxa930.o
22 22
23# Specific board support 23# Specific board support
24obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o 24obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o
25obj-$(CONFIG_MACH_AM200EPD) += am200epd.o
25obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o 26obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
26obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o 27obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
27obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o 28obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
29obj-$(CONFIG_MACH_MP900C) += mp900.o
28obj-$(CONFIG_ARCH_PXA_IDP) += idp.o 30obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
29obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o 31obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o
30obj-$(CONFIG_MACH_COLIBRI) += colibri.o 32obj-$(CONFIG_MACH_COLIBRI) += colibri.o
31obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o 33obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o
32obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o 34obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o
33obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o 35obj-$(CONFIG_MACH_POODLE) += poodle.o
34obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o
35obj-$(CONFIG_MACH_PCM027) += pcm027.o 36obj-$(CONFIG_MACH_PCM027) += pcm027.o
36obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o 37obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o
37obj-$(CONFIG_MACH_TOSA) += tosa.o 38obj-$(CONFIG_MACH_TOSA) += tosa.o
38obj-$(CONFIG_MACH_EM_X270) += em-x270.o 39obj-$(CONFIG_MACH_EM_X270) += em-x270.o
39obj-$(CONFIG_MACH_MAGICIAN) += magician.o 40obj-$(CONFIG_MACH_MAGICIAN) += magician.o
40obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o eseries_udc.o 41obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o
41obj-$(CONFIG_MACH_E740) += e740_lcd.o 42obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o
42obj-$(CONFIG_MACH_E750) += e750_lcd.o 43obj-$(CONFIG_MACH_E330) += e330.o
43obj-$(CONFIG_MACH_E400) += e400_lcd.o 44obj-$(CONFIG_MACH_E350) += e350.o
44obj-$(CONFIG_MACH_E800) += e800_lcd.o 45obj-$(CONFIG_MACH_E740) += e740.o
46obj-$(CONFIG_MACH_E750) += e750.o
47obj-$(CONFIG_MACH_E400) += e400.o
48obj-$(CONFIG_MACH_E800) += e800.o
45obj-$(CONFIG_MACH_PALMTX) += palmtx.o 49obj-$(CONFIG_MACH_PALMTX) += palmtx.o
50obj-$(CONFIG_MACH_PALMZ72) += palmz72.o
51obj-$(CONFIG_ARCH_VIPER) += viper.o
46 52
47ifeq ($(CONFIG_MACH_ZYLONITE),y) 53ifeq ($(CONFIG_MACH_ZYLONITE),y)
48 obj-y += zylonite.o 54 obj-y += zylonite.o
@@ -53,7 +59,8 @@ obj-$(CONFIG_MACH_LITTLETON) += littleton.o
53obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o 59obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o
54obj-$(CONFIG_MACH_SAAR) += saar.o 60obj-$(CONFIG_MACH_SAAR) += saar.o
55 61
56obj-$(CONFIG_MACH_ARMCORE) += cm-x270.o 62obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx.o cm-x255.o cm-x270.o
63obj-$(CONFIG_MACH_CM_X300) += cm-x300.o
57obj-$(CONFIG_PXA_EZX) += ezx.o 64obj-$(CONFIG_PXA_EZX) += ezx.o
58 65
59# Support for blinky lights 66# Support for blinky lights
@@ -61,12 +68,11 @@ led-y := leds.o
61led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o 68led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o
62led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o 69led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o
63led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o 70led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o
64led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o
65 71
66obj-$(CONFIG_LEDS) += $(led-y) 72obj-$(CONFIG_LEDS) += $(led-y)
67 73
68ifeq ($(CONFIG_PCI),y) 74ifeq ($(CONFIG_PCI),y)
69obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o 75obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx-pci.o
70endif 76endif
71 77
72obj-$(CONFIG_TOSA_BT) += tosa-bt.o 78obj-$(CONFIG_TOSA_BT) += tosa-bt.o
diff --git a/arch/arm/mach-pxa/akita-ioexp.c b/arch/arm/mach-pxa/akita-ioexp.c
deleted file mode 100644
index 5c67b188a3ba..000000000000
--- a/arch/arm/mach-pxa/akita-ioexp.c
+++ /dev/null
@@ -1,222 +0,0 @@
1/*
2 * Support for the Extra GPIOs on the Sharp SL-C1000 (Akita)
3 * (uses a Maxim MAX7310 8 Port IO Expander)
4 *
5 * Copyright 2005 Openedhand Ltd.
6 *
7 * Author: Richard Purdie <richard@openedhand.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/module.h>
19#include <linux/i2c.h>
20#include <linux/slab.h>
21#include <linux/workqueue.h>
22#include <mach/akita.h>
23
24/* MAX7310 Regiser Map */
25#define MAX7310_INPUT 0x00
26#define MAX7310_OUTPUT 0x01
27#define MAX7310_POLINV 0x02
28#define MAX7310_IODIR 0x03 /* 1 = Input, 0 = Output */
29#define MAX7310_TIMEOUT 0x04
30
31/* Addresses to scan */
32static const unsigned short normal_i2c[] = { 0x18, I2C_CLIENT_END };
33
34/* I2C Magic */
35I2C_CLIENT_INSMOD;
36
37static int max7310_write(struct i2c_client *client, int address, int data);
38static struct i2c_client max7310_template;
39static void akita_ioexp_work(struct work_struct *private_);
40
41static struct device *akita_ioexp_device;
42static unsigned char ioexp_output_value = AKITA_IOEXP_IO_OUT;
43DECLARE_WORK(akita_ioexp, akita_ioexp_work);
44
45
46/*
47 * MAX7310 Access
48 */
49static int max7310_config(struct device *dev, int iomode, int polarity)
50{
51 int ret;
52 struct i2c_client *client = to_i2c_client(dev);
53
54 ret = max7310_write(client, MAX7310_POLINV, polarity);
55 if (ret < 0)
56 return ret;
57 ret = max7310_write(client, MAX7310_IODIR, iomode);
58 return ret;
59}
60
61static int max7310_set_ouputs(struct device *dev, int outputs)
62{
63 struct i2c_client *client = to_i2c_client(dev);
64
65 return max7310_write(client, MAX7310_OUTPUT, outputs);
66}
67
68/*
69 * I2C Functions
70 */
71static int max7310_write(struct i2c_client *client, int address, int value)
72{
73 u8 data[2];
74
75 data[0] = address & 0xff;
76 data[1] = value & 0xff;
77
78 if (i2c_master_send(client, data, 2) == 2)
79 return 0;
80 return -1;
81}
82
83static int max7310_detect(struct i2c_adapter *adapter, int address, int kind)
84{
85 struct i2c_client *new_client;
86 int err;
87
88 if (!(new_client = kmalloc(sizeof(struct i2c_client), GFP_KERNEL)))
89 return -ENOMEM;
90
91 max7310_template.adapter = adapter;
92 max7310_template.addr = address;
93
94 memcpy(new_client, &max7310_template, sizeof(struct i2c_client));
95
96 if ((err = i2c_attach_client(new_client))) {
97 kfree(new_client);
98 return err;
99 }
100
101 max7310_config(&new_client->dev, AKITA_IOEXP_IO_DIR, 0);
102 akita_ioexp_device = &new_client->dev;
103 schedule_work(&akita_ioexp);
104
105 return 0;
106}
107
108static int max7310_attach_adapter(struct i2c_adapter *adapter)
109{
110 return i2c_probe(adapter, &addr_data, max7310_detect);
111}
112
113static int max7310_detach_client(struct i2c_client *client)
114{
115 int err;
116
117 akita_ioexp_device = NULL;
118
119 if ((err = i2c_detach_client(client)))
120 return err;
121
122 kfree(client);
123 return 0;
124}
125
126static struct i2c_driver max7310_i2c_driver = {
127 .driver = {
128 .name = "akita-max7310",
129 },
130 .id = I2C_DRIVERID_AKITAIOEXP,
131 .attach_adapter = max7310_attach_adapter,
132 .detach_client = max7310_detach_client,
133};
134
135static struct i2c_client max7310_template = {
136 name: "akita-max7310",
137 driver: &max7310_i2c_driver,
138};
139
140void akita_set_ioexp(struct device *dev, unsigned char bit)
141{
142 ioexp_output_value |= bit;
143
144 if (akita_ioexp_device)
145 schedule_work(&akita_ioexp);
146 return;
147}
148
149void akita_reset_ioexp(struct device *dev, unsigned char bit)
150{
151 ioexp_output_value &= ~bit;
152
153 if (akita_ioexp_device)
154 schedule_work(&akita_ioexp);
155 return;
156}
157
158EXPORT_SYMBOL(akita_set_ioexp);
159EXPORT_SYMBOL(akita_reset_ioexp);
160
161static void akita_ioexp_work(struct work_struct *private_)
162{
163 if (akita_ioexp_device)
164 max7310_set_ouputs(akita_ioexp_device, ioexp_output_value);
165}
166
167
168#ifdef CONFIG_PM
169static int akita_ioexp_suspend(struct platform_device *pdev, pm_message_t state)
170{
171 flush_scheduled_work();
172 return 0;
173}
174
175static int akita_ioexp_resume(struct platform_device *pdev)
176{
177 schedule_work(&akita_ioexp);
178 return 0;
179}
180#else
181#define akita_ioexp_suspend NULL
182#define akita_ioexp_resume NULL
183#endif
184
185static int __init akita_ioexp_probe(struct platform_device *pdev)
186{
187 return i2c_add_driver(&max7310_i2c_driver);
188}
189
190static int akita_ioexp_remove(struct platform_device *pdev)
191{
192 i2c_del_driver(&max7310_i2c_driver);
193 return 0;
194}
195
196static struct platform_driver akita_ioexp_driver = {
197 .probe = akita_ioexp_probe,
198 .remove = akita_ioexp_remove,
199 .suspend = akita_ioexp_suspend,
200 .resume = akita_ioexp_resume,
201 .driver = {
202 .name = "akita-ioexp",
203 },
204};
205
206static int __init akita_ioexp_init(void)
207{
208 return platform_driver_register(&akita_ioexp_driver);
209}
210
211static void __exit akita_ioexp_exit(void)
212{
213 platform_driver_unregister(&akita_ioexp_driver);
214}
215
216MODULE_AUTHOR("Richard Purdie <rpurdie@openedhand.com>");
217MODULE_DESCRIPTION("Akita IO-Expander driver");
218MODULE_LICENSE("GPL");
219
220fs_initcall(akita_ioexp_init);
221module_exit(akita_ioexp_exit);
222
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
new file mode 100644
index 000000000000..b965085a37b9
--- /dev/null
+++ b/arch/arm/mach-pxa/am200epd.c
@@ -0,0 +1,374 @@
1/*
2 * am200epd.c -- Platform device for AM200 EPD kit
3 *
4 * Copyright (C) 2008, Jaya Kumar
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
8 * more details.
9 *
10 * Layout is based on skeletonfb.c by James Simmons and Geert Uytterhoeven.
11 *
12 * This work was made possible by help and equipment support from E-Ink
13 * Corporation. http://support.eink.com/community
14 *
15 * This driver is written to be used with the Metronome display controller.
16 * on the AM200 EPD prototype kit/development kit with an E-Ink 800x600
17 * Vizplex EPD on a Gumstix board using the Lyre interface board.
18 *
19 */
20
21#include <linux/module.h>
22#include <linux/kernel.h>
23#include <linux/errno.h>
24#include <linux/string.h>
25#include <linux/delay.h>
26#include <linux/interrupt.h>
27#include <linux/fb.h>
28#include <linux/init.h>
29#include <linux/platform_device.h>
30#include <linux/irq.h>
31#include <linux/gpio.h>
32
33#include <mach/pxafb.h>
34
35#include <video/metronomefb.h>
36
37static unsigned int panel_type = 6;
38static struct platform_device *am200_device;
39static struct metronome_board am200_board;
40
41static struct pxafb_mode_info am200_fb_mode_9inch7 = {
42 .pixclock = 40000,
43 .xres = 1200,
44 .yres = 842,
45 .bpp = 16,
46 .hsync_len = 2,
47 .left_margin = 2,
48 .right_margin = 2,
49 .vsync_len = 1,
50 .upper_margin = 2,
51 .lower_margin = 25,
52 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
53};
54
55static struct pxafb_mode_info am200_fb_mode_8inch = {
56 .pixclock = 40000,
57 .xres = 1088,
58 .yres = 791,
59 .bpp = 16,
60 .hsync_len = 28,
61 .left_margin = 8,
62 .right_margin = 30,
63 .vsync_len = 8,
64 .upper_margin = 10,
65 .lower_margin = 8,
66 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
67};
68
69static struct pxafb_mode_info am200_fb_mode_6inch = {
70 .pixclock = 40189,
71 .xres = 832,
72 .yres = 622,
73 .bpp = 16,
74 .hsync_len = 28,
75 .left_margin = 34,
76 .right_margin = 34,
77 .vsync_len = 25,
78 .upper_margin = 0,
79 .lower_margin = 2,
80 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
81};
82
83static struct pxafb_mach_info am200_fb_info = {
84 .modes = &am200_fb_mode_6inch,
85 .num_modes = 1,
86 .lcd_conn = LCD_TYPE_COLOR_TFT | LCD_PCLK_EDGE_FALL |
87 LCD_AC_BIAS_FREQ(24),
88};
89
90/* register offsets for gpio control */
91#define LED_GPIO_PIN 51
92#define STDBY_GPIO_PIN 48
93#define RST_GPIO_PIN 49
94#define RDY_GPIO_PIN 32
95#define ERR_GPIO_PIN 17
96#define PCBPWR_GPIO_PIN 16
97static int gpios[] = { LED_GPIO_PIN , STDBY_GPIO_PIN , RST_GPIO_PIN,
98 RDY_GPIO_PIN, ERR_GPIO_PIN, PCBPWR_GPIO_PIN };
99static char *gpio_names[] = { "LED" , "STDBY" , "RST", "RDY", "ERR", "PCBPWR" };
100
101static int am200_init_gpio_regs(struct metronomefb_par *par)
102{
103 int i;
104 int err;
105
106 for (i = 0; i < ARRAY_SIZE(gpios); i++) {
107 err = gpio_request(gpios[i], gpio_names[i]);
108 if (err) {
109 dev_err(&am200_device->dev, "failed requesting "
110 "gpio %s, err=%d\n", gpio_names[i], err);
111 goto err_req_gpio;
112 }
113 }
114
115 gpio_direction_output(LED_GPIO_PIN, 0);
116 gpio_direction_output(STDBY_GPIO_PIN, 0);
117 gpio_direction_output(RST_GPIO_PIN, 0);
118
119 gpio_direction_input(RDY_GPIO_PIN);
120 gpio_direction_input(ERR_GPIO_PIN);
121
122 gpio_direction_output(PCBPWR_GPIO_PIN, 0);
123
124 return 0;
125
126err_req_gpio:
127 while (i > 0)
128 gpio_free(gpios[i--]);
129
130 return err;
131}
132
133static void am200_cleanup(struct metronomefb_par *par)
134{
135 int i;
136
137 free_irq(IRQ_GPIO(RDY_GPIO_PIN), par);
138
139 for (i = 0; i < ARRAY_SIZE(gpios); i++)
140 gpio_free(gpios[i]);
141}
142
143static int am200_share_video_mem(struct fb_info *info)
144{
145 /* rough check if this is our desired fb and not something else */
146 if ((info->var.xres != am200_fb_info.modes->xres)
147 || (info->var.yres != am200_fb_info.modes->yres))
148 return 0;
149
150 /* we've now been notified that we have our new fb */
151 am200_board.metromem = info->screen_base;
152 am200_board.host_fbinfo = info;
153
154 /* try to refcount host drv since we are the consumer after this */
155 if (!try_module_get(info->fbops->owner))
156 return -ENODEV;
157
158 return 0;
159}
160
161static int am200_unshare_video_mem(struct fb_info *info)
162{
163 dev_dbg(&am200_device->dev, "ENTER %s\n", __func__);
164
165 if (info != am200_board.host_fbinfo)
166 return 0;
167
168 module_put(am200_board.host_fbinfo->fbops->owner);
169 return 0;
170}
171
172static int am200_fb_notifier_callback(struct notifier_block *self,
173 unsigned long event, void *data)
174{
175 struct fb_event *evdata = data;
176 struct fb_info *info = evdata->info;
177
178 dev_dbg(&am200_device->dev, "ENTER %s\n", __func__);
179
180 if (event == FB_EVENT_FB_REGISTERED)
181 return am200_share_video_mem(info);
182 else if (event == FB_EVENT_FB_UNREGISTERED)
183 return am200_unshare_video_mem(info);
184
185 return 0;
186}
187
188static struct notifier_block am200_fb_notif = {
189 .notifier_call = am200_fb_notifier_callback,
190};
191
192/* this gets called as part of our init. these steps must be done now so
193 * that we can use set_pxa_fb_info */
194static void __init am200_presetup_fb(void)
195{
196 int fw;
197 int fh;
198 int padding_size;
199 int totalsize;
200
201 switch (panel_type) {
202 case 6:
203 am200_fb_info.modes = &am200_fb_mode_6inch;
204 break;
205 case 8:
206 am200_fb_info.modes = &am200_fb_mode_8inch;
207 break;
208 case 97:
209 am200_fb_info.modes = &am200_fb_mode_9inch7;
210 break;
211 default:
212 dev_err(&am200_device->dev, "invalid panel_type selection,"
213 " setting to 6\n");
214 am200_fb_info.modes = &am200_fb_mode_6inch;
215 break;
216 }
217
218 /* the frame buffer is divided as follows:
219 command | CRC | padding
220 16kb waveform data | CRC | padding
221 image data | CRC
222 */
223
224 fw = am200_fb_info.modes->xres;
225 fh = am200_fb_info.modes->yres;
226
227 /* waveform must be 16k + 2 for checksum */
228 am200_board.wfm_size = roundup(16*1024 + 2, fw);
229
230 padding_size = PAGE_SIZE + (4 * fw);
231
232 /* total is 1 cmd , 1 wfm, padding and image */
233 totalsize = fw + am200_board.wfm_size + padding_size + (fw*fh);
234
235 /* save this off because we're manipulating fw after this and
236 * we'll need it when we're ready to setup the framebuffer */
237 am200_board.fw = fw;
238 am200_board.fh = fh;
239
240 /* the reason we do this adjustment is because we want to acquire
241 * more framebuffer memory without imposing custom awareness on the
242 * underlying pxafb driver */
243 am200_fb_info.modes->yres = DIV_ROUND_UP(totalsize, fw);
244
245 /* we divide since we told the LCD controller we're 16bpp */
246 am200_fb_info.modes->xres /= 2;
247
248 set_pxa_fb_info(&am200_fb_info);
249
250}
251
252/* this gets called by metronomefb as part of its init, in our case, we
253 * have already completed initial framebuffer init in presetup_fb so we
254 * can just setup the fb access pointers */
255static int am200_setup_fb(struct metronomefb_par *par)
256{
257 int fw;
258 int fh;
259
260 fw = am200_board.fw;
261 fh = am200_board.fh;
262
263 /* metromem was set up by the notifier in share_video_mem so now
264 * we can use its value to calculate the other entries */
265 par->metromem_cmd = (struct metromem_cmd *) am200_board.metromem;
266 par->metromem_wfm = am200_board.metromem + fw;
267 par->metromem_img = par->metromem_wfm + am200_board.wfm_size;
268 par->metromem_img_csum = (u16 *) (par->metromem_img + (fw * fh));
269 par->metromem_dma = am200_board.host_fbinfo->fix.smem_start;
270
271 return 0;
272}
273
274static int am200_get_panel_type(void)
275{
276 return panel_type;
277}
278
279static irqreturn_t am200_handle_irq(int irq, void *dev_id)
280{
281 struct metronomefb_par *par = dev_id;
282
283 wake_up_interruptible(&par->waitq);
284 return IRQ_HANDLED;
285}
286
287static int am200_setup_irq(struct fb_info *info)
288{
289 int ret;
290
291 ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am200_handle_irq,
292 IRQF_DISABLED|IRQF_TRIGGER_FALLING,
293 "AM200", info->par);
294 if (ret)
295 dev_err(&am200_device->dev, "request_irq failed: %d\n", ret);
296
297 return ret;
298}
299
300static void am200_set_rst(struct metronomefb_par *par, int state)
301{
302 gpio_set_value(RST_GPIO_PIN, state);
303}
304
305static void am200_set_stdby(struct metronomefb_par *par, int state)
306{
307 gpio_set_value(STDBY_GPIO_PIN, state);
308}
309
310static int am200_wait_event(struct metronomefb_par *par)
311{
312 return wait_event_timeout(par->waitq, gpio_get_value(RDY_GPIO_PIN), HZ);
313}
314
315static int am200_wait_event_intr(struct metronomefb_par *par)
316{
317 return wait_event_interruptible_timeout(par->waitq,
318 gpio_get_value(RDY_GPIO_PIN), HZ);
319}
320
321static struct metronome_board am200_board = {
322 .owner = THIS_MODULE,
323 .setup_irq = am200_setup_irq,
324 .setup_io = am200_init_gpio_regs,
325 .setup_fb = am200_setup_fb,
326 .set_rst = am200_set_rst,
327 .set_stdby = am200_set_stdby,
328 .met_wait_event = am200_wait_event,
329 .met_wait_event_intr = am200_wait_event_intr,
330 .get_panel_type = am200_get_panel_type,
331 .cleanup = am200_cleanup,
332};
333
334static int __init am200_init(void)
335{
336 int ret;
337
338 /* before anything else, we request notification for any fb
339 * creation events */
340 fb_register_client(&am200_fb_notif);
341
342 /* request our platform independent driver */
343 request_module("metronomefb");
344
345 am200_device = platform_device_alloc("metronomefb", -1);
346 if (!am200_device)
347 return -ENOMEM;
348
349 /* the am200_board that will be seen by metronomefb is a copy */
350 platform_device_add_data(am200_device, &am200_board,
351 sizeof(am200_board));
352
353 /* this _add binds metronomefb to am200. metronomefb refcounts am200 */
354 ret = platform_device_add(am200_device);
355
356 if (ret) {
357 platform_device_put(am200_device);
358 fb_unregister_client(&am200_fb_notif);
359 return ret;
360 }
361
362 am200_presetup_fb();
363
364 return 0;
365}
366
367module_param(panel_type, uint, 0);
368MODULE_PARM_DESC(panel_type, "Select the panel type: 6, 8, 97");
369
370module_init(am200_init);
371
372MODULE_DESCRIPTION("board driver for am200 metronome epd kit");
373MODULE_AUTHOR("Jaya Kumar");
374MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c
new file mode 100644
index 000000000000..83a4cdf08176
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x255.c
@@ -0,0 +1,258 @@
1/*
2 * linux/arch/arm/mach-pxa/cm-x255.c
3 *
4 * Copyright (C) 2007, 2008 CompuLab, Ltd.
5 * Mike Rapoport <mike@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/platform_device.h>
13#include <linux/irq.h>
14#include <linux/gpio.h>
15#include <linux/mtd/partitions.h>
16#include <linux/mtd/physmap.h>
17#include <linux/mtd/nand-gpio.h>
18
19#include <linux/spi/spi.h>
20
21#include <asm/mach/arch.h>
22#include <asm/mach-types.h>
23#include <asm/mach/map.h>
24
25#include <mach/pxa2xx-regs.h>
26#include <mach/mfp-pxa25x.h>
27#include <mach/pxa2xx_spi.h>
28#include <mach/bitfield.h>
29
30#include "generic.h"
31
32#define GPIO_NAND_CS (5)
33#define GPIO_NAND_ALE (4)
34#define GPIO_NAND_CLE (3)
35#define GPIO_NAND_RB (10)
36
37static unsigned long cmx255_pin_config[] = {
38 /* AC'97 */
39 GPIO28_AC97_BITCLK,
40 GPIO29_AC97_SDATA_IN_0,
41 GPIO30_AC97_SDATA_OUT,
42 GPIO31_AC97_SYNC,
43
44 /* BTUART */
45 GPIO42_BTUART_RXD,
46 GPIO43_BTUART_TXD,
47 GPIO44_BTUART_CTS,
48 GPIO45_BTUART_RTS,
49
50 /* STUART */
51 GPIO46_STUART_RXD,
52 GPIO47_STUART_TXD,
53
54 /* LCD */
55 GPIO58_LCD_LDD_0,
56 GPIO59_LCD_LDD_1,
57 GPIO60_LCD_LDD_2,
58 GPIO61_LCD_LDD_3,
59 GPIO62_LCD_LDD_4,
60 GPIO63_LCD_LDD_5,
61 GPIO64_LCD_LDD_6,
62 GPIO65_LCD_LDD_7,
63 GPIO66_LCD_LDD_8,
64 GPIO67_LCD_LDD_9,
65 GPIO68_LCD_LDD_10,
66 GPIO69_LCD_LDD_11,
67 GPIO70_LCD_LDD_12,
68 GPIO71_LCD_LDD_13,
69 GPIO72_LCD_LDD_14,
70 GPIO73_LCD_LDD_15,
71 GPIO74_LCD_FCLK,
72 GPIO75_LCD_LCLK,
73 GPIO76_LCD_PCLK,
74 GPIO77_LCD_BIAS,
75
76 /* SSP1 */
77 GPIO23_SSP1_SCLK,
78 GPIO24_SSP1_SFRM,
79 GPIO25_SSP1_TXD,
80 GPIO26_SSP1_RXD,
81
82 /* SSP2 */
83 GPIO81_SSP2_CLK_OUT,
84 GPIO82_SSP2_FRM_OUT,
85 GPIO83_SSP2_TXD,
86 GPIO84_SSP2_RXD,
87
88 /* PC Card */
89 GPIO48_nPOE,
90 GPIO49_nPWE,
91 GPIO50_nPIOR,
92 GPIO51_nPIOW,
93 GPIO52_nPCE_1,
94 GPIO53_nPCE_2,
95 GPIO54_nPSKTSEL,
96 GPIO55_nPREG,
97 GPIO56_nPWAIT,
98 GPIO57_nIOIS16,
99
100 /* SDRAM and local bus */
101 GPIO15_nCS_1,
102 GPIO78_nCS_2,
103 GPIO79_nCS_3,
104 GPIO80_nCS_4,
105 GPIO33_nCS_5,
106 GPIO18_RDY,
107
108 /* GPIO */
109 GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,
110 GPIO9_GPIO, /* PC card reset */
111
112 /* NAND controls */
113 GPIO5_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */
114 GPIO4_GPIO | MFP_LPM_DRIVE_LOW, /* NAND ALE */
115 GPIO3_GPIO | MFP_LPM_DRIVE_LOW, /* NAND CLE */
116 GPIO10_GPIO, /* NAND Ready/Busy */
117
118 /* interrupts */
119 GPIO22_GPIO, /* DM9000 interrupt */
120};
121
122#if defined(CONFIG_SPI_PXA2XX)
123static struct pxa2xx_spi_master pxa_ssp_master_info = {
124 .num_chipselect = 1,
125};
126
127static struct spi_board_info spi_board_info[] __initdata = {
128 [0] = {
129 .modalias = "rtc-max6902",
130 .max_speed_hz = 1000000,
131 .bus_num = 1,
132 .chip_select = 0,
133 },
134};
135
136static void __init cmx255_init_rtc(void)
137{
138 pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
139 spi_register_board_info(ARRAY_AND_SIZE(spi_board_info));
140}
141#else
142static inline void cmx255_init_rtc(void) {}
143#endif
144
145#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
146static struct mtd_partition cmx255_nor_partitions[] = {
147 {
148 .name = "ARMmon",
149 .size = 0x00030000,
150 .offset = 0,
151 .mask_flags = MTD_WRITEABLE /* force read-only */
152 } , {
153 .name = "ARMmon setup block",
154 .size = 0x00010000,
155 .offset = MTDPART_OFS_APPEND,
156 .mask_flags = MTD_WRITEABLE /* force read-only */
157 } , {
158 .name = "kernel",
159 .size = 0x00160000,
160 .offset = MTDPART_OFS_APPEND,
161 } , {
162 .name = "ramdisk",
163 .size = MTDPART_SIZ_FULL,
164 .offset = MTDPART_OFS_APPEND
165 }
166};
167
168static struct physmap_flash_data cmx255_nor_flash_data[] = {
169 {
170 .width = 2, /* bankwidth in bytes */
171 .parts = cmx255_nor_partitions,
172 .nr_parts = ARRAY_SIZE(cmx255_nor_partitions)
173 }
174};
175
176static struct resource cmx255_nor_resource = {
177 .start = PXA_CS0_PHYS,
178 .end = PXA_CS0_PHYS + SZ_8M - 1,
179 .flags = IORESOURCE_MEM,
180};
181
182static struct platform_device cmx255_nor = {
183 .name = "physmap-flash",
184 .id = -1,
185 .dev = {
186 .platform_data = cmx255_nor_flash_data,
187 },
188 .resource = &cmx255_nor_resource,
189 .num_resources = 1,
190};
191
192static void __init cmx255_init_nor(void)
193{
194 platform_device_register(&cmx255_nor);
195}
196#else
197static inline void cmx255_init_nor(void) {}
198#endif
199
200#if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE)
201static struct resource cmx255_nand_resource[] = {
202 [0] = {
203 .start = PXA_CS1_PHYS,
204 .end = PXA_CS1_PHYS + 11,
205 .flags = IORESOURCE_MEM,
206 },
207 [1] = {
208 .start = PXA_CS5_PHYS,
209 .end = PXA_CS5_PHYS + 3,
210 .flags = IORESOURCE_MEM,
211 },
212};
213
214static struct mtd_partition cmx255_nand_parts[] = {
215 [0] = {
216 .name = "cmx255-nand",
217 .size = MTDPART_SIZ_FULL,
218 .offset = 0,
219 },
220};
221
222static struct gpio_nand_platdata cmx255_nand_platdata = {
223 .gpio_nce = GPIO_NAND_CS,
224 .gpio_cle = GPIO_NAND_CLE,
225 .gpio_ale = GPIO_NAND_ALE,
226 .gpio_rdy = GPIO_NAND_RB,
227 .gpio_nwp = -1,
228 .parts = cmx255_nand_parts,
229 .num_parts = ARRAY_SIZE(cmx255_nand_parts),
230 .chip_delay = 25,
231};
232
233static struct platform_device cmx255_nand = {
234 .name = "gpio-nand",
235 .num_resources = ARRAY_SIZE(cmx255_nand_resource),
236 .resource = cmx255_nand_resource,
237 .id = -1,
238 .dev = {
239 .platform_data = &cmx255_nand_platdata,
240 }
241};
242
243static void __init cmx255_init_nand(void)
244{
245 platform_device_register(&cmx255_nand);
246}
247#else
248static inline void cmx255_init_nand(void) {}
249#endif
250
251void __init cmx255_init(void)
252{
253 pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config));
254
255 cmx255_init_rtc();
256 cmx255_init_nor();
257 cmx255_init_nand();
258}
diff --git a/arch/arm/mach-pxa/cm-x270-pci.h b/arch/arm/mach-pxa/cm-x270-pci.h
deleted file mode 100644
index 48f532f4cb51..000000000000
--- a/arch/arm/mach-pxa/cm-x270-pci.h
+++ /dev/null
@@ -1,13 +0,0 @@
1extern void __cmx270_pci_init_irq(int irq_gpio);
2extern void __cmx270_pci_suspend(void);
3extern void __cmx270_pci_resume(void);
4
5#ifdef CONFIG_PCI
6#define cmx270_pci_init_irq(x) __cmx270_pci_init_irq(x)
7#define cmx270_pci_suspend(x) __cmx270_pci_suspend(x)
8#define cmx270_pci_resume(x) __cmx270_pci_resume(x)
9#else
10#define cmx270_pci_init_irq(x) do {} while (0)
11#define cmx270_pci_suspend(x) do {} while (0)
12#define cmx270_pci_resume(x) do {} while (0)
13#endif
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index af003a269534..102a43186618 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -14,46 +14,22 @@
14#include <linux/irq.h> 14#include <linux/irq.h>
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16 16
17#include <linux/dm9000.h>
18#include <linux/rtc-v3020.h> 17#include <linux/rtc-v3020.h>
19#include <video/mbxfb.h> 18#include <video/mbxfb.h>
20#include <linux/leds.h>
21 19
22#include <asm/mach/arch.h>
23#include <asm/mach-types.h>
24#include <asm/mach/map.h>
25
26#include <mach/pxa2xx-regs.h>
27#include <mach/mfp-pxa27x.h> 20#include <mach/mfp-pxa27x.h>
28#include <mach/pxa-regs.h>
29#include <mach/audio.h>
30#include <mach/pxafb.h>
31#include <mach/ohci.h> 21#include <mach/ohci.h>
32#include <mach/mmc.h> 22#include <mach/mmc.h>
33#include <mach/bitfield.h>
34
35#include <asm/hardware/it8152.h>
36 23
37#include "generic.h" 24#include "generic.h"
38#include "cm-x270-pci.h"
39
40/* virtual addresses for statically mapped regions */
41#define CMX270_VIRT_BASE (0xe8000000)
42#define CMX270_IT8152_VIRT (CMX270_VIRT_BASE)
43 25
26/* physical address if local-bus attached devices */
44#define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22)) 27#define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22))
45#define DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
46 28
47/* GPIO IRQ usage */ 29/* GPIO IRQ usage */
48#define GPIO10_ETHIRQ (10)
49#define GPIO22_IT8152_IRQ (22)
50#define GPIO83_MMC_IRQ (83) 30#define GPIO83_MMC_IRQ (83)
51#define GPIO95_GFXIRQ (95)
52 31
53#define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ)
54#define CMX270_IT8152_IRQ IRQ_GPIO(GPIO22_IT8152_IRQ)
55#define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ) 32#define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ)
56#define CMX270_GFXIRQ IRQ_GPIO(GPIO95_GFXIRQ)
57 33
58/* MMC power enable */ 34/* MMC power enable */
59#define GPIO105_MMC_POWER (105) 35#define GPIO105_MMC_POWER (105)
@@ -157,62 +133,6 @@ static unsigned long cmx270_pin_config[] = {
157 GPIO83_GPIO, /* MMC card detect */ 133 GPIO83_GPIO, /* MMC card detect */
158}; 134};
159 135
160#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
161static struct resource cmx270_dm9000_resource[] = {
162 [0] = {
163 .start = DM9000_PHYS_BASE,
164 .end = DM9000_PHYS_BASE + 4,
165 .flags = IORESOURCE_MEM,
166 },
167 [1] = {
168 .start = DM9000_PHYS_BASE + 8,
169 .end = DM9000_PHYS_BASE + 8 + 500,
170 .flags = IORESOURCE_MEM,
171 },
172 [2] = {
173 .start = CMX270_ETHIRQ,
174 .end = CMX270_ETHIRQ,
175 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
176 }
177};
178
179static struct dm9000_plat_data cmx270_dm9000_platdata = {
180 .flags = DM9000_PLATF_32BITONLY,
181};
182
183static struct platform_device cmx270_dm9000_device = {
184 .name = "dm9000",
185 .id = 0,
186 .num_resources = ARRAY_SIZE(cmx270_dm9000_resource),
187 .resource = cmx270_dm9000_resource,
188 .dev = {
189 .platform_data = &cmx270_dm9000_platdata,
190 }
191};
192
193static void __init cmx270_init_dm9000(void)
194{
195 platform_device_register(&cmx270_dm9000_device);
196}
197#else
198static inline void cmx270_init_dm9000(void) {}
199#endif
200
201/* UCB1400 touchscreen controller */
202#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
203static struct platform_device cmx270_ts_device = {
204 .name = "ucb1400_ts",
205 .id = -1,
206};
207
208static void __init cmx270_init_touchscreen(void)
209{
210 platform_device_register(&cmx270_ts_device);
211}
212#else
213static inline void cmx270_init_touchscreen(void) {}
214#endif
215
216/* V3020 RTC */ 136/* V3020 RTC */
217#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE) 137#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
218static struct resource cmx270_v3020_resource[] = { 138static struct resource cmx270_v3020_resource[] = {
@@ -242,45 +162,7 @@ static void __init cmx270_init_rtc(void)
242 platform_device_register(&cmx270_rtc_device); 162 platform_device_register(&cmx270_rtc_device);
243} 163}
244#else 164#else
245static inline void cmx270_init_rtc(void) {} 165static inline void cmx2xx_init_rtc(void) {}
246#endif
247
248/* CM-X270 LEDs */
249#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
250static struct gpio_led cmx270_leds[] = {
251 [0] = {
252 .name = "cm-x270:red",
253 .default_trigger = "nand-disk",
254 .gpio = 93,
255 .active_low = 1,
256 },
257 [1] = {
258 .name = "cm-x270:green",
259 .default_trigger = "heartbeat",
260 .gpio = 94,
261 .active_low = 1,
262 },
263};
264
265static struct gpio_led_platform_data cmx270_gpio_led_pdata = {
266 .num_leds = ARRAY_SIZE(cmx270_leds),
267 .leds = cmx270_leds,
268};
269
270static struct platform_device cmx270_led_device = {
271 .name = "leds-gpio",
272 .id = -1,
273 .dev = {
274 .platform_data = &cmx270_gpio_led_pdata,
275 },
276};
277
278static void __init cmx270_init_leds(void)
279{
280 platform_device_register(&cmx270_led_device);
281}
282#else
283static inline void cmx270_init_leds(void) {}
284#endif 166#endif
285 167
286/* 2700G graphics */ 168/* 2700G graphics */
@@ -373,224 +255,6 @@ static void __init cmx270_init_2700G(void)
373static inline void cmx270_init_2700G(void) {} 255static inline void cmx270_init_2700G(void) {}
374#endif 256#endif
375 257
376#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
377/*
378 Display definitions
379 keep these for backwards compatibility, although symbolic names (as
380 e.g. in lpd270.c) looks better
381*/
382#define MTYPE_STN320x240 0
383#define MTYPE_TFT640x480 1
384#define MTYPE_CRT640x480 2
385#define MTYPE_CRT800x600 3
386#define MTYPE_TFT320x240 6
387#define MTYPE_STN640x480 7
388
389static struct pxafb_mode_info generic_stn_320x240_mode = {
390 .pixclock = 76923,
391 .bpp = 8,
392 .xres = 320,
393 .yres = 240,
394 .hsync_len = 3,
395 .vsync_len = 2,
396 .left_margin = 3,
397 .upper_margin = 0,
398 .right_margin = 3,
399 .lower_margin = 0,
400 .sync = (FB_SYNC_HOR_HIGH_ACT |
401 FB_SYNC_VERT_HIGH_ACT),
402 .cmap_greyscale = 0,
403};
404
405static struct pxafb_mach_info generic_stn_320x240 = {
406 .modes = &generic_stn_320x240_mode,
407 .num_modes = 1,
408 .lccr0 = 0,
409 .lccr3 = (LCCR3_PixClkDiv(0x03) |
410 LCCR3_Acb(0xff) |
411 LCCR3_PCP),
412 .cmap_inverse = 0,
413 .cmap_static = 0,
414};
415
416static struct pxafb_mode_info generic_tft_640x480_mode = {
417 .pixclock = 38461,
418 .bpp = 8,
419 .xres = 640,
420 .yres = 480,
421 .hsync_len = 60,
422 .vsync_len = 2,
423 .left_margin = 70,
424 .upper_margin = 10,
425 .right_margin = 70,
426 .lower_margin = 5,
427 .sync = 0,
428 .cmap_greyscale = 0,
429};
430
431static struct pxafb_mach_info generic_tft_640x480 = {
432 .modes = &generic_tft_640x480_mode,
433 .num_modes = 1,
434 .lccr0 = (LCCR0_PAS),
435 .lccr3 = (LCCR3_PixClkDiv(0x01) |
436 LCCR3_Acb(0xff) |
437 LCCR3_PCP),
438 .cmap_inverse = 0,
439 .cmap_static = 0,
440};
441
442static struct pxafb_mode_info generic_crt_640x480_mode = {
443 .pixclock = 38461,
444 .bpp = 8,
445 .xres = 640,
446 .yres = 480,
447 .hsync_len = 63,
448 .vsync_len = 2,
449 .left_margin = 81,
450 .upper_margin = 33,
451 .right_margin = 16,
452 .lower_margin = 10,
453 .sync = (FB_SYNC_HOR_HIGH_ACT |
454 FB_SYNC_VERT_HIGH_ACT),
455 .cmap_greyscale = 0,
456};
457
458static struct pxafb_mach_info generic_crt_640x480 = {
459 .modes = &generic_crt_640x480_mode,
460 .num_modes = 1,
461 .lccr0 = (LCCR0_PAS),
462 .lccr3 = (LCCR3_PixClkDiv(0x01) |
463 LCCR3_Acb(0xff)),
464 .cmap_inverse = 0,
465 .cmap_static = 0,
466};
467
468static struct pxafb_mode_info generic_crt_800x600_mode = {
469 .pixclock = 28846,
470 .bpp = 8,
471 .xres = 800,
472 .yres = 600,
473 .hsync_len = 63,
474 .vsync_len = 2,
475 .left_margin = 26,
476 .upper_margin = 21,
477 .right_margin = 26,
478 .lower_margin = 11,
479 .sync = (FB_SYNC_HOR_HIGH_ACT |
480 FB_SYNC_VERT_HIGH_ACT),
481 .cmap_greyscale = 0,
482};
483
484static struct pxafb_mach_info generic_crt_800x600 = {
485 .modes = &generic_crt_800x600_mode,
486 .num_modes = 1,
487 .lccr0 = (LCCR0_PAS),
488 .lccr3 = (LCCR3_PixClkDiv(0x02) |
489 LCCR3_Acb(0xff)),
490 .cmap_inverse = 0,
491 .cmap_static = 0,
492};
493
494static struct pxafb_mode_info generic_tft_320x240_mode = {
495 .pixclock = 134615,
496 .bpp = 16,
497 .xres = 320,
498 .yres = 240,
499 .hsync_len = 63,
500 .vsync_len = 7,
501 .left_margin = 75,
502 .upper_margin = 0,
503 .right_margin = 15,
504 .lower_margin = 15,
505 .sync = 0,
506 .cmap_greyscale = 0,
507};
508
509static struct pxafb_mach_info generic_tft_320x240 = {
510 .modes = &generic_tft_320x240_mode,
511 .num_modes = 1,
512 .lccr0 = (LCCR0_PAS),
513 .lccr3 = (LCCR3_PixClkDiv(0x06) |
514 LCCR3_Acb(0xff) |
515 LCCR3_PCP),
516 .cmap_inverse = 0,
517 .cmap_static = 0,
518};
519
520static struct pxafb_mode_info generic_stn_640x480_mode = {
521 .pixclock = 57692,
522 .bpp = 8,
523 .xres = 640,
524 .yres = 480,
525 .hsync_len = 4,
526 .vsync_len = 2,
527 .left_margin = 10,
528 .upper_margin = 5,
529 .right_margin = 10,
530 .lower_margin = 5,
531 .sync = (FB_SYNC_HOR_HIGH_ACT |
532 FB_SYNC_VERT_HIGH_ACT),
533 .cmap_greyscale = 0,
534};
535
536static struct pxafb_mach_info generic_stn_640x480 = {
537 .modes = &generic_stn_640x480_mode,
538 .num_modes = 1,
539 .lccr0 = 0,
540 .lccr3 = (LCCR3_PixClkDiv(0x02) |
541 LCCR3_Acb(0xff)),
542 .cmap_inverse = 0,
543 .cmap_static = 0,
544};
545
546static struct pxafb_mach_info *cmx270_display = &generic_crt_640x480;
547
548static int __init cmx270_set_display(char *str)
549{
550 int disp_type = simple_strtol(str, NULL, 0);
551 switch (disp_type) {
552 case MTYPE_STN320x240:
553 cmx270_display = &generic_stn_320x240;
554 break;
555 case MTYPE_TFT640x480:
556 cmx270_display = &generic_tft_640x480;
557 break;
558 case MTYPE_CRT640x480:
559 cmx270_display = &generic_crt_640x480;
560 break;
561 case MTYPE_CRT800x600:
562 cmx270_display = &generic_crt_800x600;
563 break;
564 case MTYPE_TFT320x240:
565 cmx270_display = &generic_tft_320x240;
566 break;
567 case MTYPE_STN640x480:
568 cmx270_display = &generic_stn_640x480;
569 break;
570 default: /* fallback to CRT 640x480 */
571 cmx270_display = &generic_crt_640x480;
572 break;
573 }
574 return 1;
575}
576
577/*
578 This should be done really early to get proper configuration for
579 frame buffer.
580 Indeed, pxafb parameters can be used istead, but CM-X270 bootloader
581 has limitied line length for kernel command line, and also it will
582 break compatibitlty with proprietary releases already in field.
583*/
584__setup("monitor=", cmx270_set_display);
585
586static void __init cmx270_init_display(void)
587{
588 set_pxa_fb_info(cmx270_display);
589}
590#else
591static inline void cmx270_init_display(void) {}
592#endif
593
594/* PXA27x OHCI controller setup */ 258/* PXA27x OHCI controller setup */
595#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) 259#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
596static int cmx270_ohci_init(struct device *dev) 260static int cmx270_ohci_init(struct device *dev)
@@ -676,131 +340,12 @@ static void __init cmx270_init_mmc(void)
676static inline void cmx270_init_mmc(void) {} 340static inline void cmx270_init_mmc(void) {}
677#endif 341#endif
678 342
679#ifdef CONFIG_PM 343void __init cmx270_init(void)
680static unsigned long sleep_save_msc[10];
681
682static int cmx270_suspend(struct sys_device *dev, pm_message_t state)
683{
684 cmx270_pci_suspend();
685
686 /* save MSC registers */
687 sleep_save_msc[0] = MSC0;
688 sleep_save_msc[1] = MSC1;
689 sleep_save_msc[2] = MSC2;
690
691 /* setup power saving mode registers */
692 PCFR = 0x0;
693 PSLR = 0xff400000;
694 PMCR = 0x00000005;
695 PWER = 0x80000000;
696 PFER = 0x00000000;
697 PRER = 0x00000000;
698 PGSR0 = 0xC0018800;
699 PGSR1 = 0x004F0002;
700 PGSR2 = 0x6021C000;
701 PGSR3 = 0x00020000;
702
703 return 0;
704}
705
706static int cmx270_resume(struct sys_device *dev)
707{
708 cmx270_pci_resume();
709
710 /* restore MSC registers */
711 MSC0 = sleep_save_msc[0];
712 MSC1 = sleep_save_msc[1];
713 MSC2 = sleep_save_msc[2];
714
715 return 0;
716}
717
718static struct sysdev_class cmx270_pm_sysclass = {
719 .name = "pm",
720 .resume = cmx270_resume,
721 .suspend = cmx270_suspend,
722};
723
724static struct sys_device cmx270_pm_device = {
725 .cls = &cmx270_pm_sysclass,
726};
727
728static int __init cmx270_pm_init(void)
729{
730 int error;
731 error = sysdev_class_register(&cmx270_pm_sysclass);
732 if (error == 0)
733 error = sysdev_register(&cmx270_pm_device);
734 return error;
735}
736#else
737static int __init cmx270_pm_init(void) { return 0; }
738#endif
739
740#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
741static void __init cmx270_init_ac97(void)
742{
743 pxa_set_ac97_info(NULL);
744}
745#else
746static inline void cmx270_init_ac97(void) {}
747#endif
748
749static void __init cmx270_init(void)
750{ 344{
751 cmx270_pm_init();
752
753 pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config)); 345 pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config));
754 346
755 cmx270_init_dm9000();
756 cmx270_init_rtc(); 347 cmx270_init_rtc();
757 cmx270_init_display();
758 cmx270_init_mmc(); 348 cmx270_init_mmc();
759 cmx270_init_ohci(); 349 cmx270_init_ohci();
760 cmx270_init_ac97();
761 cmx270_init_touchscreen();
762 cmx270_init_leds();
763 cmx270_init_2700G(); 350 cmx270_init_2700G();
764} 351}
765
766static void __init cmx270_init_irq(void)
767{
768 pxa27x_init_irq();
769
770 cmx270_pci_init_irq(GPIO22_IT8152_IRQ);
771}
772
773#ifdef CONFIG_PCI
774/* Map PCI companion statically */
775static struct map_desc cmx270_io_desc[] __initdata = {
776 [0] = { /* PCI bridge */
777 .virtual = CMX270_IT8152_VIRT,
778 .pfn = __phys_to_pfn(PXA_CS4_PHYS),
779 .length = SZ_64M,
780 .type = MT_DEVICE
781 },
782};
783
784static void __init cmx270_map_io(void)
785{
786 pxa_map_io();
787 iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
788
789 it8152_base_address = CMX270_IT8152_VIRT;
790}
791#else
792static void __init cmx270_map_io(void)
793{
794 pxa_map_io();
795}
796#endif
797
798MACHINE_START(ARMCORE, "Compulab CM-x270")
799 .boot_params = 0xa0000100,
800 .phys_io = 0x40000000,
801 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
802 .map_io = cmx270_map_io,
803 .init_irq = cmx270_init_irq,
804 .timer = &pxa_timer,
805 .init_machine = cmx270_init,
806MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x270-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 2d5bcea1e520..3156b25f6e9d 100644
--- a/arch/arm/mach-pxa/cm-x270-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-pxa/cm-x270-pci.c 2 * linux/arch/arm/mach-pxa/cm-x2xx-pci.c
3 * 3 *
4 * PCI bios-type initialisation for PCI machines 4 * PCI bios-type initialisation for PCI machines
5 * 5 *
@@ -28,7 +28,7 @@
28#include <asm/hardware/it8152.h> 28#include <asm/hardware/it8152.h>
29 29
30unsigned long it8152_base_address; 30unsigned long it8152_base_address;
31static int cmx270_it8152_irq_gpio; 31static int cmx2xx_it8152_irq_gpio;
32 32
33/* 33/*
34 * Only first 64MB of memory can be accessed via PCI. 34 * Only first 64MB of memory can be accessed via PCI.
@@ -36,13 +36,13 @@ static int cmx270_it8152_irq_gpio;
36 * This is really ugly and we need a better way of specifying 36 * This is really ugly and we need a better way of specifying
37 * DMA-capable regions of memory. 37 * DMA-capable regions of memory.
38 */ 38 */
39void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size, 39void __init cmx2xx_pci_adjust_zones(int node, unsigned long *zone_size,
40 unsigned long *zhole_size) 40 unsigned long *zhole_size)
41{ 41{
42 unsigned int sz = SZ_64M >> PAGE_SHIFT; 42 unsigned int sz = SZ_64M >> PAGE_SHIFT;
43 43
44 if (machine_is_armcore()) { 44 if (machine_is_armcore()) {
45 pr_info("Adjusting zones for CM-X270\n"); 45 pr_info("Adjusting zones for CM-X2XX\n");
46 46
47 /* 47 /*
48 * Only adjust if > 64M on current system 48 * Only adjust if > 64M on current system
@@ -57,29 +57,29 @@ void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size,
57 } 57 }
58} 58}
59 59
60static void cmx270_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) 60static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
61{ 61{
62 /* clear our parent irq */ 62 /* clear our parent irq */
63 GEDR(cmx270_it8152_irq_gpio) = GPIO_bit(cmx270_it8152_irq_gpio); 63 GEDR(cmx2xx_it8152_irq_gpio) = GPIO_bit(cmx2xx_it8152_irq_gpio);
64 64
65 it8152_irq_demux(irq, desc); 65 it8152_irq_demux(irq, desc);
66} 66}
67 67
68void __cmx270_pci_init_irq(int irq_gpio) 68void __cmx2xx_pci_init_irq(int irq_gpio)
69{ 69{
70 it8152_init_irq(); 70 it8152_init_irq();
71 71
72 cmx270_it8152_irq_gpio = irq_gpio; 72 cmx2xx_it8152_irq_gpio = irq_gpio;
73 73
74 set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING); 74 set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING);
75 75
76 set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx270_it8152_irq_demux); 76 set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx2xx_it8152_irq_demux);
77} 77}
78 78
79#ifdef CONFIG_PM 79#ifdef CONFIG_PM
80static unsigned long sleep_save_ite[10]; 80static unsigned long sleep_save_ite[10];
81 81
82void __cmx270_pci_suspend(void) 82void __cmx2xx_pci_suspend(void)
83{ 83{
84 /* save ITE state */ 84 /* save ITE state */
85 sleep_save_ite[0] = __raw_readl(IT8152_INTC_PDCNIMR); 85 sleep_save_ite[0] = __raw_readl(IT8152_INTC_PDCNIMR);
@@ -91,7 +91,7 @@ void __cmx270_pci_suspend(void)
91 __raw_writel((0), IT8152_INTC_LPCNIRR); 91 __raw_writel((0), IT8152_INTC_LPCNIRR);
92} 92}
93 93
94void __cmx270_pci_resume(void) 94void __cmx2xx_pci_resume(void)
95{ 95{
96 /* restore IT8152 state */ 96 /* restore IT8152 state */
97 __raw_writel((sleep_save_ite[0]), IT8152_INTC_PDCNIMR); 97 __raw_writel((sleep_save_ite[0]), IT8152_INTC_PDCNIMR);
@@ -99,12 +99,12 @@ void __cmx270_pci_resume(void)
99 __raw_writel((sleep_save_ite[2]), IT8152_INTC_LPNIAR); 99 __raw_writel((sleep_save_ite[2]), IT8152_INTC_LPNIAR);
100} 100}
101#else 101#else
102void cmx270_pci_suspend(void) {} 102void cmx2xx_pci_suspend(void) {}
103void cmx270_pci_resume(void) {} 103void cmx2xx_pci_resume(void) {}
104#endif 104#endif
105 105
106/* PCI IRQ mapping*/ 106/* PCI IRQ mapping*/
107static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 107static int __init cmx2xx_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
108{ 108{
109 int irq; 109 int irq;
110 110
@@ -116,14 +116,14 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
116 116
117 /* 117 /*
118 Here comes the ugly part. The routing is baseboard specific, 118 Here comes the ugly part. The routing is baseboard specific,
119 but defining a platform for each possible base of CM-X270 is 119 but defining a platform for each possible base of CM-X2XX is
120 unrealistic. Here we keep mapping for ATXBase and SB-X270. 120 unrealistic. Here we keep mapping for ATXBase and SB-X2XX.
121 */ 121 */
122 /* ATXBASE PCI slot */ 122 /* ATXBASE PCI slot */
123 if (slot == 7) 123 if (slot == 7)
124 return IT8152_PCI_INTA; 124 return IT8152_PCI_INTA;
125 125
126 /* ATXBase/SB-x270 CardBus */ 126 /* ATXBase/SB-X2XX CardBus */
127 if (slot == 8 || slot == 0) 127 if (slot == 8 || slot == 0)
128 return IT8152_PCI_INTB; 128 return IT8152_PCI_INTB;
129 129
@@ -131,7 +131,11 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
131 if (slot == 9) 131 if (slot == 9)
132 return IT8152_PCI_INTA; 132 return IT8152_PCI_INTA;
133 133
134 /* SB-x270 Ethernet */ 134 /* CM-x255 Onboard Ethernet */
135 if (slot == 15)
136 return IT8152_PCI_INTC;
137
138 /* SB-x2xx Ethernet */
135 if (slot == 16) 139 if (slot == 16)
136 return IT8152_PCI_INTA; 140 return IT8152_PCI_INTA;
137 141
@@ -144,9 +148,9 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
144 return(0); 148 return(0);
145} 149}
146 150
147static void cmx270_pci_preinit(void) 151static void cmx2xx_pci_preinit(void)
148{ 152{
149 pr_info("Initializing CM-X270 PCI subsystem\n"); 153 pr_info("Initializing CM-X2XX PCI subsystem\n");
150 154
151 __raw_writel(0x800, IT8152_PCI_CFG_ADDR); 155 __raw_writel(0x800, IT8152_PCI_CFG_ADDR);
152 if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) { 156 if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) {
@@ -200,21 +204,21 @@ static void cmx270_pci_preinit(void)
200 } 204 }
201} 205}
202 206
203static struct hw_pci cmx270_pci __initdata = { 207static struct hw_pci cmx2xx_pci __initdata = {
204 .swizzle = pci_std_swizzle, 208 .swizzle = pci_std_swizzle,
205 .map_irq = cmx270_pci_map_irq, 209 .map_irq = cmx2xx_pci_map_irq,
206 .nr_controllers = 1, 210 .nr_controllers = 1,
207 .setup = it8152_pci_setup, 211 .setup = it8152_pci_setup,
208 .scan = it8152_pci_scan_bus, 212 .scan = it8152_pci_scan_bus,
209 .preinit = cmx270_pci_preinit, 213 .preinit = cmx2xx_pci_preinit,
210}; 214};
211 215
212static int __init cmx270_init_pci(void) 216static int __init cmx2xx_init_pci(void)
213{ 217{
214 if (machine_is_armcore()) 218 if (machine_is_armcore())
215 pci_common_init(&cmx270_pci); 219 pci_common_init(&cmx2xx_pci);
216 220
217 return 0; 221 return 0;
218} 222}
219 223
220subsys_initcall(cmx270_init_pci); 224subsys_initcall(cmx2xx_init_pci);
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.h b/arch/arm/mach-pxa/cm-x2xx-pci.h
new file mode 100644
index 000000000000..e24aad2e3ad7
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.h
@@ -0,0 +1,13 @@
1extern void __cmx2xx_pci_init_irq(int irq_gpio);
2extern void __cmx2xx_pci_suspend(void);
3extern void __cmx2xx_pci_resume(void);
4
5#ifdef CONFIG_PCI
6#define cmx2xx_pci_init_irq(x) __cmx2xx_pci_init_irq(x)
7#define cmx2xx_pci_suspend(x) __cmx2xx_pci_suspend(x)
8#define cmx2xx_pci_resume(x) __cmx2xx_pci_resume(x)
9#else
10#define cmx2xx_pci_init_irq(x) do {} while (0)
11#define cmx2xx_pci_suspend(x) do {} while (0)
12#define cmx2xx_pci_resume(x) do {} while (0)
13#endif
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
new file mode 100644
index 000000000000..0b3ce3b6d896
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -0,0 +1,531 @@
1/*
2 * linux/arch/arm/mach-pxa/cm-x2xx.c
3 *
4 * Copyright (C) 2008 CompuLab, Ltd.
5 * Mike Rapoport <mike@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/platform_device.h>
13#include <linux/sysdev.h>
14#include <linux/irq.h>
15#include <linux/gpio.h>
16
17#include <linux/dm9000.h>
18#include <linux/leds.h>
19
20#include <asm/mach/arch.h>
21#include <asm/mach-types.h>
22#include <asm/mach/map.h>
23
24#include <mach/pxa2xx-regs.h>
25#include <mach/mfp-pxa27x.h>
26#include <mach/pxa-regs.h>
27#include <mach/audio.h>
28#include <mach/pxafb.h>
29
30#include <asm/hardware/it8152.h>
31
32#include "generic.h"
33#include "cm-x2xx-pci.h"
34
35extern void cmx255_init(void);
36extern void cmx270_init(void);
37
38/* virtual addresses for statically mapped regions */
39#define CMX2XX_VIRT_BASE (0xe8000000)
40#define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE)
41
42/* physical address if local-bus attached devices */
43#define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22))
44#define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
45
46/* leds */
47#define CMX255_GPIO_RED (27)
48#define CMX255_GPIO_GREEN (32)
49#define CMX270_GPIO_RED (93)
50#define CMX270_GPIO_GREEN (94)
51
52/* GPIO IRQ usage */
53#define GPIO22_ETHIRQ (22)
54#define GPIO10_ETHIRQ (10)
55#define CMX255_GPIO_IT8152_IRQ (0)
56#define CMX270_GPIO_IT8152_IRQ (22)
57
58#define CMX255_ETHIRQ IRQ_GPIO(GPIO22_ETHIRQ)
59#define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ)
60
61#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
62static struct resource cmx255_dm9000_resource[] = {
63 [0] = {
64 .start = CMX255_DM9000_PHYS_BASE,
65 .end = CMX255_DM9000_PHYS_BASE + 3,
66 .flags = IORESOURCE_MEM,
67 },
68 [1] = {
69 .start = CMX255_DM9000_PHYS_BASE + 4,
70 .end = CMX255_DM9000_PHYS_BASE + 4 + 500,
71 .flags = IORESOURCE_MEM,
72 },
73 [2] = {
74 .start = CMX255_ETHIRQ,
75 .end = CMX255_ETHIRQ,
76 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
77 }
78};
79
80static struct resource cmx270_dm9000_resource[] = {
81 [0] = {
82 .start = CMX270_DM9000_PHYS_BASE,
83 .end = CMX270_DM9000_PHYS_BASE + 3,
84 .flags = IORESOURCE_MEM,
85 },
86 [1] = {
87 .start = CMX270_DM9000_PHYS_BASE + 8,
88 .end = CMX270_DM9000_PHYS_BASE + 8 + 500,
89 .flags = IORESOURCE_MEM,
90 },
91 [2] = {
92 .start = CMX270_ETHIRQ,
93 .end = CMX270_ETHIRQ,
94 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
95 }
96};
97
98static struct dm9000_plat_data cmx270_dm9000_platdata = {
99 .flags = DM9000_PLATF_32BITONLY,
100};
101
102static struct platform_device cmx2xx_dm9000_device = {
103 .name = "dm9000",
104 .id = 0,
105 .num_resources = ARRAY_SIZE(cmx270_dm9000_resource),
106 .dev = {
107 .platform_data = &cmx270_dm9000_platdata,
108 }
109};
110
111static void __init cmx2xx_init_dm9000(void)
112{
113 if (cpu_is_pxa25x())
114 cmx2xx_dm9000_device.resource = cmx255_dm9000_resource;
115 else
116 cmx2xx_dm9000_device.resource = cmx270_dm9000_resource;
117 platform_device_register(&cmx2xx_dm9000_device);
118}
119#else
120static inline void cmx2xx_init_dm9000(void) {}
121#endif
122
123/* UCB1400 touchscreen controller */
124#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
125static struct platform_device cmx2xx_ts_device = {
126 .name = "ucb1400_ts",
127 .id = -1,
128};
129
130static void __init cmx2xx_init_touchscreen(void)
131{
132 platform_device_register(&cmx2xx_ts_device);
133}
134#else
135static inline void cmx2xx_init_touchscreen(void) {}
136#endif
137
138/* CM-X270 LEDs */
139#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
140static struct gpio_led cmx2xx_leds[] = {
141 [0] = {
142 .name = "cm-x2xx:red",
143 .default_trigger = "nand-disk",
144 .active_low = 1,
145 },
146 [1] = {
147 .name = "cm-x2xx:green",
148 .default_trigger = "heartbeat",
149 .active_low = 1,
150 },
151};
152
153static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = {
154 .num_leds = ARRAY_SIZE(cmx2xx_leds),
155 .leds = cmx2xx_leds,
156};
157
158static struct platform_device cmx2xx_led_device = {
159 .name = "leds-gpio",
160 .id = -1,
161 .dev = {
162 .platform_data = &cmx2xx_gpio_led_pdata,
163 },
164};
165
166static void __init cmx2xx_init_leds(void)
167{
168 if (cpu_is_pxa25x()) {
169 cmx2xx_leds[0].gpio = CMX255_GPIO_RED;
170 cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN;
171 } else {
172 cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
173 cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
174 }
175 platform_device_register(&cmx2xx_led_device);
176}
177#else
178static inline void cmx2xx_init_leds(void) {}
179#endif
180
181#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
182/*
183 Display definitions
184 keep these for backwards compatibility, although symbolic names (as
185 e.g. in lpd270.c) looks better
186*/
187#define MTYPE_STN320x240 0
188#define MTYPE_TFT640x480 1
189#define MTYPE_CRT640x480 2
190#define MTYPE_CRT800x600 3
191#define MTYPE_TFT320x240 6
192#define MTYPE_STN640x480 7
193
194static struct pxafb_mode_info generic_stn_320x240_mode = {
195 .pixclock = 76923,
196 .bpp = 8,
197 .xres = 320,
198 .yres = 240,
199 .hsync_len = 3,
200 .vsync_len = 2,
201 .left_margin = 3,
202 .upper_margin = 0,
203 .right_margin = 3,
204 .lower_margin = 0,
205 .sync = (FB_SYNC_HOR_HIGH_ACT |
206 FB_SYNC_VERT_HIGH_ACT),
207 .cmap_greyscale = 0,
208};
209
210static struct pxafb_mach_info generic_stn_320x240 = {
211 .modes = &generic_stn_320x240_mode,
212 .num_modes = 1,
213 .lccr0 = 0,
214 .lccr3 = (LCCR3_PixClkDiv(0x03) |
215 LCCR3_Acb(0xff) |
216 LCCR3_PCP),
217 .cmap_inverse = 0,
218 .cmap_static = 0,
219};
220
221static struct pxafb_mode_info generic_tft_640x480_mode = {
222 .pixclock = 38461,
223 .bpp = 8,
224 .xres = 640,
225 .yres = 480,
226 .hsync_len = 60,
227 .vsync_len = 2,
228 .left_margin = 70,
229 .upper_margin = 10,
230 .right_margin = 70,
231 .lower_margin = 5,
232 .sync = 0,
233 .cmap_greyscale = 0,
234};
235
236static struct pxafb_mach_info generic_tft_640x480 = {
237 .modes = &generic_tft_640x480_mode,
238 .num_modes = 1,
239 .lccr0 = (LCCR0_PAS),
240 .lccr3 = (LCCR3_PixClkDiv(0x01) |
241 LCCR3_Acb(0xff) |
242 LCCR3_PCP),
243 .cmap_inverse = 0,
244 .cmap_static = 0,
245};
246
247static struct pxafb_mode_info generic_crt_640x480_mode = {
248 .pixclock = 38461,
249 .bpp = 8,
250 .xres = 640,
251 .yres = 480,
252 .hsync_len = 63,
253 .vsync_len = 2,
254 .left_margin = 81,
255 .upper_margin = 33,
256 .right_margin = 16,
257 .lower_margin = 10,
258 .sync = (FB_SYNC_HOR_HIGH_ACT |
259 FB_SYNC_VERT_HIGH_ACT),
260 .cmap_greyscale = 0,
261};
262
263static struct pxafb_mach_info generic_crt_640x480 = {
264 .modes = &generic_crt_640x480_mode,
265 .num_modes = 1,
266 .lccr0 = (LCCR0_PAS),
267 .lccr3 = (LCCR3_PixClkDiv(0x01) |
268 LCCR3_Acb(0xff)),
269 .cmap_inverse = 0,
270 .cmap_static = 0,
271};
272
273static struct pxafb_mode_info generic_crt_800x600_mode = {
274 .pixclock = 28846,
275 .bpp = 8,
276 .xres = 800,
277 .yres = 600,
278 .hsync_len = 63,
279 .vsync_len = 2,
280 .left_margin = 26,
281 .upper_margin = 21,
282 .right_margin = 26,
283 .lower_margin = 11,
284 .sync = (FB_SYNC_HOR_HIGH_ACT |
285 FB_SYNC_VERT_HIGH_ACT),
286 .cmap_greyscale = 0,
287};
288
289static struct pxafb_mach_info generic_crt_800x600 = {
290 .modes = &generic_crt_800x600_mode,
291 .num_modes = 1,
292 .lccr0 = (LCCR0_PAS),
293 .lccr3 = (LCCR3_PixClkDiv(0x02) |
294 LCCR3_Acb(0xff)),
295 .cmap_inverse = 0,
296 .cmap_static = 0,
297};
298
299static struct pxafb_mode_info generic_tft_320x240_mode = {
300 .pixclock = 134615,
301 .bpp = 16,
302 .xres = 320,
303 .yres = 240,
304 .hsync_len = 63,
305 .vsync_len = 7,
306 .left_margin = 75,
307 .upper_margin = 0,
308 .right_margin = 15,
309 .lower_margin = 15,
310 .sync = 0,
311 .cmap_greyscale = 0,
312};
313
314static struct pxafb_mach_info generic_tft_320x240 = {
315 .modes = &generic_tft_320x240_mode,
316 .num_modes = 1,
317 .lccr0 = (LCCR0_PAS),
318 .lccr3 = (LCCR3_PixClkDiv(0x06) |
319 LCCR3_Acb(0xff) |
320 LCCR3_PCP),
321 .cmap_inverse = 0,
322 .cmap_static = 0,
323};
324
325static struct pxafb_mode_info generic_stn_640x480_mode = {
326 .pixclock = 57692,
327 .bpp = 8,
328 .xres = 640,
329 .yres = 480,
330 .hsync_len = 4,
331 .vsync_len = 2,
332 .left_margin = 10,
333 .upper_margin = 5,
334 .right_margin = 10,
335 .lower_margin = 5,
336 .sync = (FB_SYNC_HOR_HIGH_ACT |
337 FB_SYNC_VERT_HIGH_ACT),
338 .cmap_greyscale = 0,
339};
340
341static struct pxafb_mach_info generic_stn_640x480 = {
342 .modes = &generic_stn_640x480_mode,
343 .num_modes = 1,
344 .lccr0 = 0,
345 .lccr3 = (LCCR3_PixClkDiv(0x02) |
346 LCCR3_Acb(0xff)),
347 .cmap_inverse = 0,
348 .cmap_static = 0,
349};
350
351static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480;
352
353static int __init cmx2xx_set_display(char *str)
354{
355 int disp_type = simple_strtol(str, NULL, 0);
356 switch (disp_type) {
357 case MTYPE_STN320x240:
358 cmx2xx_display = &generic_stn_320x240;
359 break;
360 case MTYPE_TFT640x480:
361 cmx2xx_display = &generic_tft_640x480;
362 break;
363 case MTYPE_CRT640x480:
364 cmx2xx_display = &generic_crt_640x480;
365 break;
366 case MTYPE_CRT800x600:
367 cmx2xx_display = &generic_crt_800x600;
368 break;
369 case MTYPE_TFT320x240:
370 cmx2xx_display = &generic_tft_320x240;
371 break;
372 case MTYPE_STN640x480:
373 cmx2xx_display = &generic_stn_640x480;
374 break;
375 default: /* fallback to CRT 640x480 */
376 cmx2xx_display = &generic_crt_640x480;
377 break;
378 }
379 return 1;
380}
381
382/*
383 This should be done really early to get proper configuration for
384 frame buffer.
385 Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader
386 has limitied line length for kernel command line, and also it will
387 break compatibitlty with proprietary releases already in field.
388*/
389__setup("monitor=", cmx2xx_set_display);
390
391static void __init cmx2xx_init_display(void)
392{
393 set_pxa_fb_info(cmx2xx_display);
394}
395#else
396static inline void cmx2xx_init_display(void) {}
397#endif
398
399#ifdef CONFIG_PM
400static unsigned long sleep_save_msc[10];
401
402static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state)
403{
404 cmx2xx_pci_suspend();
405
406 /* save MSC registers */
407 sleep_save_msc[0] = MSC0;
408 sleep_save_msc[1] = MSC1;
409 sleep_save_msc[2] = MSC2;
410
411 /* setup power saving mode registers */
412 PCFR = 0x0;
413 PSLR = 0xff400000;
414 PMCR = 0x00000005;
415 PWER = 0x80000000;
416 PFER = 0x00000000;
417 PRER = 0x00000000;
418 PGSR0 = 0xC0018800;
419 PGSR1 = 0x004F0002;
420 PGSR2 = 0x6021C000;
421 PGSR3 = 0x00020000;
422
423 return 0;
424}
425
426static int cmx2xx_resume(struct sys_device *dev)
427{
428 cmx2xx_pci_resume();
429
430 /* restore MSC registers */
431 MSC0 = sleep_save_msc[0];
432 MSC1 = sleep_save_msc[1];
433 MSC2 = sleep_save_msc[2];
434
435 return 0;
436}
437
438static struct sysdev_class cmx2xx_pm_sysclass = {
439 .name = "pm",
440 .resume = cmx2xx_resume,
441 .suspend = cmx2xx_suspend,
442};
443
444static struct sys_device cmx2xx_pm_device = {
445 .cls = &cmx2xx_pm_sysclass,
446};
447
448static int __init cmx2xx_pm_init(void)
449{
450 int error;
451 error = sysdev_class_register(&cmx2xx_pm_sysclass);
452 if (error == 0)
453 error = sysdev_register(&cmx2xx_pm_device);
454 return error;
455}
456#else
457static int __init cmx2xx_pm_init(void) { return 0; }
458#endif
459
460#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
461static void __init cmx2xx_init_ac97(void)
462{
463 pxa_set_ac97_info(NULL);
464}
465#else
466static inline void cmx2xx_init_ac97(void) {}
467#endif
468
469static void __init cmx2xx_init(void)
470{
471 cmx2xx_pm_init();
472
473 if (cpu_is_pxa25x())
474 cmx255_init();
475 else
476 cmx270_init();
477
478 cmx2xx_init_dm9000();
479 cmx2xx_init_display();
480 cmx2xx_init_ac97();
481 cmx2xx_init_touchscreen();
482 cmx2xx_init_leds();
483}
484
485static void __init cmx2xx_init_irq(void)
486{
487 pxa27x_init_irq();
488
489 if (cpu_is_pxa25x()) {
490 pxa25x_init_irq();
491 cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
492 } else {
493 pxa27x_init_irq();
494 cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
495 }
496}
497
498#ifdef CONFIG_PCI
499/* Map PCI companion statically */
500static struct map_desc cmx2xx_io_desc[] __initdata = {
501 [0] = { /* PCI bridge */
502 .virtual = CMX2XX_IT8152_VIRT,
503 .pfn = __phys_to_pfn(PXA_CS4_PHYS),
504 .length = SZ_64M,
505 .type = MT_DEVICE
506 },
507};
508
509static void __init cmx2xx_map_io(void)
510{
511 pxa_map_io();
512 iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));
513
514 it8152_base_address = CMX2XX_IT8152_VIRT;
515}
516#else
517static void __init cmx2xx_map_io(void)
518{
519 pxa_map_io();
520}
521#endif
522
523MACHINE_START(ARMCORE, "Compulab CM-X2XX")
524 .boot_params = 0xa0000100,
525 .phys_io = 0x40000000,
526 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
527 .map_io = cmx2xx_map_io,
528 .init_irq = cmx2xx_init_irq,
529 .timer = &pxa_timer,
530 .init_machine = cmx2xx_init,
531MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
new file mode 100644
index 000000000000..7bc5679b41ba
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -0,0 +1,473 @@
1/*
2 * linux/arch/arm/mach-pxa/cm-x300.c
3 *
4 * Support for the CompuLab CM-X300 modules
5 *
6 * Copyright (C) 2008 CompuLab Ltd.
7 *
8 * Mike Rapoport <mike@compulab.co.il>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/interrupt.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20
21#include <linux/gpio.h>
22#include <linux/dm9000.h>
23#include <linux/leds.h>
24
25#include <linux/i2c.h>
26#include <linux/i2c/pca953x.h>
27
28#include <asm/mach-types.h>
29#include <asm/mach/arch.h>
30
31#include <mach/mfp-pxa300.h>
32
33#include <mach/hardware.h>
34#include <mach/gpio.h>
35#include <mach/pxafb.h>
36#include <mach/mmc.h>
37#include <mach/ohci.h>
38#include <mach/i2c.h>
39#include <mach/pxa3xx_nand.h>
40
41#include <asm/mach/map.h>
42
43#include "generic.h"
44
45#define CM_X300_ETH_PHYS 0x08000010
46
47#define GPIO82_MMC2_IRQ (82)
48#define GPIO85_MMC2_WP (85)
49
50#define CM_X300_MMC2_IRQ IRQ_GPIO(GPIO82_MMC2_IRQ)
51
52static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = {
53 /* LCD */
54 GPIO54_LCD_LDD_0,
55 GPIO55_LCD_LDD_1,
56 GPIO56_LCD_LDD_2,
57 GPIO57_LCD_LDD_3,
58 GPIO58_LCD_LDD_4,
59 GPIO59_LCD_LDD_5,
60 GPIO60_LCD_LDD_6,
61 GPIO61_LCD_LDD_7,
62 GPIO62_LCD_LDD_8,
63 GPIO63_LCD_LDD_9,
64 GPIO64_LCD_LDD_10,
65 GPIO65_LCD_LDD_11,
66 GPIO66_LCD_LDD_12,
67 GPIO67_LCD_LDD_13,
68 GPIO68_LCD_LDD_14,
69 GPIO69_LCD_LDD_15,
70 GPIO72_LCD_FCLK,
71 GPIO73_LCD_LCLK,
72 GPIO74_LCD_PCLK,
73 GPIO75_LCD_BIAS,
74
75 /* BTUART */
76 GPIO111_UART2_RTS,
77 GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL,
78 GPIO113_UART2_TXD,
79 GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH,
80
81 /* STUART */
82 GPIO109_UART3_TXD,
83 GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL,
84
85 /* AC97 */
86 GPIO23_AC97_nACRESET,
87 GPIO24_AC97_SYSCLK,
88 GPIO29_AC97_BITCLK,
89 GPIO25_AC97_SDATA_IN_0,
90 GPIO27_AC97_SDATA_OUT,
91 GPIO28_AC97_SYNC,
92
93 /* Keypad */
94 GPIO115_KP_MKIN_0 | MFP_LPM_EDGE_BOTH,
95 GPIO116_KP_MKIN_1 | MFP_LPM_EDGE_BOTH,
96 GPIO117_KP_MKIN_2 | MFP_LPM_EDGE_BOTH,
97 GPIO118_KP_MKIN_3 | MFP_LPM_EDGE_BOTH,
98 GPIO119_KP_MKIN_4 | MFP_LPM_EDGE_BOTH,
99 GPIO120_KP_MKIN_5 | MFP_LPM_EDGE_BOTH,
100 GPIO2_2_KP_MKIN_6 | MFP_LPM_EDGE_BOTH,
101 GPIO3_2_KP_MKIN_7 | MFP_LPM_EDGE_BOTH,
102 GPIO121_KP_MKOUT_0,
103 GPIO122_KP_MKOUT_1,
104 GPIO123_KP_MKOUT_2,
105 GPIO124_KP_MKOUT_3,
106 GPIO125_KP_MKOUT_4,
107 GPIO4_2_KP_MKOUT_5,
108
109 /* MMC1 */
110 GPIO3_MMC1_DAT0,
111 GPIO4_MMC1_DAT1 | MFP_LPM_EDGE_BOTH,
112 GPIO5_MMC1_DAT2,
113 GPIO6_MMC1_DAT3,
114 GPIO7_MMC1_CLK,
115 GPIO8_MMC1_CMD, /* CMD0 for slot 0 */
116
117 /* MMC2 */
118 GPIO9_MMC2_DAT0,
119 GPIO10_MMC2_DAT1 | MFP_LPM_EDGE_BOTH,
120 GPIO11_MMC2_DAT2,
121 GPIO12_MMC2_DAT3,
122 GPIO13_MMC2_CLK,
123 GPIO14_MMC2_CMD,
124
125 /* FFUART */
126 GPIO30_UART1_RXD | MFP_LPM_EDGE_FALL,
127 GPIO31_UART1_TXD,
128 GPIO32_UART1_CTS,
129 GPIO37_UART1_RTS,
130 GPIO33_UART1_DCD,
131 GPIO34_UART1_DSR | MFP_LPM_EDGE_FALL,
132 GPIO35_UART1_RI,
133 GPIO36_UART1_DTR,
134
135 /* GPIOs */
136 GPIO79_GPIO, /* LED */
137 GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */
138 GPIO85_GPIO, /* MMC WP */
139 GPIO99_GPIO, /* Ethernet IRQ */
140};
141
142#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
143static struct resource dm9000_resources[] = {
144 [0] = {
145 .start = CM_X300_ETH_PHYS,
146 .end = CM_X300_ETH_PHYS + 0x3,
147 .flags = IORESOURCE_MEM,
148 },
149 [1] = {
150 .start = CM_X300_ETH_PHYS + 0x4,
151 .end = CM_X300_ETH_PHYS + 0x4 + 500,
152 .flags = IORESOURCE_MEM,
153 },
154 [2] = {
155 .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)),
156 .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)),
157 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
158 }
159};
160
161static struct dm9000_plat_data cm_x300_dm9000_platdata = {
162 .flags = DM9000_PLATF_16BITONLY,
163};
164
165static struct platform_device dm9000_device = {
166 .name = "dm9000",
167 .id = 0,
168 .num_resources = ARRAY_SIZE(dm9000_resources),
169 .resource = dm9000_resources,
170 .dev = {
171 .platform_data = &cm_x300_dm9000_platdata,
172 }
173
174};
175
176static void __init cm_x300_init_dm9000(void)
177{
178 platform_device_register(&dm9000_device);
179}
180#else
181static inline void cm_x300_init_dm9000(void) {}
182#endif
183
184#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
185static struct pxafb_mode_info cm_x300_lcd_modes[] = {
186 [0] = {
187 .pixclock = 38000,
188 .bpp = 16,
189 .xres = 480,
190 .yres = 640,
191 .hsync_len = 8,
192 .vsync_len = 2,
193 .left_margin = 8,
194 .upper_margin = 0,
195 .right_margin = 24,
196 .lower_margin = 4,
197 .cmap_greyscale = 0,
198 },
199 [1] = {
200 .pixclock = 153800,
201 .bpp = 16,
202 .xres = 240,
203 .yres = 320,
204 .hsync_len = 8,
205 .vsync_len = 2,
206 .left_margin = 8,
207 .upper_margin = 2,
208 .right_margin = 88,
209 .lower_margin = 2,
210 .cmap_greyscale = 0,
211 },
212};
213
214static struct pxafb_mach_info cm_x300_lcd = {
215 .modes = cm_x300_lcd_modes,
216 .num_modes = 2,
217 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
218};
219
220static void __init cm_x300_init_lcd(void)
221{
222 set_pxa_fb_info(&cm_x300_lcd);
223}
224#else
225static inline void cm_x300_init_lcd(void) {}
226#endif
227
228#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
229static struct mtd_partition cm_x300_nand_partitions[] = {
230 [0] = {
231 .name = "OBM",
232 .offset = 0,
233 .size = SZ_256K,
234 .mask_flags = MTD_WRITEABLE, /* force read-only */
235 },
236 [1] = {
237 .name = "U-Boot",
238 .offset = MTDPART_OFS_APPEND,
239 .size = SZ_256K,
240 .mask_flags = MTD_WRITEABLE, /* force read-only */
241 },
242 [2] = {
243 .name = "Environment",
244 .offset = MTDPART_OFS_APPEND,
245 .size = SZ_256K,
246 },
247 [3] = {
248 .name = "reserved",
249 .offset = MTDPART_OFS_APPEND,
250 .size = SZ_256K + SZ_1M,
251 .mask_flags = MTD_WRITEABLE, /* force read-only */
252 },
253 [4] = {
254 .name = "kernel",
255 .offset = MTDPART_OFS_APPEND,
256 .size = SZ_4M,
257 },
258 [5] = {
259 .name = "fs",
260 .offset = MTDPART_OFS_APPEND,
261 .size = MTDPART_SIZ_FULL,
262 },
263};
264
265static struct pxa3xx_nand_platform_data cm_x300_nand_info = {
266 .enable_arbiter = 1,
267 .parts = cm_x300_nand_partitions,
268 .nr_parts = ARRAY_SIZE(cm_x300_nand_partitions),
269};
270
271static void __init cm_x300_init_nand(void)
272{
273 pxa3xx_set_nand_info(&cm_x300_nand_info);
274}
275#else
276static inline void cm_x300_init_nand(void) {}
277#endif
278
279#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
280/* The first MMC slot of CM-X300 is hardwired to Libertas card and has
281 no detection/ro pins */
282static int cm_x300_mci_init(struct device *dev,
283 irq_handler_t cm_x300_detect_int,
284 void *data)
285{
286 return 0;
287}
288
289static void cm_x300_mci_exit(struct device *dev, void *data)
290{
291}
292
293static struct pxamci_platform_data cm_x300_mci_platform_data = {
294 .detect_delay = 20,
295 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
296 .init = cm_x300_mci_init,
297 .exit = cm_x300_mci_exit,
298};
299
300static int cm_x300_mci2_ro(struct device *dev)
301{
302 return gpio_get_value(GPIO85_MMC2_WP);
303}
304
305static int cm_x300_mci2_init(struct device *dev,
306 irq_handler_t cm_x300_detect_int,
307 void *data)
308{
309 int err;
310
311 /*
312 * setup GPIO for CM-X300 MMC controller
313 */
314 err = gpio_request(GPIO82_MMC2_IRQ, "mmc card detect");
315 if (err)
316 goto err_request_cd;
317 gpio_direction_input(GPIO82_MMC2_IRQ);
318
319 err = gpio_request(GPIO85_MMC2_WP, "mmc write protect");
320 if (err)
321 goto err_request_wp;
322 gpio_direction_input(GPIO85_MMC2_WP);
323
324 err = request_irq(CM_X300_MMC2_IRQ, cm_x300_detect_int,
325 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
326 "MMC card detect", data);
327 if (err) {
328 printk(KERN_ERR "%s: MMC/SD/SDIO: "
329 "can't request card detect IRQ\n", __func__);
330 goto err_request_irq;
331 }
332
333 return 0;
334
335err_request_irq:
336 gpio_free(GPIO85_MMC2_WP);
337err_request_wp:
338 gpio_free(GPIO82_MMC2_IRQ);
339err_request_cd:
340 return err;
341}
342
343static void cm_x300_mci2_exit(struct device *dev, void *data)
344{
345 free_irq(CM_X300_MMC2_IRQ, data);
346 gpio_free(GPIO82_MMC2_IRQ);
347 gpio_free(GPIO85_MMC2_WP);
348}
349
350static struct pxamci_platform_data cm_x300_mci2_platform_data = {
351 .detect_delay = 20,
352 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
353 .init = cm_x300_mci2_init,
354 .exit = cm_x300_mci2_exit,
355 .get_ro = cm_x300_mci2_ro,
356};
357
358static void __init cm_x300_init_mmc(void)
359{
360 pxa_set_mci_info(&cm_x300_mci_platform_data);
361 pxa3xx_set_mci2_info(&cm_x300_mci2_platform_data);
362}
363#else
364static inline void cm_x300_init_mmc(void) {}
365#endif
366
367#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
368static int cm_x300_ohci_init(struct device *dev)
369{
370 /* Set the Power Control Polarity Low */
371 UHCHR = (UHCHR | UHCHR_PCPL) &
372 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
373
374 return 0;
375}
376
377static struct pxaohci_platform_data cm_x300_ohci_platform_data = {
378 .port_mode = PMM_PERPORT_MODE,
379 .init = cm_x300_ohci_init,
380};
381static void __init cm_x300_init_ohci(void)
382{
383 pxa_set_ohci_info(&cm_x300_ohci_platform_data);
384}
385#else
386static inline void cm_x300_init_ohci(void) {}
387#endif
388
389#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
390static struct gpio_led cm_x300_leds[] = {
391 [0] = {
392 .name = "cm-x300:green",
393 .default_trigger = "heartbeat",
394 .gpio = 79,
395 .active_low = 1,
396 },
397};
398
399static struct gpio_led_platform_data cm_x300_gpio_led_pdata = {
400 .num_leds = ARRAY_SIZE(cm_x300_leds),
401 .leds = cm_x300_leds,
402};
403
404static struct platform_device cm_x300_led_device = {
405 .name = "leds-gpio",
406 .id = -1,
407 .dev = {
408 .platform_data = &cm_x300_gpio_led_pdata,
409 },
410};
411
412static void __init cm_x300_init_leds(void)
413{
414 platform_device_register(&cm_x300_led_device);
415}
416#else
417static inline void cm_x300_init_leds(void) {}
418#endif
419
420#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
421/* PCA9555 */
422static struct pca953x_platform_data cm_x300_gpio_ext_pdata_0 = {
423 .gpio_base = 128,
424};
425
426static struct pca953x_platform_data cm_x300_gpio_ext_pdata_1 = {
427 .gpio_base = 144,
428};
429
430static struct i2c_board_info cm_x300_gpio_ext_info[] = {
431 [0] = {
432 I2C_BOARD_INFO("pca9555", 0x24),
433 .platform_data = &cm_x300_gpio_ext_pdata_0,
434 },
435 [1] = {
436 I2C_BOARD_INFO("pca9555", 0x25),
437 .platform_data = &cm_x300_gpio_ext_pdata_1,
438 },
439};
440
441static void __init cm_x300_init_i2c(void)
442{
443 pxa_set_i2c_info(NULL);
444 i2c_register_board_info(0, cm_x300_gpio_ext_info,
445 ARRAY_SIZE(cm_x300_gpio_ext_info));
446}
447#else
448static inline void cm_x300_init_i2c(void) {}
449#endif
450
451static void __init cm_x300_init(void)
452{
453 /* board-processor specific GPIO initialization */
454 pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x300_mfp_cfg));
455
456 cm_x300_init_dm9000();
457 cm_x300_init_lcd();
458 cm_x300_init_ohci();
459 cm_x300_init_mmc();
460 cm_x300_init_nand();
461 cm_x300_init_leds();
462 cm_x300_init_i2c();
463}
464
465MACHINE_START(CM_X300, "CM-X300 module")
466 .phys_io = 0x40000000,
467 .boot_params = 0xa0000100,
468 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
469 .map_io = pxa_map_io,
470 .init_irq = pxa3xx_init_irq,
471 .timer = &pxa_timer,
472 .init_machine = cm_x300_init,
473MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri.c b/arch/arm/mach-pxa/colibri.c
index abce13c846c5..e8473624427e 100644
--- a/arch/arm/mach-pxa/colibri.c
+++ b/arch/arm/mach-pxa/colibri.c
@@ -29,12 +29,17 @@
29#include <asm/mach/irq.h> 29#include <asm/mach/irq.h>
30#include <asm/mach/flash.h> 30#include <asm/mach/flash.h>
31#include <mach/pxa-regs.h> 31#include <mach/pxa-regs.h>
32#include <mach/pxa2xx-gpio.h> 32#include <mach/mfp-pxa27x.h>
33#include <mach/colibri.h> 33#include <mach/colibri.h>
34 34
35#include "generic.h" 35#include "generic.h"
36#include "devices.h" 36#include "devices.h"
37 37
38static unsigned long colibri_pin_config[] __initdata = {
39 GPIO78_nCS_2, /* Ethernet CS */
40 GPIO114_GPIO, /* Ethernet IRQ */
41};
42
38/* 43/*
39 * Flash 44 * Flash
40 */ 45 */
@@ -116,9 +121,7 @@ static struct platform_device *colibri_devices[] __initdata = {
116 121
117static void __init colibri_init(void) 122static void __init colibri_init(void)
118{ 123{
119 /* DM9000 LAN */ 124 pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pin_config));
120 pxa_gpio_mode(GPIO78_nCS_2_MD);
121 pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
122 125
123 platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices)); 126 platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices));
124} 127}
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 123a950db466..5c08c4e9cd22 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -20,7 +20,11 @@
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/mmc/host.h> 21#include <linux/mmc/host.h>
22#include <linux/pm.h> 22#include <linux/pm.h>
23#include <linux/gpio.h>
23#include <linux/backlight.h> 24#include <linux/backlight.h>
25#include <linux/spi/spi.h>
26#include <linux/spi/ads7846.h>
27#include <linux/spi/corgi_lcd.h>
24#include <video/w100fb.h> 28#include <video/w100fb.h>
25 29
26#include <asm/setup.h> 30#include <asm/setup.h>
@@ -37,10 +41,12 @@
37 41
38#include <mach/pxa-regs.h> 42#include <mach/pxa-regs.h>
39#include <mach/pxa2xx-regs.h> 43#include <mach/pxa2xx-regs.h>
40#include <mach/pxa2xx-gpio.h> 44#include <mach/mfp-pxa25x.h>
45#include <mach/i2c.h>
41#include <mach/irda.h> 46#include <mach/irda.h>
42#include <mach/mmc.h> 47#include <mach/mmc.h>
43#include <mach/udc.h> 48#include <mach/udc.h>
49#include <mach/pxa2xx_spi.h>
44#include <mach/corgi.h> 50#include <mach/corgi.h>
45#include <mach/sharpsl.h> 51#include <mach/sharpsl.h>
46 52
@@ -51,6 +57,61 @@
51#include "devices.h" 57#include "devices.h"
52#include "sharpsl.h" 58#include "sharpsl.h"
53 59
60static unsigned long corgi_pin_config[] __initdata = {
61 /* Static Memory I/O */
62 GPIO78_nCS_2, /* w100fb */
63 GPIO80_nCS_4, /* scoop */
64
65 /* SSP1 */
66 GPIO23_SSP1_SCLK,
67 GPIO25_SSP1_TXD,
68 GPIO26_SSP1_RXD,
69 GPIO24_GPIO, /* CORGI_GPIO_ADS7846_CS - SFRM as chip select */
70
71 /* I2S */
72 GPIO28_I2S_BITCLK_OUT,
73 GPIO29_I2S_SDATA_IN,
74 GPIO30_I2S_SDATA_OUT,
75 GPIO31_I2S_SYNC,
76 GPIO32_I2S_SYSCLK,
77
78 /* Infra-Red */
79 GPIO47_FICP_TXD,
80 GPIO46_FICP_RXD,
81
82 /* FFUART */
83 GPIO40_FFUART_DTR,
84 GPIO41_FFUART_RTS,
85 GPIO39_FFUART_TXD,
86 GPIO37_FFUART_DSR,
87 GPIO34_FFUART_RXD,
88 GPIO35_FFUART_CTS,
89
90 /* PC Card */
91 GPIO48_nPOE,
92 GPIO49_nPWE,
93 GPIO50_nPIOR,
94 GPIO51_nPIOW,
95 GPIO52_nPCE_1,
96 GPIO53_nPCE_2,
97 GPIO54_nPSKTSEL,
98 GPIO55_nPREG,
99 GPIO56_nPWAIT,
100 GPIO57_nIOIS16,
101
102 /* MMC */
103 GPIO6_MMC_CLK,
104 GPIO8_MMC_CS0,
105
106 /* GPIO */
107 GPIO9_GPIO, /* CORGI_GPIO_nSD_DETECT */
108 GPIO7_GPIO, /* CORGI_GPIO_nSD_WP */
109 GPIO33_GPIO, /* CORGI_GPIO_SD_PWR */
110 GPIO22_GPIO, /* CORGI_GPIO_IR_ON */
111 GPIO44_GPIO, /* CORGI_GPIO_HSYNC */
112
113 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,
114};
54 115
55/* 116/*
56 * Corgi SCOOP Device 117 * Corgi SCOOP Device
@@ -66,6 +127,7 @@ static struct resource corgi_scoop_resources[] = {
66static struct scoop_config corgi_scoop_setup = { 127static struct scoop_config corgi_scoop_setup = {
67 .io_dir = CORGI_SCOOP_IO_DIR, 128 .io_dir = CORGI_SCOOP_IO_DIR,
68 .io_out = CORGI_SCOOP_IO_OUT, 129 .io_out = CORGI_SCOOP_IO_OUT,
130 .gpio_base = CORGI_SCOOP_GPIO_BASE,
69}; 131};
70 132
71struct platform_device corgiscoop_device = { 133struct platform_device corgiscoop_device = {
@@ -78,27 +140,6 @@ struct platform_device corgiscoop_device = {
78 .resource = corgi_scoop_resources, 140 .resource = corgi_scoop_resources,
79}; 141};
80 142
81static void corgi_pcmcia_init(void)
82{
83 /* Setup default state of GPIO outputs
84 before we enable them as outputs. */
85 GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
86 GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) |
87 GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO52_nPCE_1) |
88 GPIO_bit(GPIO53_nPCE_2);
89
90 pxa_gpio_mode(GPIO48_nPOE_MD);
91 pxa_gpio_mode(GPIO49_nPWE_MD);
92 pxa_gpio_mode(GPIO50_nPIOR_MD);
93 pxa_gpio_mode(GPIO51_nPIOW_MD);
94 pxa_gpio_mode(GPIO55_nPREG_MD);
95 pxa_gpio_mode(GPIO56_nPWAIT_MD);
96 pxa_gpio_mode(GPIO57_nIOIS16_MD);
97 pxa_gpio_mode(GPIO52_nPCE_1_MD);
98 pxa_gpio_mode(GPIO53_nPCE_2_MD);
99 pxa_gpio_mode(GPIO54_pSKTSEL_MD);
100}
101
102static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = { 143static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = {
103{ 144{
104 .dev = &corgiscoop_device.dev, 145 .dev = &corgiscoop_device.dev,
@@ -111,58 +152,10 @@ static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = {
111static struct scoop_pcmcia_config corgi_pcmcia_config = { 152static struct scoop_pcmcia_config corgi_pcmcia_config = {
112 .devs = &corgi_pcmcia_scoop[0], 153 .devs = &corgi_pcmcia_scoop[0],
113 .num_devs = 1, 154 .num_devs = 1,
114 .pcmcia_init = corgi_pcmcia_init,
115}; 155};
116 156
117EXPORT_SYMBOL(corgiscoop_device); 157EXPORT_SYMBOL(corgiscoop_device);
118 158
119
120/*
121 * Corgi SSP Device
122 *
123 * Set the parent as the scoop device because a lot of SSP devices
124 * also use scoop functions and this makes the power up/down order
125 * work correctly.
126 */
127struct platform_device corgissp_device = {
128 .name = "corgi-ssp",
129 .dev = {
130 .parent = &corgiscoop_device.dev,
131 },
132 .id = -1,
133};
134
135struct corgissp_machinfo corgi_ssp_machinfo = {
136 .port = 1,
137 .cs_lcdcon = CORGI_GPIO_LCDCON_CS,
138 .cs_ads7846 = CORGI_GPIO_ADS7846_CS,
139 .cs_max1111 = CORGI_GPIO_MAX1111_CS,
140 .clk_lcdcon = 76,
141 .clk_ads7846 = 2,
142 .clk_max1111 = 8,
143};
144
145
146/*
147 * LCD/Framebuffer
148 */
149static void w100_lcdtg_suspend(struct w100fb_par *par)
150{
151 corgi_lcdtg_suspend();
152}
153
154static void w100_lcdtg_init(struct w100fb_par *par)
155{
156 corgi_lcdtg_hw_init(par->xres);
157}
158
159
160static struct w100_tg_info corgi_lcdtg_info = {
161 .change = w100_lcdtg_init,
162 .suspend = w100_lcdtg_suspend,
163 .resume = w100_lcdtg_init,
164};
165
166static struct w100_mem_info corgi_fb_mem = { 159static struct w100_mem_info corgi_fb_mem = {
167 .ext_cntl = 0x00040003, 160 .ext_cntl = 0x00040003,
168 .sdram_mode_reg = 0x00650021, 161 .sdram_mode_reg = 0x00650021,
@@ -241,7 +234,6 @@ static struct w100_mode corgi_fb_modes[] = {
241}; 234};
242 235
243static struct w100fb_mach_info corgi_fb_info = { 236static struct w100fb_mach_info corgi_fb_info = {
244 .tg = &corgi_lcdtg_info,
245 .init_mode = INIT_MODE_ROTATED, 237 .init_mode = INIT_MODE_ROTATED,
246 .mem = &corgi_fb_mem, 238 .mem = &corgi_fb_mem,
247 .regs = &corgi_fb_regs, 239 .regs = &corgi_fb_regs,
@@ -267,60 +259,10 @@ static struct platform_device corgifb_device = {
267 .resource = corgi_fb_resources, 259 .resource = corgi_fb_resources,
268 .dev = { 260 .dev = {
269 .platform_data = &corgi_fb_info, 261 .platform_data = &corgi_fb_info,
270 .parent = &corgissp_device.dev,
271 }, 262 },
272 263
273}; 264};
274 265
275
276/*
277 * Corgi Backlight Device
278 */
279static void corgi_bl_kick_battery(void)
280{
281 void (*kick_batt)(void);
282
283 kick_batt = symbol_get(sharpsl_battery_kick);
284 if (kick_batt) {
285 kick_batt();
286 symbol_put(sharpsl_battery_kick);
287 }
288}
289
290static void corgi_bl_set_intensity(int intensity)
291{
292 if (intensity > 0x10)
293 intensity += 0x10;
294
295 /* Bits 0-4 are accessed via the SSP interface */
296 corgi_ssp_blduty_set(intensity & 0x1f);
297
298 /* Bit 5 is via SCOOP */
299 if (intensity & 0x0020)
300 set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT);
301 else
302 reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT);
303}
304
305static struct generic_bl_info corgi_bl_machinfo = {
306 .name = "corgi-bl",
307 .max_intensity = 0x2f,
308 .default_intensity = 0x1f,
309 .limit_mask = 0x0b,
310 .set_bl_intensity = corgi_bl_set_intensity,
311 .kick_battery = corgi_bl_kick_battery,
312};
313
314static struct platform_device corgibl_device = {
315 .name = "generic-bl",
316 .dev = {
317 .parent = &corgifb_device.dev,
318 .platform_data = &corgi_bl_machinfo,
319 },
320 .id = -1,
321};
322
323
324/* 266/*
325 * Corgi Keyboard Device 267 * Corgi Keyboard Device
326 */ 268 */
@@ -329,75 +271,35 @@ static struct platform_device corgikbd_device = {
329 .id = -1, 271 .id = -1,
330}; 272};
331 273
332
333/* 274/*
334 * Corgi LEDs 275 * Corgi LEDs
335 */ 276 */
336static struct platform_device corgiled_device = { 277static struct gpio_led corgi_gpio_leds[] = {
337 .name = "corgi-led", 278 {
338 .id = -1, 279 .name = "corgi:amber:charge",
339}; 280 .default_trigger = "sharpsl-charge",
340 281 .gpio = CORGI_GPIO_LED_ORANGE,
341 282 },
342/* 283 {
343 * Corgi Touch Screen Device 284 .name = "corgi:green:mail",
344 */ 285 .default_trigger = "nand-disk",
345static unsigned long (*get_hsync_invperiod)(struct device *dev); 286 .gpio = CORGI_GPIO_LED_GREEN,
346
347static void inline sharpsl_wait_sync(int gpio)
348{
349 while((GPLR(gpio) & GPIO_bit(gpio)) == 0);
350 while((GPLR(gpio) & GPIO_bit(gpio)) != 0);
351}
352
353static unsigned long corgi_get_hsync_invperiod(void)
354{
355 if (!get_hsync_invperiod)
356 get_hsync_invperiod = symbol_get(w100fb_get_hsynclen);
357 if (!get_hsync_invperiod)
358 return 0;
359
360 return get_hsync_invperiod(&corgifb_device.dev);
361}
362
363static void corgi_put_hsync(void)
364{
365 if (get_hsync_invperiod)
366 symbol_put(w100fb_get_hsynclen);
367 get_hsync_invperiod = NULL;
368}
369
370static void corgi_wait_hsync(void)
371{
372 sharpsl_wait_sync(CORGI_GPIO_HSYNC);
373}
374
375static struct resource corgits_resources[] = {
376 [0] = {
377 .start = CORGI_IRQ_GPIO_TP_INT,
378 .end = CORGI_IRQ_GPIO_TP_INT,
379 .flags = IORESOURCE_IRQ,
380 }, 287 },
381}; 288};
382 289
383static struct corgits_machinfo corgi_ts_machinfo = { 290static struct gpio_led_platform_data corgi_gpio_leds_info = {
384 .get_hsync_invperiod = corgi_get_hsync_invperiod, 291 .leds = corgi_gpio_leds,
385 .put_hsync = corgi_put_hsync, 292 .num_leds = ARRAY_SIZE(corgi_gpio_leds),
386 .wait_hsync = corgi_wait_hsync,
387}; 293};
388 294
389static struct platform_device corgits_device = { 295static struct platform_device corgiled_device = {
390 .name = "corgi-ts", 296 .name = "leds-gpio",
297 .id = -1,
391 .dev = { 298 .dev = {
392 .parent = &corgissp_device.dev, 299 .platform_data = &corgi_gpio_leds_info,
393 .platform_data = &corgi_ts_machinfo,
394 }, 300 },
395 .id = -1,
396 .num_resources = ARRAY_SIZE(corgits_resources),
397 .resource = corgits_resources,
398}; 301};
399 302
400
401/* 303/*
402 * MMC/SD Device 304 * MMC/SD Device
403 * 305 *
@@ -410,20 +312,42 @@ static int corgi_mci_init(struct device *dev, irq_handler_t corgi_detect_int, vo
410{ 312{
411 int err; 313 int err;
412 314
413 /* setup GPIO for PXA25x MMC controller */ 315 err = gpio_request(CORGI_GPIO_nSD_DETECT, "nSD_DETECT");
414 pxa_gpio_mode(GPIO6_MMCCLK_MD); 316 if (err)
415 pxa_gpio_mode(GPIO8_MMCCS0_MD); 317 goto err_out;
416 pxa_gpio_mode(CORGI_GPIO_nSD_DETECT | GPIO_IN);
417 pxa_gpio_mode(CORGI_GPIO_SD_PWR | GPIO_OUT);
418 318
419 corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250); 319 err = gpio_request(CORGI_GPIO_nSD_WP, "nSD_WP");
320 if (err)
321 goto err_free_1;
420 322
421 err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int, 323 err = gpio_request(CORGI_GPIO_SD_PWR, "SD_PWR");
422 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
423 "MMC card detect", data);
424 if (err) 324 if (err)
425 printk(KERN_ERR "corgi_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 325 goto err_free_2;
426 326
327 gpio_direction_input(CORGI_GPIO_nSD_DETECT);
328 gpio_direction_input(CORGI_GPIO_nSD_WP);
329 gpio_direction_output(CORGI_GPIO_SD_PWR, 0);
330
331 corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250);
332
333 err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int,
334 IRQF_DISABLED | IRQF_TRIGGER_RISING |
335 IRQF_TRIGGER_FALLING,
336 "MMC card detect", data);
337 if (err) {
338 pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n",
339 __func__);
340 goto err_free_3;
341 }
342 return 0;
343
344err_free_3:
345 gpio_free(CORGI_GPIO_SD_PWR);
346err_free_2:
347 gpio_free(CORGI_GPIO_nSD_WP);
348err_free_1:
349 gpio_free(CORGI_GPIO_nSD_DETECT);
350err_out:
427 return err; 351 return err;
428} 352}
429 353
@@ -431,20 +355,20 @@ static void corgi_mci_setpower(struct device *dev, unsigned int vdd)
431{ 355{
432 struct pxamci_platform_data* p_d = dev->platform_data; 356 struct pxamci_platform_data* p_d = dev->platform_data;
433 357
434 if (( 1 << vdd) & p_d->ocr_mask) 358 gpio_set_value(CORGI_GPIO_SD_PWR, ((1 << vdd) & p_d->ocr_mask));
435 GPSR1 = GPIO_bit(CORGI_GPIO_SD_PWR);
436 else
437 GPCR1 = GPIO_bit(CORGI_GPIO_SD_PWR);
438} 359}
439 360
440static int corgi_mci_get_ro(struct device *dev) 361static int corgi_mci_get_ro(struct device *dev)
441{ 362{
442 return GPLR(CORGI_GPIO_nSD_WP) & GPIO_bit(CORGI_GPIO_nSD_WP); 363 return gpio_get_value(CORGI_GPIO_nSD_WP);
443} 364}
444 365
445static void corgi_mci_exit(struct device *dev, void *data) 366static void corgi_mci_exit(struct device *dev, void *data)
446{ 367{
447 free_irq(CORGI_IRQ_GPIO_nSD_DETECT, data); 368 free_irq(CORGI_IRQ_GPIO_nSD_DETECT, data);
369 gpio_free(CORGI_GPIO_SD_PWR);
370 gpio_free(CORGI_GPIO_nSD_WP);
371 gpio_free(CORGI_GPIO_nSD_DETECT);
448} 372}
449 373
450static struct pxamci_platform_data corgi_mci_platform_data = { 374static struct pxamci_platform_data corgi_mci_platform_data = {
@@ -461,16 +385,32 @@ static struct pxamci_platform_data corgi_mci_platform_data = {
461 */ 385 */
462static void corgi_irda_transceiver_mode(struct device *dev, int mode) 386static void corgi_irda_transceiver_mode(struct device *dev, int mode)
463{ 387{
464 if (mode & IR_OFF) 388 gpio_set_value(CORGI_GPIO_IR_ON, mode & IR_OFF);
465 GPSR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON);
466 else
467 GPCR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON);
468 pxa2xx_transceiver_mode(dev, mode); 389 pxa2xx_transceiver_mode(dev, mode);
469} 390}
470 391
392static int corgi_irda_startup(struct device *dev)
393{
394 int err;
395
396 err = gpio_request(CORGI_GPIO_IR_ON, "IR_ON");
397 if (err)
398 return err;
399
400 gpio_direction_output(CORGI_GPIO_IR_ON, 1);
401 return 0;
402}
403
404static void corgi_irda_shutdown(struct device *dev)
405{
406 gpio_free(CORGI_GPIO_IR_ON);
407}
408
471static struct pxaficp_platform_data corgi_ficp_platform_data = { 409static struct pxaficp_platform_data corgi_ficp_platform_data = {
472 .transceiver_cap = IR_SIRMODE | IR_OFF, 410 .transceiver_cap = IR_SIRMODE | IR_OFF,
473 .transceiver_mode = corgi_irda_transceiver_mode, 411 .transceiver_mode = corgi_irda_transceiver_mode,
412 .startup = corgi_irda_startup,
413 .shutdown = corgi_irda_shutdown,
474}; 414};
475 415
476 416
@@ -482,14 +422,129 @@ static struct pxa2xx_udc_mach_info udc_info __initdata = {
482 .gpio_pullup = CORGI_GPIO_USB_PULLUP, 422 .gpio_pullup = CORGI_GPIO_USB_PULLUP,
483}; 423};
484 424
425#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MASTER)
426static struct pxa2xx_spi_master corgi_spi_info = {
427 .num_chipselect = 3,
428};
429
430static struct ads7846_platform_data corgi_ads7846_info = {
431 .model = 7846,
432 .vref_delay_usecs = 100,
433 .x_plate_ohms = 419,
434 .y_plate_ohms = 486,
435 .gpio_pendown = CORGI_GPIO_TP_INT,
436};
437
438static void corgi_ads7846_cs(u32 command)
439{
440 gpio_set_value(CORGI_GPIO_ADS7846_CS, !(command == PXA2XX_CS_ASSERT));
441}
442
443static struct pxa2xx_spi_chip corgi_ads7846_chip = {
444 .cs_control = corgi_ads7846_cs,
445};
446
447static void corgi_bl_kick_battery(void)
448{
449 void (*kick_batt)(void);
450
451 kick_batt = symbol_get(sharpsl_battery_kick);
452 if (kick_batt) {
453 kick_batt();
454 symbol_put(sharpsl_battery_kick);
455 }
456}
457
458static struct corgi_lcd_platform_data corgi_lcdcon_info = {
459 .init_mode = CORGI_LCD_MODE_VGA,
460 .max_intensity = 0x2f,
461 .default_intensity = 0x1f,
462 .limit_mask = 0x0b,
463 .gpio_backlight_cont = CORGI_GPIO_BACKLIGHT_CONT,
464 .gpio_backlight_on = -1,
465 .kick_battery = corgi_bl_kick_battery,
466};
467
468static void corgi_lcdcon_cs(u32 command)
469{
470 gpio_set_value(CORGI_GPIO_LCDCON_CS, !(command == PXA2XX_CS_ASSERT));
471}
472
473static struct pxa2xx_spi_chip corgi_lcdcon_chip = {
474 .cs_control = corgi_lcdcon_cs,
475};
476
477static void corgi_max1111_cs(u32 command)
478{
479 gpio_set_value(CORGI_GPIO_MAX1111_CS, !(command == PXA2XX_CS_ASSERT));
480}
481
482static struct pxa2xx_spi_chip corgi_max1111_chip = {
483 .cs_control = corgi_max1111_cs,
484};
485
486static struct spi_board_info corgi_spi_devices[] = {
487 {
488 .modalias = "ads7846",
489 .max_speed_hz = 1200000,
490 .bus_num = 1,
491 .chip_select = 0,
492 .platform_data = &corgi_ads7846_info,
493 .controller_data= &corgi_ads7846_chip,
494 .irq = gpio_to_irq(CORGI_GPIO_TP_INT),
495 }, {
496 .modalias = "corgi-lcd",
497 .max_speed_hz = 50000,
498 .bus_num = 1,
499 .chip_select = 1,
500 .platform_data = &corgi_lcdcon_info,
501 .controller_data= &corgi_lcdcon_chip,
502 }, {
503 .modalias = "max1111",
504 .max_speed_hz = 450000,
505 .bus_num = 1,
506 .chip_select = 2,
507 .controller_data= &corgi_max1111_chip,
508 },
509};
510
511static void __init corgi_init_spi(void)
512{
513 int err;
514
515 err = gpio_request(CORGI_GPIO_ADS7846_CS, "ADS7846_CS");
516 if (err)
517 return;
518
519 err = gpio_request(CORGI_GPIO_LCDCON_CS, "LCDCON_CS");
520 if (err)
521 goto err_free_1;
522
523 err = gpio_request(CORGI_GPIO_MAX1111_CS, "MAX1111_CS");
524 if (err)
525 goto err_free_2;
526
527 gpio_direction_output(CORGI_GPIO_ADS7846_CS, 1);
528 gpio_direction_output(CORGI_GPIO_LCDCON_CS, 1);
529 gpio_direction_output(CORGI_GPIO_MAX1111_CS, 1);
530
531 pxa2xx_set_spi_info(1, &corgi_spi_info);
532 spi_register_board_info(ARRAY_AND_SIZE(corgi_spi_devices));
533 return;
534
535err_free_2:
536 gpio_free(CORGI_GPIO_LCDCON_CS);
537err_free_1:
538 gpio_free(CORGI_GPIO_ADS7846_CS);
539}
540#else
541static inline void corgi_init_spi(void) {}
542#endif
485 543
486static struct platform_device *devices[] __initdata = { 544static struct platform_device *devices[] __initdata = {
487 &corgiscoop_device, 545 &corgiscoop_device,
488 &corgissp_device,
489 &corgifb_device, 546 &corgifb_device,
490 &corgikbd_device, 547 &corgikbd_device,
491 &corgibl_device,
492 &corgits_device,
493 &corgiled_device, 548 &corgiled_device,
494}; 549};
495 550
@@ -497,7 +552,8 @@ static void corgi_poweroff(void)
497{ 552{
498 if (!machine_is_corgi()) 553 if (!machine_is_corgi())
499 /* Green LED off tells the bootloader to halt */ 554 /* Green LED off tells the bootloader to halt */
500 reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); 555 gpio_set_value(CORGI_GPIO_LED_GREEN, 0);
556
501 arm_machine_restart('h'); 557 arm_machine_restart('h');
502} 558}
503 559
@@ -505,7 +561,8 @@ static void corgi_restart(char mode)
505{ 561{
506 if (!machine_is_corgi()) 562 if (!machine_is_corgi())
507 /* Green LED on tells the bootloader to reboot */ 563 /* Green LED on tells the bootloader to reboot */
508 set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); 564 gpio_set_value(CORGI_GPIO_LED_GREEN, 1);
565
509 arm_machine_restart('h'); 566 arm_machine_restart('h');
510} 567}
511 568
@@ -514,24 +571,17 @@ static void __init corgi_init(void)
514 pm_power_off = corgi_poweroff; 571 pm_power_off = corgi_poweroff;
515 arm_pm_restart = corgi_restart; 572 arm_pm_restart = corgi_restart;
516 573
517 /* setup sleep mode values */
518 PWER = 0x00000002;
519 PFER = 0x00000000;
520 PRER = 0x00000002;
521 PGSR0 = 0x0158C000;
522 PGSR1 = 0x00FF0080;
523 PGSR2 = 0x0001C004;
524 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ 574 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
525 PCFR |= PCFR_OPDE; 575 PCFR |= PCFR_OPDE;
526 576
527 corgi_ssp_set_machinfo(&corgi_ssp_machinfo); 577 pxa2xx_mfp_config(ARRAY_AND_SIZE(corgi_pin_config));
528 578
529 pxa_gpio_mode(CORGI_GPIO_IR_ON | GPIO_OUT); 579 corgi_init_spi();
530 pxa_gpio_mode(CORGI_GPIO_HSYNC | GPIO_IN);
531 580
532 pxa_set_udc_info(&udc_info); 581 pxa_set_udc_info(&udc_info);
533 pxa_set_mci_info(&corgi_mci_platform_data); 582 pxa_set_mci_info(&corgi_mci_platform_data);
534 pxa_set_ficp_info(&corgi_ficp_platform_data); 583 pxa_set_ficp_info(&corgi_ficp_platform_data);
584 pxa_set_i2c_info(NULL);
535 585
536 platform_scoop_config = &corgi_pcmcia_config; 586 platform_scoop_config = &corgi_pcmcia_config;
537 587
diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c
deleted file mode 100644
index 311baf149b07..000000000000
--- a/arch/arm/mach-pxa/corgi_lcd.c
+++ /dev/null
@@ -1,290 +0,0 @@
1/*
2 * linux/arch/arm/mach-pxa/corgi_lcd.c
3 *
4 * Corgi/Spitz LCD Specific Code
5 *
6 * Copyright (C) 2005 Richard Purdie
7 *
8 * Connectivity:
9 * Corgi - LCD to ATI Imageon w100 (Wallaby)
10 * Spitz - LCD to PXA Framebuffer
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 */
17
18#include <linux/delay.h>
19#include <linux/kernel.h>
20#include <linux/platform_device.h>
21#include <linux/module.h>
22#include <linux/string.h>
23#include <mach/akita.h>
24#include <mach/corgi.h>
25#include <mach/hardware.h>
26#include <mach/pxa-regs.h>
27#include <mach/sharpsl.h>
28#include <mach/spitz.h>
29#include <asm/hardware/scoop.h>
30#include <asm/mach/sharpsl_param.h>
31#include "generic.h"
32
33/* Register Addresses */
34#define RESCTL_ADRS 0x00
35#define PHACTRL_ADRS 0x01
36#define DUTYCTRL_ADRS 0x02
37#define POWERREG0_ADRS 0x03
38#define POWERREG1_ADRS 0x04
39#define GPOR3_ADRS 0x05
40#define PICTRL_ADRS 0x06
41#define POLCTRL_ADRS 0x07
42
43/* Register Bit Definitions */
44#define RESCTL_QVGA 0x01
45#define RESCTL_VGA 0x00
46
47#define POWER1_VW_ON 0x01 /* VW Supply FET ON */
48#define POWER1_GVSS_ON 0x02 /* GVSS(-8V) Power Supply ON */
49#define POWER1_VDD_ON 0x04 /* VDD(8V),SVSS(-4V) Power Supply ON */
50
51#define POWER1_VW_OFF 0x00 /* VW Supply FET OFF */
52#define POWER1_GVSS_OFF 0x00 /* GVSS(-8V) Power Supply OFF */
53#define POWER1_VDD_OFF 0x00 /* VDD(8V),SVSS(-4V) Power Supply OFF */
54
55#define POWER0_COM_DCLK 0x01 /* COM Voltage DC Bias DAC Serial Data Clock */
56#define POWER0_COM_DOUT 0x02 /* COM Voltage DC Bias DAC Serial Data Out */
57#define POWER0_DAC_ON 0x04 /* DAC Power Supply ON */
58#define POWER0_COM_ON 0x08 /* COM Power Supply ON */
59#define POWER0_VCC5_ON 0x10 /* VCC5 Power Supply ON */
60
61#define POWER0_DAC_OFF 0x00 /* DAC Power Supply OFF */
62#define POWER0_COM_OFF 0x00 /* COM Power Supply OFF */
63#define POWER0_VCC5_OFF 0x00 /* VCC5 Power Supply OFF */
64
65#define PICTRL_INIT_STATE 0x01
66#define PICTRL_INIOFF 0x02
67#define PICTRL_POWER_DOWN 0x04
68#define PICTRL_COM_SIGNAL_OFF 0x08
69#define PICTRL_DAC_SIGNAL_OFF 0x10
70
71#define POLCTRL_SYNC_POL_FALL 0x01
72#define POLCTRL_EN_POL_FALL 0x02
73#define POLCTRL_DATA_POL_FALL 0x04
74#define POLCTRL_SYNC_ACT_H 0x08
75#define POLCTRL_EN_ACT_L 0x10
76
77#define POLCTRL_SYNC_POL_RISE 0x00
78#define POLCTRL_EN_POL_RISE 0x00
79#define POLCTRL_DATA_POL_RISE 0x00
80#define POLCTRL_SYNC_ACT_L 0x00
81#define POLCTRL_EN_ACT_H 0x00
82
83#define PHACTRL_PHASE_MANUAL 0x01
84#define DEFAULT_PHAD_QVGA (9)
85#define DEFAULT_COMADJ (125)
86
87/*
88 * This is only a psuedo I2C interface. We can't use the standard kernel
89 * routines as the interface is write only. We just assume the data is acked...
90 */
91static void lcdtg_ssp_i2c_send(u8 data)
92{
93 corgi_ssp_lcdtg_send(POWERREG0_ADRS, data);
94 udelay(10);
95}
96
97static void lcdtg_i2c_send_bit(u8 data)
98{
99 lcdtg_ssp_i2c_send(data);
100 lcdtg_ssp_i2c_send(data | POWER0_COM_DCLK);
101 lcdtg_ssp_i2c_send(data);
102}
103
104static void lcdtg_i2c_send_start(u8 base)
105{
106 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT);
107 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK);
108 lcdtg_ssp_i2c_send(base);
109}
110
111static void lcdtg_i2c_send_stop(u8 base)
112{
113 lcdtg_ssp_i2c_send(base);
114 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK);
115 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT);
116}
117
118static void lcdtg_i2c_send_byte(u8 base, u8 data)
119{
120 int i;
121 for (i = 0; i < 8; i++) {
122 if (data & 0x80)
123 lcdtg_i2c_send_bit(base | POWER0_COM_DOUT);
124 else
125 lcdtg_i2c_send_bit(base);
126 data <<= 1;
127 }
128}
129
130static void lcdtg_i2c_wait_ack(u8 base)
131{
132 lcdtg_i2c_send_bit(base);
133}
134
135static void lcdtg_set_common_voltage(u8 base_data, u8 data)
136{
137 /* Set Common Voltage to M62332FP via I2C */
138 lcdtg_i2c_send_start(base_data);
139 lcdtg_i2c_send_byte(base_data, 0x9c);
140 lcdtg_i2c_wait_ack(base_data);
141 lcdtg_i2c_send_byte(base_data, 0x00);
142 lcdtg_i2c_wait_ack(base_data);
143 lcdtg_i2c_send_byte(base_data, data);
144 lcdtg_i2c_wait_ack(base_data);
145 lcdtg_i2c_send_stop(base_data);
146}
147
148/* Set Phase Adjust */
149static void lcdtg_set_phadadj(int mode)
150{
151 int adj;
152 switch(mode) {
153 case 480:
154 case 640:
155 /* Setting for VGA */
156 adj = sharpsl_param.phadadj;
157 if (adj < 0) {
158 adj = PHACTRL_PHASE_MANUAL;
159 } else {
160 adj = ((adj & 0x0f) << 1) | PHACTRL_PHASE_MANUAL;
161 }
162 break;
163 case 240:
164 case 320:
165 default:
166 /* Setting for QVGA */
167 adj = (DEFAULT_PHAD_QVGA << 1) | PHACTRL_PHASE_MANUAL;
168 break;
169 }
170
171 corgi_ssp_lcdtg_send(PHACTRL_ADRS, adj);
172}
173
174static int lcd_inited;
175
176void corgi_lcdtg_hw_init(int mode)
177{
178 if (!lcd_inited) {
179 int comadj;
180
181 /* Initialize Internal Logic & Port */
182 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_POWER_DOWN | PICTRL_INIOFF | PICTRL_INIT_STATE
183 | PICTRL_COM_SIGNAL_OFF | PICTRL_DAC_SIGNAL_OFF);
184
185 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_OFF
186 | POWER0_COM_OFF | POWER0_VCC5_OFF);
187
188 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);
189
190 /* VDD(+8V), SVSS(-4V) ON */
191 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
192 mdelay(3);
193
194 /* DAC ON */
195 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON
196 | POWER0_COM_OFF | POWER0_VCC5_OFF);
197
198 /* INIB = H, INI = L */
199 /* PICTL[0] = H , PICTL[1] = PICTL[2] = PICTL[4] = L */
200 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE | PICTRL_COM_SIGNAL_OFF);
201
202 /* Set Common Voltage */
203 comadj = sharpsl_param.comadj;
204 if (comadj < 0)
205 comadj = DEFAULT_COMADJ;
206 lcdtg_set_common_voltage((POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF), comadj);
207
208 /* VCC5 ON, DAC ON */
209 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON |
210 POWER0_COM_OFF | POWER0_VCC5_ON);
211
212 /* GVSS(-8V) ON, VDD ON */
213 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
214 mdelay(2);
215
216 /* COM SIGNAL ON (PICTL[3] = L) */
217 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE);
218
219 /* COM ON, DAC ON, VCC5_ON */
220 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON
221 | POWER0_COM_ON | POWER0_VCC5_ON);
222
223 /* VW ON, GVSS ON, VDD ON */
224 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_ON | POWER1_GVSS_ON | POWER1_VDD_ON);
225
226 /* Signals output enable */
227 corgi_ssp_lcdtg_send(PICTRL_ADRS, 0);
228
229 /* Set Phase Adjust */
230 lcdtg_set_phadadj(mode);
231
232 /* Initialize for Input Signals from ATI */
233 corgi_ssp_lcdtg_send(POLCTRL_ADRS, POLCTRL_SYNC_POL_RISE | POLCTRL_EN_POL_RISE
234 | POLCTRL_DATA_POL_RISE | POLCTRL_SYNC_ACT_L | POLCTRL_EN_ACT_H);
235 udelay(1000);
236
237 lcd_inited=1;
238 } else {
239 lcdtg_set_phadadj(mode);
240 }
241
242 switch(mode) {
243 case 480:
244 case 640:
245 /* Set Lcd Resolution (VGA) */
246 corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_VGA);
247 break;
248 case 240:
249 case 320:
250 default:
251 /* Set Lcd Resolution (QVGA) */
252 corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_QVGA);
253 break;
254 }
255}
256
257void corgi_lcdtg_suspend(void)
258{
259 /* 60Hz x 2 frame = 16.7msec x 2 = 33.4 msec */
260 mdelay(34);
261
262 /* (1)VW OFF */
263 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
264
265 /* (2)COM OFF */
266 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_COM_SIGNAL_OFF);
267 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON);
268
269 /* (3)Set Common Voltage Bias 0V */
270 lcdtg_set_common_voltage(POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON, 0);
271
272 /* (4)GVSS OFF */
273 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
274
275 /* (5)VCC5 OFF */
276 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF);
277
278 /* (6)Set PDWN, INIOFF, DACOFF */
279 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIOFF | PICTRL_DAC_SIGNAL_OFF |
280 PICTRL_POWER_DOWN | PICTRL_COM_SIGNAL_OFF);
281
282 /* (7)DAC OFF */
283 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_OFF | POWER0_COM_OFF | POWER0_VCC5_OFF);
284
285 /* (8)VDD OFF */
286 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);
287
288 lcd_inited = 0;
289}
290
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 35bbfccd2df3..eb7d6c94aa42 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -21,7 +21,6 @@
21#include <asm/irq.h> 21#include <asm/irq.h>
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm/hardware/scoop.h>
25 24
26#include <mach/sharpsl.h> 25#include <mach/sharpsl.h>
27#include <mach/corgi.h> 26#include <mach/corgi.h>
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c
deleted file mode 100644
index 8e2f2215c4ba..000000000000
--- a/arch/arm/mach-pxa/corgi_ssp.c
+++ /dev/null
@@ -1,276 +0,0 @@
1/*
2 * SSP control code for Sharp Corgi devices
3 *
4 * Copyright (c) 2004-2005 Richard Purdie
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/sched.h>
16#include <linux/slab.h>
17#include <linux/delay.h>
18#include <linux/platform_device.h>
19#include <mach/hardware.h>
20#include <asm/mach-types.h>
21
22#include <mach/ssp.h>
23#include <mach/pxa-regs.h>
24#include <mach/pxa2xx-gpio.h>
25#include <mach/regs-ssp.h>
26#include "sharpsl.h"
27
28static DEFINE_SPINLOCK(corgi_ssp_lock);
29static struct ssp_dev corgi_ssp_dev;
30static struct ssp_state corgi_ssp_state;
31static struct corgissp_machinfo *ssp_machinfo;
32
33/*
34 * There are three devices connected to the SSP interface:
35 * 1. A touchscreen controller (TI ADS7846 compatible)
36 * 2. An LCD controller (with some Backlight functionality)
37 * 3. A battery monitoring IC (Maxim MAX1111)
38 *
39 * Each device uses a different speed/mode of communication.
40 *
41 * The touchscreen is very sensitive and the most frequently used
42 * so the port is left configured for this.
43 *
44 * Devices are selected using Chip Selects on GPIOs.
45 */
46
47/*
48 * ADS7846 Routines
49 */
50unsigned long corgi_ssp_ads7846_putget(ulong data)
51{
52 unsigned long flag;
53 u32 ret = 0;
54
55 spin_lock_irqsave(&corgi_ssp_lock, flag);
56 if (ssp_machinfo->cs_ads7846 >= 0)
57 GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
58
59 ssp_write_word(&corgi_ssp_dev,data);
60 ssp_read_word(&corgi_ssp_dev, &ret);
61
62 if (ssp_machinfo->cs_ads7846 >= 0)
63 GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
64 spin_unlock_irqrestore(&corgi_ssp_lock, flag);
65
66 return ret;
67}
68
69/*
70 * NOTE: These functions should always be called in interrupt context
71 * and use the _lock and _unlock functions. They are very time sensitive.
72 */
73void corgi_ssp_ads7846_lock(void)
74{
75 spin_lock(&corgi_ssp_lock);
76 if (ssp_machinfo->cs_ads7846 >= 0)
77 GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
78}
79
80void corgi_ssp_ads7846_unlock(void)
81{
82 if (ssp_machinfo->cs_ads7846 >= 0)
83 GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
84 spin_unlock(&corgi_ssp_lock);
85}
86
87void corgi_ssp_ads7846_put(ulong data)
88{
89 ssp_write_word(&corgi_ssp_dev,data);
90}
91
92unsigned long corgi_ssp_ads7846_get(void)
93{
94 u32 ret = 0;
95 ssp_read_word(&corgi_ssp_dev, &ret);
96 return ret;
97}
98
99EXPORT_SYMBOL(corgi_ssp_ads7846_putget);
100EXPORT_SYMBOL(corgi_ssp_ads7846_lock);
101EXPORT_SYMBOL(corgi_ssp_ads7846_unlock);
102EXPORT_SYMBOL(corgi_ssp_ads7846_put);
103EXPORT_SYMBOL(corgi_ssp_ads7846_get);
104
105
106/*
107 * LCD/Backlight Routines
108 */
109unsigned long corgi_ssp_dac_put(ulong data)
110{
111 unsigned long flag, sscr1 = SSCR1_SPH;
112 u32 tmp;
113
114 spin_lock_irqsave(&corgi_ssp_lock, flag);
115
116 if (machine_is_spitz() || machine_is_akita() || machine_is_borzoi())
117 sscr1 = 0;
118
119 ssp_disable(&corgi_ssp_dev);
120 ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), sscr1, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_lcdcon));
121 ssp_enable(&corgi_ssp_dev);
122
123 if (ssp_machinfo->cs_lcdcon >= 0)
124 GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
125 ssp_write_word(&corgi_ssp_dev,data);
126 /* Read null data back from device to prevent SSP overflow */
127 ssp_read_word(&corgi_ssp_dev, &tmp);
128 if (ssp_machinfo->cs_lcdcon >= 0)
129 GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
130
131 ssp_disable(&corgi_ssp_dev);
132 ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
133 ssp_enable(&corgi_ssp_dev);
134
135 spin_unlock_irqrestore(&corgi_ssp_lock, flag);
136
137 return 0;
138}
139
140void corgi_ssp_lcdtg_send(u8 adrs, u8 data)
141{
142 corgi_ssp_dac_put(((adrs & 0x07) << 5) | (data & 0x1f));
143}
144
145void corgi_ssp_blduty_set(int duty)
146{
147 corgi_ssp_lcdtg_send(0x02,duty);
148}
149
150EXPORT_SYMBOL(corgi_ssp_lcdtg_send);
151EXPORT_SYMBOL(corgi_ssp_blduty_set);
152
153/*
154 * Max1111 Routines
155 */
156int corgi_ssp_max1111_get(ulong data)
157{
158 unsigned long flag;
159 long voltage = 0, voltage1 = 0, voltage2 = 0;
160
161 spin_lock_irqsave(&corgi_ssp_lock, flag);
162 if (ssp_machinfo->cs_max1111 >= 0)
163 GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
164 ssp_disable(&corgi_ssp_dev);
165 ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_max1111));
166 ssp_enable(&corgi_ssp_dev);
167
168 udelay(1);
169
170 /* TB1/RB1 */
171 ssp_write_word(&corgi_ssp_dev,data);
172 ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); /* null read */
173
174 /* TB12/RB2 */
175 ssp_write_word(&corgi_ssp_dev,0);
176 ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1);
177
178 /* TB13/RB3*/
179 ssp_write_word(&corgi_ssp_dev,0);
180 ssp_read_word(&corgi_ssp_dev, (u32*)&voltage2);
181
182 ssp_disable(&corgi_ssp_dev);
183 ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
184 ssp_enable(&corgi_ssp_dev);
185 if (ssp_machinfo->cs_max1111 >= 0)
186 GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
187 spin_unlock_irqrestore(&corgi_ssp_lock, flag);
188
189 if (voltage1 & 0xc0 || voltage2 & 0x3f)
190 voltage = -1;
191 else
192 voltage = ((voltage1 << 2) & 0xfc) | ((voltage2 >> 6) & 0x03);
193
194 return voltage;
195}
196
197EXPORT_SYMBOL(corgi_ssp_max1111_get);
198
199/*
200 * Support Routines
201 */
202
203void __init corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo)
204{
205 ssp_machinfo = machinfo;
206}
207
208static int __init corgi_ssp_probe(struct platform_device *dev)
209{
210 int ret;
211
212 /* Chip Select - Disable All */
213 if (ssp_machinfo->cs_lcdcon >= 0)
214 pxa_gpio_mode(ssp_machinfo->cs_lcdcon | GPIO_OUT | GPIO_DFLT_HIGH);
215 if (ssp_machinfo->cs_max1111 >= 0)
216 pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH);
217 if (ssp_machinfo->cs_ads7846 >= 0)
218 pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH);
219
220 ret = ssp_init(&corgi_ssp_dev, ssp_machinfo->port, 0);
221
222 if (ret)
223 printk(KERN_ERR "Unable to register SSP handler!\n");
224 else {
225 ssp_disable(&corgi_ssp_dev);
226 ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
227 ssp_enable(&corgi_ssp_dev);
228 }
229
230 return ret;
231}
232
233static int corgi_ssp_remove(struct platform_device *dev)
234{
235 ssp_exit(&corgi_ssp_dev);
236 return 0;
237}
238
239static int corgi_ssp_suspend(struct platform_device *dev, pm_message_t state)
240{
241 ssp_flush(&corgi_ssp_dev);
242 ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state);
243
244 return 0;
245}
246
247static int corgi_ssp_resume(struct platform_device *dev)
248{
249 if (ssp_machinfo->cs_lcdcon >= 0)
250 GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */
251 if (ssp_machinfo->cs_max1111 >= 0)
252 GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
253 if (ssp_machinfo->cs_ads7846 >= 0)
254 GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/
255 ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state);
256 ssp_enable(&corgi_ssp_dev);
257
258 return 0;
259}
260
261static struct platform_driver corgissp_driver = {
262 .probe = corgi_ssp_probe,
263 .remove = corgi_ssp_remove,
264 .suspend = corgi_ssp_suspend,
265 .resume = corgi_ssp_resume,
266 .driver = {
267 .name = "corgi-ssp",
268 },
269};
270
271int __init corgi_ssp_init(void)
272{
273 return platform_driver_register(&corgissp_driver);
274}
275
276arch_initcall(corgi_ssp_init);
diff --git a/arch/arm/mach-pxa/e330.c b/arch/arm/mach-pxa/e330.c
new file mode 100644
index 000000000000..d488eded2058
--- /dev/null
+++ b/arch/arm/mach-pxa/e330.c
@@ -0,0 +1,43 @@
1/*
2 * Hardware definitions for the Toshiba eseries PDAs
3 *
4 * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
5 *
6 * This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15
16#include <asm/setup.h>
17#include <asm/mach/arch.h>
18#include <asm/mach-types.h>
19
20#include <mach/mfp-pxa25x.h>
21#include <mach/hardware.h>
22#include <mach/udc.h>
23
24#include "generic.h"
25#include "eseries.h"
26
27static void __init e330_init(void)
28{
29 pxa_set_udc_info(&e7xx_udc_mach_info);
30}
31
32MACHINE_START(E330, "Toshiba e330")
33 /* Maintainer: Ian Molton (spyro@f2s.com) */
34 .phys_io = 0x40000000,
35 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
36 .boot_params = 0xa0000100,
37 .map_io = pxa_map_io,
38 .init_irq = pxa25x_init_irq,
39 .fixup = eseries_fixup,
40 .init_machine = e330_init,
41 .timer = &pxa_timer,
42MACHINE_END
43
diff --git a/arch/arm/mach-pxa/e350.c b/arch/arm/mach-pxa/e350.c
new file mode 100644
index 000000000000..8ecbc5479828
--- /dev/null
+++ b/arch/arm/mach-pxa/e350.c
@@ -0,0 +1,43 @@
1/*
2 * Hardware definitions for the Toshiba eseries PDAs
3 *
4 * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
5 *
6 * This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15
16#include <asm/setup.h>
17#include <asm/mach/arch.h>
18#include <asm/mach-types.h>
19
20#include <mach/mfp-pxa25x.h>
21#include <mach/hardware.h>
22#include <mach/udc.h>
23
24#include "generic.h"
25#include "eseries.h"
26
27static void __init e350_init(void)
28{
29 pxa_set_udc_info(&e7xx_udc_mach_info);
30}
31
32MACHINE_START(E350, "Toshiba e350")
33 /* Maintainer: Ian Molton (spyro@f2s.com) */
34 .phys_io = 0x40000000,
35 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
36 .boot_params = 0xa0000100,
37 .map_io = pxa_map_io,
38 .init_irq = pxa25x_init_irq,
39 .fixup = eseries_fixup,
40 .init_machine = e350_init,
41 .timer = &pxa_timer,
42MACHINE_END
43
diff --git a/arch/arm/mach-pxa/e400.c b/arch/arm/mach-pxa/e400.c
new file mode 100644
index 000000000000..544bbaa20621
--- /dev/null
+++ b/arch/arm/mach-pxa/e400.c
@@ -0,0 +1,94 @@
1/*
2 * Hardware definitions for the Toshiba eseries PDAs
3 *
4 * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
5 *
6 * This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15
16#include <asm/setup.h>
17#include <asm/mach/arch.h>
18#include <asm/mach-types.h>
19
20#include <mach/pxa-regs.h>
21#include <mach/mfp-pxa25x.h>
22#include <mach/hardware.h>
23
24#include <mach/pxafb.h>
25#include <mach/udc.h>
26
27#include "generic.h"
28#include "eseries.h"
29
30/* ------------------------ E400 LCD definitions ------------------------ */
31
32static struct pxafb_mode_info e400_pxafb_mode_info = {
33 .pixclock = 140703,
34 .xres = 240,
35 .yres = 320,
36 .bpp = 16,
37 .hsync_len = 4,
38 .left_margin = 28,
39 .right_margin = 8,
40 .vsync_len = 3,
41 .upper_margin = 5,
42 .lower_margin = 6,
43 .sync = 0,
44};
45
46static struct pxafb_mach_info e400_pxafb_mach_info = {
47 .modes = &e400_pxafb_mode_info,
48 .num_modes = 1,
49 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
50 .lccr3 = 0,
51 .pxafb_backlight_power = NULL,
52};
53
54/* ------------------------ E400 MFP config ----------------------------- */
55
56static unsigned long e400_pin_config[] __initdata = {
57 /* Chip selects */
58 GPIO15_nCS_1, /* CS1 - Flash */
59 GPIO80_nCS_4, /* CS4 - TMIO */
60
61 /* Clocks */
62 GPIO12_32KHz,
63
64 /* BTUART */
65 GPIO42_BTUART_RXD,
66 GPIO43_BTUART_TXD,
67 GPIO44_BTUART_CTS,
68 GPIO45_GPIO, /* Used by TMIO for #SUSPEND */
69
70 /* wakeup */
71 GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
72};
73
74/* ---------------------------------------------------------------------- */
75
76static void __init e400_init(void)
77{
78 pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config));
79 set_pxa_fb_info(&e400_pxafb_mach_info);
80 pxa_set_udc_info(&e7xx_udc_mach_info);
81}
82
83MACHINE_START(E400, "Toshiba e400")
84 /* Maintainer: Ian Molton (spyro@f2s.com) */
85 .phys_io = 0x40000000,
86 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
87 .boot_params = 0xa0000100,
88 .map_io = pxa_map_io,
89 .init_irq = pxa25x_init_irq,
90 .fixup = eseries_fixup,
91 .init_machine = e400_init,
92 .timer = &pxa_timer,
93MACHINE_END
94
diff --git a/arch/arm/mach-pxa/e400_lcd.c b/arch/arm/mach-pxa/e400_lcd.c
deleted file mode 100644
index 263884165f57..000000000000
--- a/arch/arm/mach-pxa/e400_lcd.c
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * e400_lcd.c
3 *
4 * (c) 2005 Ian Molton <spyro@f2s.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/module.h>
15
16#include <asm/mach-types.h>
17#include <mach/pxa-regs.h>
18#include <mach/pxafb.h>
19
20static struct pxafb_mode_info e400_pxafb_mode_info = {
21 .pixclock = 140703,
22 .xres = 240,
23 .yres = 320,
24 .bpp = 16,
25 .hsync_len = 4,
26 .left_margin = 28,
27 .right_margin = 8,
28 .vsync_len = 3,
29 .upper_margin = 5,
30 .lower_margin = 6,
31 .sync = 0,
32};
33
34static struct pxafb_mach_info e400_pxafb_mach_info = {
35 .modes = &e400_pxafb_mode_info,
36 .num_modes = 1,
37 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
38 .lccr3 = 0,
39 .pxafb_backlight_power = NULL,
40};
41
42static int __init e400_lcd_init(void)
43{
44 if (!machine_is_e400())
45 return -ENODEV;
46
47 set_pxa_fb_info(&e400_pxafb_mach_info);
48 return 0;
49}
50
51module_init(e400_lcd_init);
52
53MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
54MODULE_DESCRIPTION("e400 lcd driver");
55MODULE_LICENSE("GPLv2");
56
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c
new file mode 100644
index 000000000000..c57a15b37f0d
--- /dev/null
+++ b/arch/arm/mach-pxa/e740.c
@@ -0,0 +1,169 @@
1/*
2 * Hardware definitions for the Toshiba eseries PDAs
3 *
4 * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
5 *
6 * This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/device.h>
16#include <linux/platform_device.h>
17#include <linux/fb.h>
18
19#include <video/w100fb.h>
20
21#include <asm/setup.h>
22#include <asm/mach/arch.h>
23#include <asm/mach-types.h>
24
25#include <mach/mfp-pxa25x.h>
26#include <mach/hardware.h>
27#include <mach/udc.h>
28
29#include "generic.h"
30#include "eseries.h"
31
32
33/* ------------------------ e740 video support --------------------------- */
34
35static struct w100_gen_regs e740_lcd_regs = {
36 .lcd_format = 0x00008023,
37 .lcdd_cntl1 = 0x0f000000,
38 .lcdd_cntl2 = 0x0003ffff,
39 .genlcd_cntl1 = 0x00ffff03,
40 .genlcd_cntl2 = 0x003c0f03,
41 .genlcd_cntl3 = 0x000143aa,
42};
43
44static struct w100_mode e740_lcd_mode = {
45 .xres = 240,
46 .yres = 320,
47 .left_margin = 20,
48 .right_margin = 28,
49 .upper_margin = 9,
50 .lower_margin = 8,
51 .crtc_ss = 0x80140013,
52 .crtc_ls = 0x81150110,
53 .crtc_gs = 0x80050005,
54 .crtc_vpos_gs = 0x000a0009,
55 .crtc_rev = 0x0040010a,
56 .crtc_dclk = 0xa906000a,
57 .crtc_gclk = 0x80050108,
58 .crtc_goe = 0x80050108,
59 .pll_freq = 57,
60 .pixclk_divider = 4,
61 .pixclk_divider_rotated = 4,
62 .pixclk_src = CLK_SRC_XTAL,
63 .sysclk_divider = 1,
64 .sysclk_src = CLK_SRC_PLL,
65 .crtc_ps1_active = 0x41060010,
66};
67
68static struct w100_gpio_regs e740_w100_gpio_info = {
69 .init_data1 = 0x21002103,
70 .gpio_dir1 = 0xffffdeff,
71 .gpio_oe1 = 0x03c00643,
72 .init_data2 = 0x003f003f,
73 .gpio_dir2 = 0xffffffff,
74 .gpio_oe2 = 0x000000ff,
75};
76
77static struct w100fb_mach_info e740_fb_info = {
78 .modelist = &e740_lcd_mode,
79 .num_modes = 1,
80 .regs = &e740_lcd_regs,
81 .gpio = &e740_w100_gpio_info,
82 .xtal_freq = 14318000,
83 .xtal_dbl = 1,
84};
85
86static struct resource e740_fb_resources[] = {
87 [0] = {
88 .start = 0x0c000000,
89 .end = 0x0cffffff,
90 .flags = IORESOURCE_MEM,
91 },
92};
93
94static struct platform_device e740_fb_device = {
95 .name = "w100fb",
96 .id = -1,
97 .dev = {
98 .platform_data = &e740_fb_info,
99 },
100 .num_resources = ARRAY_SIZE(e740_fb_resources),
101 .resource = e740_fb_resources,
102};
103
104/* --------------------------- MFP Pin config -------------------------- */
105
106static unsigned long e740_pin_config[] __initdata = {
107 /* Chip selects */
108 GPIO15_nCS_1, /* CS1 - Flash */
109 GPIO79_nCS_3, /* CS3 - IMAGEON */
110 GPIO80_nCS_4, /* CS4 - TMIO */
111
112 /* Clocks */
113 GPIO12_32KHz,
114
115 /* BTUART */
116 GPIO42_BTUART_RXD,
117 GPIO43_BTUART_TXD,
118 GPIO44_BTUART_CTS,
119 GPIO45_GPIO, /* Used by TMIO for #SUSPEND */
120
121 /* PC Card */
122 GPIO8_GPIO, /* CD0 */
123 GPIO44_GPIO, /* CD1 */
124 GPIO11_GPIO, /* IRQ0 */
125 GPIO6_GPIO, /* IRQ1 */
126 GPIO27_GPIO, /* RST0 */
127 GPIO24_GPIO, /* RST1 */
128 GPIO20_GPIO, /* PWR0 */
129 GPIO23_GPIO, /* PWR1 */
130 GPIO48_nPOE,
131 GPIO49_nPWE,
132 GPIO50_nPIOR,
133 GPIO51_nPIOW,
134 GPIO52_nPCE_1,
135 GPIO53_nPCE_2,
136 GPIO54_nPSKTSEL,
137 GPIO55_nPREG,
138 GPIO56_nPWAIT,
139 GPIO57_nIOIS16,
140
141 /* wakeup */
142 GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
143};
144
145/* ----------------------------------------------------------------------- */
146
147static struct platform_device *devices[] __initdata = {
148 &e740_fb_device,
149};
150
151static void __init e740_init(void)
152{
153 pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config));
154 platform_add_devices(devices, ARRAY_SIZE(devices));
155 pxa_set_udc_info(&e7xx_udc_mach_info);
156}
157
158MACHINE_START(E740, "Toshiba e740")
159 /* Maintainer: Ian Molton (spyro@f2s.com) */
160 .phys_io = 0x40000000,
161 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
162 .boot_params = 0xa0000100,
163 .map_io = pxa_map_io,
164 .init_irq = pxa25x_init_irq,
165 .fixup = eseries_fixup,
166 .init_machine = e740_init,
167 .timer = &pxa_timer,
168MACHINE_END
169
diff --git a/arch/arm/mach-pxa/e740_lcd.c b/arch/arm/mach-pxa/e740_lcd.c
deleted file mode 100644
index 26bd599af178..000000000000
--- a/arch/arm/mach-pxa/e740_lcd.c
+++ /dev/null
@@ -1,123 +0,0 @@
1/* e740_lcd.c
2 *
3 * This file contains the definitions for the LCD timings and functions
4 * to control the LCD power / frontlighting via the w100fb driver.
5 *
6 * (c) 2005 Ian Molton <spyro@f2s.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/module.h>
15#include <linux/device.h>
16#include <linux/fb.h>
17#include <linux/err.h>
18#include <linux/platform_device.h>
19
20#include <asm/mach-types.h>
21
22#include <video/w100fb.h>
23
24/*
25**potential** shutdown routine - to be investigated
26devmem2 0x0c010528 w 0xff3fff00
27devmem2 0x0c010190 w 0x7FFF8000
28devmem2 0x0c0101b0 w 0x00FF0000
29devmem2 0x0c01008c w 0x00000000
30devmem2 0x0c010080 w 0x000000bf
31devmem2 0x0c010098 w 0x00000015
32devmem2 0x0c010088 w 0x4b000204
33devmem2 0x0c010098 w 0x0000001d
34*/
35
36static struct w100_gen_regs e740_lcd_regs = {
37 .lcd_format = 0x00008023,
38 .lcdd_cntl1 = 0x0f000000,
39 .lcdd_cntl2 = 0x0003ffff,
40 .genlcd_cntl1 = 0x00ffff03,
41 .genlcd_cntl2 = 0x003c0f03,
42 .genlcd_cntl3 = 0x000143aa,
43};
44
45static struct w100_mode e740_lcd_mode = {
46 .xres = 240,
47 .yres = 320,
48 .left_margin = 20,
49 .right_margin = 28,
50 .upper_margin = 9,
51 .lower_margin = 8,
52 .crtc_ss = 0x80140013,
53 .crtc_ls = 0x81150110,
54 .crtc_gs = 0x80050005,
55 .crtc_vpos_gs = 0x000a0009,
56 .crtc_rev = 0x0040010a,
57 .crtc_dclk = 0xa906000a,
58 .crtc_gclk = 0x80050108,
59 .crtc_goe = 0x80050108,
60 .pll_freq = 57,
61 .pixclk_divider = 4,
62 .pixclk_divider_rotated = 4,
63 .pixclk_src = CLK_SRC_XTAL,
64 .sysclk_divider = 1,
65 .sysclk_src = CLK_SRC_PLL,
66 .crtc_ps1_active = 0x41060010,
67};
68
69
70static struct w100_gpio_regs e740_w100_gpio_info = {
71 .init_data1 = 0x21002103,
72 .gpio_dir1 = 0xffffdeff,
73 .gpio_oe1 = 0x03c00643,
74 .init_data2 = 0x003f003f,
75 .gpio_dir2 = 0xffffffff,
76 .gpio_oe2 = 0x000000ff,
77};
78
79static struct w100fb_mach_info e740_fb_info = {
80 .modelist = &e740_lcd_mode,
81 .num_modes = 1,
82 .regs = &e740_lcd_regs,
83 .gpio = &e740_w100_gpio_info,
84 .xtal_freq = 14318000,
85 .xtal_dbl = 1,
86};
87
88static struct resource e740_fb_resources[] = {
89 [0] = {
90 .start = 0x0c000000,
91 .end = 0x0cffffff,
92 .flags = IORESOURCE_MEM,
93 },
94};
95
96/* ----------------------- device declarations -------------------------- */
97
98
99static struct platform_device e740_fb_device = {
100 .name = "w100fb",
101 .id = -1,
102 .dev = {
103 .platform_data = &e740_fb_info,
104 },
105 .num_resources = ARRAY_SIZE(e740_fb_resources),
106 .resource = e740_fb_resources,
107};
108
109static int e740_lcd_init(void)
110{
111 int ret;
112
113 if (!machine_is_e740())
114 return -ENODEV;
115
116 return platform_device_register(&e740_fb_device);
117}
118
119module_init(e740_lcd_init);
120
121MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
122MODULE_DESCRIPTION("e740 lcd driver");
123MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/e750_lcd.c b/arch/arm/mach-pxa/e750.c
index 75edc3b5390f..640e738b85df 100644
--- a/arch/arm/mach-pxa/e750_lcd.c
+++ b/arch/arm/mach-pxa/e750.c
@@ -1,25 +1,35 @@
1/* e750_lcd.c 1/*
2 * Hardware definitions for the Toshiba eseries PDAs
2 * 3 *
3 * This file contains the definitions for the LCD timings and functions 4 * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
4 * to control the LCD power / frontlighting via the w100fb driver.
5 * 5 *
6 * (c) 2005 Ian Molton <spyro@f2s.com> 6 * This file is licensed under
7 * 7 * the terms of the GNU General Public License version 2. This program
8 * This program is free software; you can redistribute it and/or modify 8 * is licensed "as is" without any warranty of any kind, whether express
9 * it under the terms of the GNU General Public License version 2 as 9 * or implied.
10 * published by the Free Software Foundation.
11 * 10 *
12 */ 11 */
13 12
14#include <linux/module.h> 13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/device.h> 15#include <linux/device.h>
16#include <linux/fb.h>
17#include <linux/err.h>
18#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/fb.h>
18
19#include <video/w100fb.h>
19 20
21#include <asm/setup.h>
22#include <asm/mach/arch.h>
20#include <asm/mach-types.h> 23#include <asm/mach-types.h>
21 24
22#include <video/w100fb.h> 25#include <mach/mfp-pxa25x.h>
26#include <mach/hardware.h>
27#include <mach/udc.h>
28
29#include "generic.h"
30#include "eseries.h"
31
32/* ---------------------- E750 LCD definitions -------------------- */
23 33
24static struct w100_gen_regs e750_lcd_regs = { 34static struct w100_gen_regs e750_lcd_regs = {
25 .lcd_format = 0x00008003, 35 .lcd_format = 0x00008003,
@@ -54,7 +64,6 @@ static struct w100_mode e750_lcd_mode = {
54 .sysclk_src = CLK_SRC_PLL, 64 .sysclk_src = CLK_SRC_PLL,
55}; 65};
56 66
57
58static struct w100_gpio_regs e750_w100_gpio_info = { 67static struct w100_gpio_regs e750_w100_gpio_info = {
59 .init_data1 = 0x01192f1b, 68 .init_data1 = 0x01192f1b,
60 .gpio_dir1 = 0xd5ffdeff, 69 .gpio_dir1 = 0xd5ffdeff,
@@ -81,9 +90,6 @@ static struct resource e750_fb_resources[] = {
81 }, 90 },
82}; 91};
83 92
84/* ----------------------- device declarations -------------------------- */
85
86
87static struct platform_device e750_fb_device = { 93static struct platform_device e750_fb_device = {
88 .name = "w100fb", 94 .name = "w100fb",
89 .id = -1, 95 .id = -1,
@@ -94,16 +100,27 @@ static struct platform_device e750_fb_device = {
94 .resource = e750_fb_resources, 100 .resource = e750_fb_resources,
95}; 101};
96 102
97static int e750_lcd_init(void) 103/* ----------------------------------------------------------------------- */
98{
99 if (!machine_is_e750())
100 return -ENODEV;
101 104
102 return platform_device_register(&e750_fb_device); 105static struct platform_device *devices[] __initdata = {
106 &e750_fb_device,
107};
108
109static void __init e750_init(void)
110{
111 platform_add_devices(devices, ARRAY_SIZE(devices));
112 pxa_set_udc_info(&e7xx_udc_mach_info);
103} 113}
104 114
105module_init(e750_lcd_init); 115MACHINE_START(E750, "Toshiba e750")
116 /* Maintainer: Ian Molton (spyro@f2s.com) */
117 .phys_io = 0x40000000,
118 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
119 .boot_params = 0xa0000100,
120 .map_io = pxa_map_io,
121 .init_irq = pxa25x_init_irq,
122 .fixup = eseries_fixup,
123 .init_machine = e750_init,
124 .timer = &pxa_timer,
125MACHINE_END
106 126
107MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
108MODULE_DESCRIPTION("e750 lcd driver");
109MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/e800_lcd.c b/arch/arm/mach-pxa/e800.c
index e6aeab0ebc22..a293e09bfe25 100644
--- a/arch/arm/mach-pxa/e800_lcd.c
+++ b/arch/arm/mach-pxa/e800.c
@@ -1,25 +1,36 @@
1/* e800_lcd.c 1/*
2 * Hardware definitions for the Toshiba eseries PDAs
2 * 3 *
3 * This file contains the definitions for the LCD timings and functions 4 * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
4 * to control the LCD power / frontlighting via the w100fb driver.
5 * 5 *
6 * (c) 2005 Ian Molton <spyro@f2s.com> 6 * This file is licensed under
7 * 7 * the terms of the GNU General Public License version 2. This program
8 * This program is free software; you can redistribute it and/or modify 8 * is licensed "as is" without any warranty of any kind, whether express
9 * it under the terms of the GNU General Public License version 2 as 9 * or implied.
10 * published by the Free Software Foundation.
11 * 10 *
12 */ 11 */
13 12
14#include <linux/module.h> 13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/device.h> 15#include <linux/device.h>
16#include <linux/fb.h>
17#include <linux/err.h>
18#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/fb.h>
18
19#include <video/w100fb.h>
19 20
21#include <asm/setup.h>
22#include <asm/mach/arch.h>
20#include <asm/mach-types.h> 23#include <asm/mach-types.h>
21 24
22#include <video/w100fb.h> 25#include <mach/mfp-pxa25x.h>
26#include <mach/hardware.h>
27#include <mach/eseries-gpio.h>
28#include <mach/udc.h>
29
30#include "generic.h"
31#include "eseries.h"
32
33/* ------------------------ e800 LCD definitions ------------------------- */
23 34
24static struct w100_gen_regs e800_lcd_regs = { 35static struct w100_gen_regs e800_lcd_regs = {
25 .lcd_format = 0x00008003, 36 .lcd_format = 0x00008003,
@@ -71,8 +82,8 @@ static struct w100_mode e800_lcd_mode[2] = {
71 .crtc_goe = 0x80cc0015, 82 .crtc_goe = 0x80cc0015,
72 .crtc_ps1_active = 0x00000000, 83 .crtc_ps1_active = 0x00000000,
73 .pll_freq = 100, 84 .pll_freq = 100,
74 .pixclk_divider = 6, /* Wince uses 14 which gives a 7MHz pclk. */ 85 .pixclk_divider = 6, /* Wince uses 14 which gives a */
75 .pixclk_divider_rotated = 6, /* we want a 14MHz one (much nicer to look at) */ 86 .pixclk_divider_rotated = 6, /* 7MHz Pclk. We use a 14MHz one */
76 .pixclk_src = CLK_SRC_PLL, 87 .pixclk_src = CLK_SRC_PLL,
77 .sysclk_divider = 0, 88 .sysclk_divider = 0,
78 .sysclk_src = CLK_SRC_PLL, 89 .sysclk_src = CLK_SRC_PLL,
@@ -131,9 +142,6 @@ static struct resource e800_fb_resources[] = {
131 }, 142 },
132}; 143};
133 144
134/* ----------------------- device declarations -------------------------- */
135
136
137static struct platform_device e800_fb_device = { 145static struct platform_device e800_fb_device = {
138 .name = "w100fb", 146 .name = "w100fb",
139 .id = -1, 147 .id = -1,
@@ -144,16 +152,35 @@ static struct platform_device e800_fb_device = {
144 .resource = e800_fb_resources, 152 .resource = e800_fb_resources,
145}; 153};
146 154
147static int e800_lcd_init(void) 155/* --------------------------- UDC definitions --------------------------- */
148{ 156
149 if (!machine_is_e800()) 157static struct pxa2xx_udc_mach_info e800_udc_mach_info = {
150 return -ENODEV; 158 .gpio_vbus = GPIO_E800_USB_DISC,
159 .gpio_pullup = GPIO_E800_USB_PULLUP,
160 .gpio_pullup_inverted = 1
161};
151 162
152 return platform_device_register(&e800_fb_device); 163/* ----------------------------------------------------------------------- */
164
165static struct platform_device *devices[] __initdata = {
166 &e800_fb_device,
167};
168
169static void __init e800_init(void)
170{
171 platform_add_devices(devices, ARRAY_SIZE(devices));
172 pxa_set_udc_info(&e800_udc_mach_info);
153} 173}
154 174
155module_init(e800_lcd_init); 175MACHINE_START(E800, "Toshiba e800")
176 /* Maintainer: Ian Molton (spyro@f2s.com) */
177 .phys_io = 0x40000000,
178 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
179 .boot_params = 0xa0000100,
180 .map_io = pxa_map_io,
181 .init_irq = pxa25x_init_irq,
182 .fixup = eseries_fixup,
183 .init_machine = e800_init,
184 .timer = &pxa_timer,
185MACHINE_END
156 186
157MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
158MODULE_DESCRIPTION("e800 lcd driver");
159MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index 001a252bd514..d28849b50a14 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -19,68 +19,13 @@
19 19
20#include <mach/mfp-pxa25x.h> 20#include <mach/mfp-pxa25x.h>
21#include <mach/hardware.h> 21#include <mach/hardware.h>
22#include <mach/eseries-gpio.h>
23#include <mach/udc.h>
22 24
23#include "generic.h" 25#include "generic.h"
24 26
25static unsigned long e740_pin_config[] __initdata = {
26 /* Chip selects */
27 GPIO15_nCS_1, /* CS1 - Flash */
28 GPIO79_nCS_3, /* CS3 - IMAGEON */
29 GPIO80_nCS_4, /* CS4 - TMIO */
30
31 /* Clocks */
32 GPIO12_32KHz,
33
34 /* BTUART */
35 GPIO42_BTUART_RXD,
36 GPIO43_BTUART_TXD,
37 GPIO44_BTUART_CTS,
38 GPIO45_GPIO, /* Used by TMIO for #SUSPEND */
39
40 /* PC Card */
41 GPIO8_GPIO, /* CD0 */
42 GPIO44_GPIO, /* CD1 */
43 GPIO11_GPIO, /* IRQ0 */
44 GPIO6_GPIO, /* IRQ1 */
45 GPIO27_GPIO, /* RST0 */
46 GPIO24_GPIO, /* RST1 */
47 GPIO20_GPIO, /* PWR0 */
48 GPIO23_GPIO, /* PWR1 */
49 GPIO48_nPOE,
50 GPIO49_nPWE,
51 GPIO50_nPIOR,
52 GPIO51_nPIOW,
53 GPIO52_nPCE_1,
54 GPIO53_nPCE_2,
55 GPIO54_nPSKTSEL,
56 GPIO55_nPREG,
57 GPIO56_nPWAIT,
58 GPIO57_nIOIS16,
59
60 /* wakeup */
61 GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
62};
63
64static unsigned long e400_pin_config[] __initdata = {
65 /* Chip selects */
66 GPIO15_nCS_1, /* CS1 - Flash */
67 GPIO80_nCS_4, /* CS4 - TMIO */
68
69 /* Clocks */
70 GPIO12_32KHz,
71
72 /* BTUART */
73 GPIO42_BTUART_RXD,
74 GPIO43_BTUART_TXD,
75 GPIO44_BTUART_CTS,
76 GPIO45_GPIO, /* Used by TMIO for #SUSPEND */
77
78 /* wakeup */
79 GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
80};
81
82/* Only e800 has 128MB RAM */ 27/* Only e800 has 128MB RAM */
83static void __init eseries_fixup(struct machine_desc *desc, 28void __init eseries_fixup(struct machine_desc *desc,
84 struct tag *tags, char **cmdline, struct meminfo *mi) 29 struct tag *tags, char **cmdline, struct meminfo *mi)
85{ 30{
86 mi->nr_banks=1; 31 mi->nr_banks=1;
@@ -92,95 +37,9 @@ static void __init eseries_fixup(struct machine_desc *desc,
92 mi->bank[0].size = (64*1024*1024); 37 mi->bank[0].size = (64*1024*1024);
93} 38}
94 39
95static void __init e740_init(void) 40struct pxa2xx_udc_mach_info e7xx_udc_mach_info = {
96{ 41 .gpio_vbus = GPIO_E7XX_USB_DISC,
97 pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config)); 42 .gpio_pullup = GPIO_E7XX_USB_PULLUP,
98} 43 .gpio_pullup_inverted = 1
99 44};
100static void __init e400_init(void)
101{
102 pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config));
103}
104
105/* e-series machine definitions */
106
107#ifdef CONFIG_MACH_E330
108MACHINE_START(E330, "Toshiba e330")
109 /* Maintainer: Ian Molton (spyro@f2s.com) */
110 .phys_io = 0x40000000,
111 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
112 .boot_params = 0xa0000100,
113 .map_io = pxa_map_io,
114 .init_irq = pxa25x_init_irq,
115 .fixup = eseries_fixup,
116 .timer = &pxa_timer,
117MACHINE_END
118#endif
119
120#ifdef CONFIG_MACH_E350
121MACHINE_START(E350, "Toshiba e350")
122 /* Maintainer: Ian Molton (spyro@f2s.com) */
123 .phys_io = 0x40000000,
124 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
125 .boot_params = 0xa0000100,
126 .map_io = pxa_map_io,
127 .init_irq = pxa25x_init_irq,
128 .fixup = eseries_fixup,
129 .timer = &pxa_timer,
130MACHINE_END
131#endif
132
133#ifdef CONFIG_MACH_E740
134MACHINE_START(E740, "Toshiba e740")
135 /* Maintainer: Ian Molton (spyro@f2s.com) */
136 .phys_io = 0x40000000,
137 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
138 .boot_params = 0xa0000100,
139 .map_io = pxa_map_io,
140 .init_irq = pxa25x_init_irq,
141 .fixup = eseries_fixup,
142 .init_machine = e740_init,
143 .timer = &pxa_timer,
144MACHINE_END
145#endif
146
147#ifdef CONFIG_MACH_E750
148MACHINE_START(E750, "Toshiba e750")
149 /* Maintainer: Ian Molton (spyro@f2s.com) */
150 .phys_io = 0x40000000,
151 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
152 .boot_params = 0xa0000100,
153 .map_io = pxa_map_io,
154 .init_irq = pxa25x_init_irq,
155 .fixup = eseries_fixup,
156 .timer = &pxa_timer,
157MACHINE_END
158#endif
159
160#ifdef CONFIG_MACH_E400
161MACHINE_START(E400, "Toshiba e400")
162 /* Maintainer: Ian Molton (spyro@f2s.com) */
163 .phys_io = 0x40000000,
164 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
165 .boot_params = 0xa0000100,
166 .map_io = pxa_map_io,
167 .init_irq = pxa25x_init_irq,
168 .fixup = eseries_fixup,
169 .init_machine = e400_init,
170 .timer = &pxa_timer,
171MACHINE_END
172#endif
173
174#ifdef CONFIG_MACH_E800
175MACHINE_START(E800, "Toshiba e800")
176 /* Maintainer: Ian Molton (spyro@f2s.com) */
177 .phys_io = 0x40000000,
178 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
179 .boot_params = 0xa0000100,
180 .map_io = pxa_map_io,
181 .init_irq = pxa25x_init_irq,
182 .fixup = eseries_fixup,
183 .timer = &pxa_timer,
184MACHINE_END
185#endif
186 45
diff --git a/arch/arm/mach-pxa/eseries.h b/arch/arm/mach-pxa/eseries.h
new file mode 100644
index 000000000000..a83f88d4b6ad
--- /dev/null
+++ b/arch/arm/mach-pxa/eseries.h
@@ -0,0 +1,4 @@
1void __init eseries_fixup(struct machine_desc *desc,
2 struct tag *tags, char **cmdline, struct meminfo *mi);
3
4extern struct pxa2xx_udc_mach_info e7xx_udc_mach_info;
diff --git a/arch/arm/mach-pxa/eseries_udc.c b/arch/arm/mach-pxa/eseries_udc.c
deleted file mode 100644
index d622c04c0d44..000000000000
--- a/arch/arm/mach-pxa/eseries_udc.c
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * UDC functions for the Toshiba e-series PDAs
3 *
4 * Copyright (c) Ian Molton 2003
5 *
6 * This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/device.h>
16
17#include <mach/udc.h>
18#include <mach/eseries-gpio.h>
19#include <mach/hardware.h>
20#include <mach/pxa-regs.h>
21#include <asm/mach/arch.h>
22#include <asm/mach-types.h>
23#include <asm/mach/map.h>
24#include <asm/domain.h>
25
26/* local PXA generic code */
27#include "generic.h"
28
29static struct pxa2xx_udc_mach_info e7xx_udc_mach_info = {
30 .gpio_vbus = GPIO_E7XX_USB_DISC,
31 .gpio_pullup = GPIO_E7XX_USB_PULLUP,
32 .gpio_pullup_inverted = 1
33};
34
35static struct pxa2xx_udc_mach_info e800_udc_mach_info = {
36 .gpio_vbus = GPIO_E800_USB_DISC,
37 .gpio_pullup = GPIO_E800_USB_PULLUP,
38 .gpio_pullup_inverted = 1
39};
40
41static int __init eseries_udc_init(void)
42{
43 if (machine_is_e330() || machine_is_e350() ||
44 machine_is_e740() || machine_is_e750() ||
45 machine_is_e400())
46 pxa_set_udc_info(&e7xx_udc_mach_info);
47 else if (machine_is_e800())
48 pxa_set_udc_info(&e800_udc_mach_info);
49
50 return 0;
51}
52
53module_init(eseries_udc_init);
54
55MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
56MODULE_DESCRIPTION("eseries UDC support");
57MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 041c048320e4..dc876a8e6668 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -65,4 +65,5 @@ static inline void pxa3xx_clear_reset_status(unsigned int mask) {}
65 65
66extern struct sysdev_class pxa_irq_sysclass; 66extern struct sysdev_class pxa_irq_sysclass;
67extern struct sysdev_class pxa_gpio_sysclass; 67extern struct sysdev_class pxa_gpio_sysclass;
68extern struct sysdev_class pxa2xx_mfp_sysclass;
68extern struct sysdev_class pxa3xx_mfp_sysclass; 69extern struct sysdev_class pxa3xx_mfp_sysclass;
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index c0092472fa58..d8962a0fb98d 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -20,8 +20,12 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/interrupt.h> 22#include <linux/interrupt.h>
23#include <linux/delay.h>
23#include <linux/mtd/mtd.h> 24#include <linux/mtd/mtd.h>
24#include <linux/mtd/partitions.h> 25#include <linux/mtd/partitions.h>
26#include <linux/gpio.h>
27#include <linux/err.h>
28#include <linux/clk.h>
25 29
26#include <asm/setup.h> 30#include <asm/setup.h>
27#include <asm/memory.h> 31#include <asm/memory.h>
@@ -40,7 +44,7 @@
40 44
41#include <mach/pxa-regs.h> 45#include <mach/pxa-regs.h>
42#include <mach/pxa2xx-regs.h> 46#include <mach/pxa2xx-regs.h>
43#include <mach/pxa2xx-gpio.h> 47#include <mach/mfp-pxa25x.h>
44 48
45#include "generic.h" 49#include "generic.h"
46 50
@@ -85,21 +89,8 @@ static struct platform_device *devices[] __initdata = {
85}; 89};
86 90
87#ifdef CONFIG_MMC_PXA 91#ifdef CONFIG_MMC_PXA
88static struct pxamci_platform_data gumstix_mci_platform_data;
89
90static int gumstix_mci_init(struct device *dev, irq_handler_t detect_int,
91 void *data)
92{
93 pxa_gpio_mode(GPIO6_MMCCLK_MD);
94 pxa_gpio_mode(GPIO53_MMCCLK_MD);
95 pxa_gpio_mode(GPIO8_MMCCS0_MD);
96
97 return 0;
98}
99
100static struct pxamci_platform_data gumstix_mci_platform_data = { 92static struct pxamci_platform_data gumstix_mci_platform_data = {
101 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 93 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
102 .init = gumstix_mci_init,
103}; 94};
104 95
105static void __init gumstix_mmc_init(void) 96static void __init gumstix_mmc_init(void)
@@ -109,11 +100,11 @@ static void __init gumstix_mmc_init(void)
109#else 100#else
110static void __init gumstix_mmc_init(void) 101static void __init gumstix_mmc_init(void)
111{ 102{
112 printk(KERN_INFO "Gumstix mmc disabled\n"); 103 pr_debug("Gumstix mmc disabled\n");
113} 104}
114#endif 105#endif
115 106
116#ifdef CONFIG_USB_GADGET_PXA2XX 107#ifdef CONFIG_USB_GADGET_PXA25X
117static struct pxa2xx_udc_mach_info gumstix_udc_info __initdata = { 108static struct pxa2xx_udc_mach_info gumstix_udc_info __initdata = {
118 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn, 109 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn,
119 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx, 110 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx,
@@ -126,12 +117,87 @@ static void __init gumstix_udc_init(void)
126#else 117#else
127static void gumstix_udc_init(void) 118static void gumstix_udc_init(void)
128{ 119{
129 printk(KERN_INFO "Gumstix udc is disabled\n"); 120 pr_debug("Gumstix udc is disabled\n");
130} 121}
131#endif 122#endif
132 123
124#ifdef CONFIG_BT
125/* Normally, the bootloader would have enabled this 32kHz clock but many
126** boards still have u-boot 1.1.4 so we check if it has been turned on and
127** if not, we turn it on with a warning message. */
128static void gumstix_setup_bt_clock(void)
129{
130 int timeout = 500;
131
132 if (!(OSCC & OSCC_OOK))
133 pr_warning("32kHz clock was not on. Bootloader may need to "
134 "be updated\n");
135 else
136 return;
137
138 OSCC |= OSCC_OON;
139 do {
140 if (OSCC & OSCC_OOK)
141 break;
142 udelay(1);
143 } while (--timeout);
144 if (!timeout)
145 pr_err("Failed to start 32kHz clock\n");
146}
147
148static void __init gumstix_bluetooth_init(void)
149{
150 int err;
151
152 gumstix_setup_bt_clock();
153
154 err = gpio_request(GPIO_GUMSTIX_BTRESET, "BTRST");
155 if (err) {
156 pr_err("gumstix: failed request gpio for bluetooth reset\n");
157 return;
158 }
159
160 err = gpio_direction_output(GPIO_GUMSTIX_BTRESET, 1);
161 if (err) {
162 pr_err("gumstix: can't reset bluetooth\n");
163 return;
164 }
165 gpio_set_value(GPIO_GUMSTIX_BTRESET, 0);
166 udelay(100);
167 gpio_set_value(GPIO_GUMSTIX_BTRESET, 1);
168}
169#else
170static void gumstix_bluetooth_init(void)
171{
172 pr_debug("Gumstix Bluetooth is disabled\n");
173}
174#endif
175
176static unsigned long gumstix_pin_config[] __initdata = {
177 GPIO12_32KHz,
178 /* BTUART */
179 GPIO42_HWUART_RXD,
180 GPIO43_HWUART_TXD,
181 GPIO44_HWUART_CTS,
182 GPIO45_HWUART_RTS,
183 /* MMC */
184 GPIO6_MMC_CLK,
185 GPIO53_MMC_CLK,
186 GPIO8_MMC_CS0,
187 /* these are used by AM200EPD */
188 GPIO51_GPIO,
189 GPIO49_GPIO,
190 GPIO48_GPIO,
191 GPIO32_GPIO,
192 GPIO17_GPIO,
193 GPIO16_GPIO,
194};
195
133static void __init gumstix_init(void) 196static void __init gumstix_init(void)
134{ 197{
198 pxa2xx_mfp_config(ARRAY_AND_SIZE(gumstix_pin_config));
199
200 gumstix_bluetooth_init();
135 gumstix_udc_init(); 201 gumstix_udc_init();
136 gumstix_mmc_init(); 202 gumstix_mmc_init();
137 (void) platform_add_devices(devices, ARRAY_SIZE(devices)); 203 (void) platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 5aa0270d5605..013b15baa034 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -32,7 +32,7 @@
32#include <asm/mach/map.h> 32#include <asm/mach/map.h>
33 33
34#include <mach/pxa-regs.h> 34#include <mach/pxa-regs.h>
35#include <mach/pxa2xx-gpio.h> 35#include <mach/mfp-pxa25x.h>
36#include <mach/idp.h> 36#include <mach/idp.h>
37#include <mach/pxafb.h> 37#include <mach/pxafb.h>
38#include <mach/bitfield.h> 38#include <mach/bitfield.h>
@@ -46,6 +46,47 @@
46 * - Ethernet interrupt 46 * - Ethernet interrupt
47 */ 47 */
48 48
49static unsigned long idp_pin_config[] __initdata = {
50 /* LCD */
51 GPIO58_LCD_LDD_0,
52 GPIO59_LCD_LDD_1,
53 GPIO60_LCD_LDD_2,
54 GPIO61_LCD_LDD_3,
55 GPIO62_LCD_LDD_4,
56 GPIO63_LCD_LDD_5,
57 GPIO64_LCD_LDD_6,
58 GPIO65_LCD_LDD_7,
59 GPIO66_LCD_LDD_8,
60 GPIO67_LCD_LDD_9,
61 GPIO68_LCD_LDD_10,
62 GPIO69_LCD_LDD_11,
63 GPIO70_LCD_LDD_12,
64 GPIO71_LCD_LDD_13,
65 GPIO72_LCD_LDD_14,
66 GPIO73_LCD_LDD_15,
67 GPIO74_LCD_FCLK,
68 GPIO75_LCD_LCLK,
69 GPIO76_LCD_PCLK,
70
71 /* BTUART */
72 GPIO42_BTUART_RXD,
73 GPIO43_BTUART_TXD,
74 GPIO44_BTUART_CTS,
75 GPIO45_BTUART_RTS,
76
77 /* STUART */
78 GPIO46_STUART_RXD,
79 GPIO47_STUART_TXD,
80
81 /* MMC */
82 GPIO6_MMC_CLK,
83 GPIO8_MMC_CS0,
84
85 /* Ethernet */
86 GPIO33_nCS_5, /* Ethernet CS */
87 GPIO4_GPIO, /* Ethernet IRQ */
88};
89
49static struct resource smc91x_resources[] = { 90static struct resource smc91x_resources[] = {
50 [0] = { 91 [0] = {
51 .start = (IDP_ETH_PHYS + 0x300), 92 .start = (IDP_ETH_PHYS + 0x300),
@@ -121,44 +162,28 @@ static struct pxafb_mach_info sharp_lm8v31 = {
121 .num_modes = 1, 162 .num_modes = 1,
122 .cmap_inverse = 0, 163 .cmap_inverse = 0,
123 .cmap_static = 0, 164 .cmap_static = 0,
124 .lccr0 = LCCR0_SDS, 165 .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL |
125 .lccr3 = LCCR3_PCP | LCCR3_Acb(255), 166 LCD_AC_BIAS_FREQ(255),
126 .pxafb_backlight_power = &idp_backlight_power, 167 .pxafb_backlight_power = &idp_backlight_power,
127 .pxafb_lcd_power = &idp_lcd_power 168 .pxafb_lcd_power = &idp_lcd_power
128}; 169};
129 170
130static int idp_mci_init(struct device *dev, irq_handler_t idp_detect_int, void *data)
131{
132 /* setup GPIO for PXA25x MMC controller */
133 pxa_gpio_mode(GPIO6_MMCCLK_MD);
134 pxa_gpio_mode(GPIO8_MMCCS0_MD);
135
136 return 0;
137}
138
139static struct pxamci_platform_data idp_mci_platform_data = { 171static struct pxamci_platform_data idp_mci_platform_data = {
140 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 172 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
141 .init = idp_mci_init,
142}; 173};
143 174
144static void __init idp_init(void) 175static void __init idp_init(void)
145{ 176{
146 printk("idp_init()\n"); 177 printk("idp_init()\n");
147 178
179 pxa2xx_mfp_config(ARRAY_AND_SIZE(idp_pin_config));
180
148 platform_device_register(&smc91x_device); 181 platform_device_register(&smc91x_device);
149 //platform_device_register(&mst_audio_device); 182 //platform_device_register(&mst_audio_device);
150 set_pxa_fb_info(&sharp_lm8v31); 183 set_pxa_fb_info(&sharp_lm8v31);
151 pxa_set_mci_info(&idp_mci_platform_data); 184 pxa_set_mci_info(&idp_mci_platform_data);
152} 185}
153 186
154static void __init idp_init_irq(void)
155{
156
157 pxa25x_init_irq();
158
159 set_irq_type(TOUCH_PANEL_IRQ, TOUCH_PANEL_IRQ_EDGE);
160}
161
162static struct map_desc idp_io_desc[] __initdata = { 187static struct map_desc idp_io_desc[] __initdata = {
163 { 188 {
164 .virtual = IDP_COREVOLT_VIRT, 189 .virtual = IDP_COREVOLT_VIRT,
@@ -177,15 +202,6 @@ static void __init idp_map_io(void)
177{ 202{
178 pxa_map_io(); 203 pxa_map_io();
179 iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc)); 204 iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc));
180
181 // serial ports 2 & 3
182 pxa_gpio_mode(GPIO42_BTRXD_MD);
183 pxa_gpio_mode(GPIO43_BTTXD_MD);
184 pxa_gpio_mode(GPIO44_BTCTS_MD);
185 pxa_gpio_mode(GPIO45_BTRTS_MD);
186 pxa_gpio_mode(GPIO46_STRXD_MD);
187 pxa_gpio_mode(GPIO47_STTXD_MD);
188
189} 205}
190 206
191 207
@@ -194,7 +210,7 @@ MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
194 .phys_io = 0x40000000, 210 .phys_io = 0x40000000,
195 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 211 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
196 .map_io = idp_map_io, 212 .map_io = idp_map_io,
197 .init_irq = idp_init_irq, 213 .init_irq = pxa25x_init_irq,
198 .timer = &pxa_timer, 214 .timer = &pxa_timer,
199 .init_machine = idp_init, 215 .init_machine = idp_init,
200MACHINE_END 216MACHINE_END
diff --git a/arch/arm/mach-pxa/include/mach/akita.h b/arch/arm/mach-pxa/include/mach/akita.h
deleted file mode 100644
index 5d8cc1d9cb10..000000000000
--- a/arch/arm/mach-pxa/include/mach/akita.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * Hardware specific definitions for SL-C1000 (Akita)
3 *
4 * Copyright (c) 2005 Richard Purdie
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12/* Akita IO Expander GPIOs */
13
14#define AKITA_IOEXP_RESERVED_7 (1 << 7)
15#define AKITA_IOEXP_IR_ON (1 << 6)
16#define AKITA_IOEXP_AKIN_PULLUP (1 << 5)
17#define AKITA_IOEXP_BACKLIGHT_CONT (1 << 4)
18#define AKITA_IOEXP_BACKLIGHT_ON (1 << 3)
19#define AKITA_IOEXP_MIC_BIAS (1 << 2)
20#define AKITA_IOEXP_RESERVED_1 (1 << 1)
21#define AKITA_IOEXP_RESERVED_0 (1 << 0)
22
23/* Direction Bitfield 0=output 1=input */
24#define AKITA_IOEXP_IO_DIR 0
25/* Default Values */
26#define AKITA_IOEXP_IO_OUT (AKITA_IOEXP_IR_ON | AKITA_IOEXP_AKIN_PULLUP)
27
28extern struct platform_device akitaioexp_device;
29
30void akita_set_ioexp(struct device *dev, unsigned char bitmask);
31void akita_reset_ioexp(struct device *dev, unsigned char bitmask);
32
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index bf856503baf6..585970ef08ce 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -98,12 +98,21 @@
98 CORGI_SCP_MIC_BIAS ) 98 CORGI_SCP_MIC_BIAS )
99#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) 99#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R )
100 100
101#define CORGI_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO)
102#define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0)
103#define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */
104#define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */
105#define CORGI_GPIO_MUTE_L (CORGI_SCOOP_GPIO_BASE + 3)
106#define CORGI_GPIO_MUTE_R (CORGI_SCOOP_GPIO_BASE + 4)
107#define CORGI_GPIO_AKIN_PULLUP (CORGI_SCOOP_GPIO_BASE + 5)
108#define CORGI_GPIO_APM_ON (CORGI_SCOOP_GPIO_BASE + 6)
109#define CORGI_GPIO_BACKLIGHT_CONT (CORGI_SCOOP_GPIO_BASE + 7)
110#define CORGI_GPIO_MIC_BIAS (CORGI_SCOOP_GPIO_BASE + 8)
101 111
102/* 112/*
103 * Shared data structures 113 * Shared data structures
104 */ 114 */
105extern struct platform_device corgiscoop_device; 115extern struct platform_device corgiscoop_device;
106extern struct platform_device corgissp_device;
107 116
108#endif /* __ASM_ARCH_CORGI_H */ 117#endif /* __ASM_ARCH_CORGI_H */
109 118
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
index 79d209b826f4..5c4e320c1437 100644
--- a/arch/arm/mach-pxa/include/mach/littleton.h
+++ b/arch/arm/mach-pxa/include/mach/littleton.h
@@ -3,4 +3,6 @@
3 3
4#define LITTLETON_ETH_PHYS 0x30000000 4#define LITTLETON_ETH_PHYS 0x30000000
5 5
6#define LITTLETON_GPIO_LCD_CS (17)
7
6#endif /* __ASM_ARCH_ZYLONITE_H */ 8#endif /* __ASM_ARCH_ZYLONITE_H */
diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h
index 552eb7fa6579..59aef89808d6 100644
--- a/arch/arm/mach-pxa/include/mach/memory.h
+++ b/arch/arm/mach-pxa/include/mach/memory.h
@@ -40,11 +40,11 @@
40#define NODE_MEM_SIZE_BITS 26 40#define NODE_MEM_SIZE_BITS 26
41 41
42#if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) 42#if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
43void cmx270_pci_adjust_zones(int node, unsigned long *size, 43void cmx2xx_pci_adjust_zones(int node, unsigned long *size,
44 unsigned long *holes); 44 unsigned long *holes);
45 45
46#define arch_adjust_zones(node, size, holes) \ 46#define arch_adjust_zones(node, size, holes) \
47 cmx270_pci_adjust_zones(node, size, holes) 47 cmx2xx_pci_adjust_zones(node, size, holes)
48 48
49#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1) 49#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1)
50#endif 50#endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
index 6c8e72238bfd..617cab2cc8d0 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
@@ -17,7 +17,7 @@
17 17
18/* Crystal and Clock Signals */ 18/* Crystal and Clock Signals */
19#define GPIO10_RTCCLK MFP_CFG_OUT(GPIO10, AF1, DRIVE_LOW) 19#define GPIO10_RTCCLK MFP_CFG_OUT(GPIO10, AF1, DRIVE_LOW)
20#define GPIO70_RTC_CLK MFP_CFG_OUT(GPIO70, AF1, DRIVE_LOW) 20#define GPIO70_RTCCLK MFP_CFG_OUT(GPIO70, AF1, DRIVE_LOW)
21#define GPIO7_48MHz MFP_CFG_OUT(GPIO7, AF1, DRIVE_LOW) 21#define GPIO7_48MHz MFP_CFG_OUT(GPIO7, AF1, DRIVE_LOW)
22#define GPIO11_3_6MHz MFP_CFG_OUT(GPIO11, AF1, DRIVE_LOW) 22#define GPIO11_3_6MHz MFP_CFG_OUT(GPIO11, AF1, DRIVE_LOW)
23#define GPIO71_3_6MHz MFP_CFG_OUT(GPIO71, AF1, DRIVE_LOW) 23#define GPIO71_3_6MHz MFP_CFG_OUT(GPIO71, AF1, DRIVE_LOW)
@@ -156,6 +156,6 @@
156#define GPIO74_LCD_FCLK MFP_CFG_OUT(GPIO74, AF2, DRIVE_LOW) 156#define GPIO74_LCD_FCLK MFP_CFG_OUT(GPIO74, AF2, DRIVE_LOW)
157#define GPIO75_LCD_LCLK MFP_CFG_OUT(GPIO75, AF2, DRIVE_LOW) 157#define GPIO75_LCD_LCLK MFP_CFG_OUT(GPIO75, AF2, DRIVE_LOW)
158#define GPIO76_LCD_PCLK MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW) 158#define GPIO76_LCD_PCLK MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW)
159#define GPIO77_LCD_ACBIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW) 159#define GPIO77_LCD_BIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW)
160 160
161#endif /* __ASM_ARCH_MFP_PXA25X_H */ 161#endif /* __ASM_ARCH_MFP_PXA25X_H */
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
index 74990510cf34..67f8385ea548 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
@@ -257,10 +257,10 @@
257#define GPIO38_SSP2_RXD MFP_CFG(GPIO38, AF2) 257#define GPIO38_SSP2_RXD MFP_CFG(GPIO38, AF2)
258#define GPIO38_SSP2_TXD MFP_CFG(GPIO38, AF5) 258#define GPIO38_SSP2_TXD MFP_CFG(GPIO38, AF5)
259 259
260#define GPIO69_SSP3_SCLK MFP_CFG(GPIO69, AF2, DS08X, FLOAT) 260#define GPIO69_SSP3_SCLK MFP_CFG_X(GPIO69, AF2, DS08X, FLOAT)
261#define GPIO70_SSP3_FRM MFP_CFG(GPIO70, AF2, DS08X, DRIVE_LOW) 261#define GPIO70_SSP3_FRM MFP_CFG_X(GPIO70, AF2, DS08X, DRIVE_LOW)
262#define GPIO89_SSP3_SCLK MFP_CFG(GPIO89, AF1, DS08X, FLOAT) 262#define GPIO89_SSP3_SCLK MFP_CFG_X(GPIO89, AF1, DS08X, FLOAT)
263#define GPIO90_SSP3_FRM MFP_CFG(GPIO90, AF1, DS08X, DRIVE_LOW) 263#define GPIO90_SSP3_FRM MFP_CFG_X(GPIO90, AF1, DS08X, DRIVE_LOW)
264#define GPIO71_SSP3_RXD MFP_CFG_X(GPIO71, AF5, DS08X, FLOAT) 264#define GPIO71_SSP3_RXD MFP_CFG_X(GPIO71, AF5, DS08X, FLOAT)
265#define GPIO71_SSP3_TXD MFP_CFG_X(GPIO71, AF2, DS08X, DRIVE_LOW) 265#define GPIO71_SSP3_TXD MFP_CFG_X(GPIO71, AF2, DS08X, DRIVE_LOW)
266#define GPIO72_SSP3_RXD MFP_CFG_X(GPIO72, AF2, DS08X, FLOAT) 266#define GPIO72_SSP3_RXD MFP_CFG_X(GPIO72, AF2, DS08X, FLOAT)
diff --git a/arch/arm/mach-pxa/include/mach/mfp.h b/arch/arm/mach-pxa/include/mach/mfp.h
index 8769567b389b..482185053a92 100644
--- a/arch/arm/mach-pxa/include/mach/mfp.h
+++ b/arch/arm/mach-pxa/include/mach/mfp.h
@@ -274,12 +274,13 @@ typedef unsigned long mfp_cfg_t;
274#define MFP_DS_MASK (0x7 << 13) 274#define MFP_DS_MASK (0x7 << 13)
275#define MFP_DS(x) (((x) >> 13) & 0x7) 275#define MFP_DS(x) (((x) >> 13) & 0x7)
276 276
277#define MFP_LPM_INPUT (0x0 << 16) 277#define MFP_LPM_DEFAULT (0x0 << 16)
278#define MFP_LPM_DRIVE_LOW (0x1 << 16) 278#define MFP_LPM_DRIVE_LOW (0x1 << 16)
279#define MFP_LPM_DRIVE_HIGH (0x2 << 16) 279#define MFP_LPM_DRIVE_HIGH (0x2 << 16)
280#define MFP_LPM_PULL_LOW (0x3 << 16) 280#define MFP_LPM_PULL_LOW (0x3 << 16)
281#define MFP_LPM_PULL_HIGH (0x4 << 16) 281#define MFP_LPM_PULL_HIGH (0x4 << 16)
282#define MFP_LPM_FLOAT (0x5 << 16) 282#define MFP_LPM_FLOAT (0x5 << 16)
283#define MFP_LPM_INPUT (0x6 << 16)
283#define MFP_LPM_STATE_MASK (0x7 << 16) 284#define MFP_LPM_STATE_MASK (0x7 << 16)
284#define MFP_LPM_STATE(x) (((x) >> 16) & 0x7) 285#define MFP_LPM_STATE(x) (((x) >> 16) & 0x7)
285 286
@@ -297,7 +298,7 @@ typedef unsigned long mfp_cfg_t;
297#define MFP_PULL_MASK (0x3 << 21) 298#define MFP_PULL_MASK (0x3 << 21)
298#define MFP_PULL(x) (((x) >> 21) & 0x3) 299#define MFP_PULL(x) (((x) >> 21) & 0x3)
299 300
300#define MFP_CFG_DEFAULT (MFP_AF0 | MFP_DS03X | MFP_LPM_INPUT |\ 301#define MFP_CFG_DEFAULT (MFP_AF0 | MFP_DS03X | MFP_LPM_DEFAULT |\
301 MFP_LPM_EDGE_NONE | MFP_PULL_NONE) 302 MFP_LPM_EDGE_NONE | MFP_PULL_NONE)
302 303
303#define MFP_CFG(pin, af) \ 304#define MFP_CFG(pin, af) \
diff --git a/arch/arm/mach-pxa/include/mach/mioa701.h b/arch/arm/mach-pxa/include/mach/mioa701.h
new file mode 100644
index 000000000000..8483cb511831
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/mioa701.h
@@ -0,0 +1,67 @@
1#ifndef _MIOA701_H_
2#define _MIOA701_H_
3
4#define MIO_CFG_IN(pin, af) \
5 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK)) |\
6 (MFP_PIN(pin) | MFP_##af | MFP_DIR_IN))
7
8#define MIO_CFG_OUT(pin, af, state) \
9 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK | MFP_LPM_STATE_MASK)) |\
10 (MFP_PIN(pin) | MFP_##af | MFP_DIR_OUT | MFP_LPM_##state))
11
12/* Global GPIOs */
13#define GPIO9_CHARGE_nEN 9
14#define GPIO18_POWEROFF 18
15#define GPIO87_LCD_POWER 87
16
17/* USB */
18#define GPIO13_USB_DETECT 13
19#define GPIO22_USB_ENABLE 22
20
21/* SDIO bits */
22#define GPIO78_SDIO_RO 78
23#define GPIO15_SDIO_INSERT 15
24#define GPIO91_SDIO_EN 91
25
26/* Bluetooth */
27#define GPIO83_BT_ON 83
28
29/* GPS */
30#define GPIO23_GPS_UNKNOWN1 23
31#define GPIO26_GPS_ON 26
32#define GPIO27_GPS_RESET 27
33#define GPIO106_GPS_UNKNOWN2 106
34#define GPIO107_GPS_UNKNOWN3 107
35
36/* GSM */
37#define GPIO24_GSM_MOD_RESET_CMD 24
38#define GPIO88_GSM_nMOD_ON_CMD 88
39#define GPIO90_GSM_nMOD_OFF_CMD 90
40#define GPIO114_GSM_nMOD_DTE_UART_STATE 114
41#define GPIO25_GSM_MOD_ON_STATE 25
42#define GPIO113_GSM_EVENT 113
43
44/* SOUND */
45#define GPIO12_HPJACK_INSERT 12
46
47/* LEDS */
48#define GPIO10_LED_nCharging 10
49#define GPIO97_LED_nBlue 97
50#define GPIO98_LED_nOrange 98
51#define GPIO82_LED_nVibra 82
52#define GPIO115_LED_nKeyboard 115
53
54/* Keyboard */
55#define GPIO0_KEY_POWER 0
56#define GPIO93_KEY_VOLUME_UP 93
57#define GPIO94_KEY_VOLUME_DOWN 94
58
59extern struct input_dev *mioa701_evdev;
60extern void mioa701_gpio_lpm_set(unsigned long mfp_pin);
61
62/* Assembler externals mioa701_bootresume.S */
63extern u32 mioa701_bootstrap;
64extern u32 mioa701_jumpaddr;
65extern u32 mioa701_bootstrap_lg;
66
67#endif /* _MIOA701_H */
diff --git a/arch/arm/mach-pxa/include/mach/palmz72.h b/arch/arm/mach-pxa/include/mach/palmz72.h
new file mode 100644
index 000000000000..8fd30bcecb7c
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/palmz72.h
@@ -0,0 +1,67 @@
1/*
2 * GPIOs and interrupts for Palm Zire72 Handheld Computer
3 *
4 * Authors: Alex Osborne <bobofdoom@gmail.com>
5 * Jan Herman <2hp@seznam.cz>
6 * Sergey Lapin <slapin@ossfans.org>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#ifndef _INCLUDE_PALMZ72_H_
15#define _INCLUDE_PALMZ72_H_
16
17/* Power and control */
18#define GPIO_NR_PALMZ72_GPIO_RESET 1
19#define GPIO_NR_PALMZ72_POWER_DETECT 0
20
21/* SD/MMC */
22#define GPIO_NR_PALMZ72_SD_DETECT_N 14
23#define GPIO_NR_PALMZ72_SD_POWER_N 98
24#define GPIO_NR_PALMZ72_SD_RO 115
25
26/* Touchscreen */
27#define GPIO_NR_PALMZ72_WM9712_IRQ 27
28
29/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */
30#define GPIO_NR_PALMZ72_IR_DISABLE 49
31
32/* USB */
33#define GPIO_NR_PALMZ72_USB_DETECT_N 15
34#define GPIO_NR_PALMZ72_USB_POWER 95
35#define GPIO_NR_PALMZ72_USB_PULLUP 12
36
37/* LCD/Backlight */
38#define GPIO_NR_PALMZ72_BL_POWER 20
39#define GPIO_NR_PALMZ72_LCD_POWER 96
40
41/* LED */
42#define GPIO_NR_PALMZ72_LED_GREEN 88
43
44/* Bluetooth */
45#define GPIO_NR_PALMZ72_BT_POWER 17
46#define GPIO_NR_PALMZ72_BT_RESET 83
47
48/** Initial values **/
49
50/* Battery */
51#define PALMZ72_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
52#define PALMZ72_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
53#define PALMZ72_BAT_MAX_CURRENT 0 /* unknokn */
54#define PALMZ72_BAT_MIN_CURRENT 0 /* unknown */
55#define PALMZ72_BAT_MAX_CHARGE 1 /* unknown */
56#define PALMZ72_BAT_MIN_CHARGE 1 /* unknown */
57#define PALMZ72_MAX_LIFE_MINS 360 /* on-life in minutes */
58
59/* Backlight */
60#define PALMZ72_MAX_INTENSITY 0xFE
61#define PALMZ72_DEFAULT_INTENSITY 0x7E
62#define PALMZ72_LIMIT_MASK 0x7F
63#define PALMZ72_PRESCALER 0x3F
64#define PALMZ72_PERIOD_NS 3500
65
66#endif
67
diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h
index 67debc47e8c6..0b3e6d051c64 100644
--- a/arch/arm/mach-pxa/include/mach/poodle.h
+++ b/arch/arm/mach-pxa/include/mach/poodle.h
@@ -23,6 +23,7 @@
23#define POODLE_GPIO_AC_IN (1) 23#define POODLE_GPIO_AC_IN (1)
24#define POODLE_GPIO_CO 16 24#define POODLE_GPIO_CO 16
25#define POODLE_GPIO_TP_INT (5) 25#define POODLE_GPIO_TP_INT (5)
26#define POODLE_GPIO_TP_CS (24)
26#define POODLE_GPIO_WAKEUP (11) /* change battery */ 27#define POODLE_GPIO_WAKEUP (11) /* change battery */
27#define POODLE_GPIO_GA_INT (10) 28#define POODLE_GPIO_GA_INT (10)
28#define POODLE_GPIO_IR_ON (22) 29#define POODLE_GPIO_IR_ON (22)
@@ -70,6 +71,14 @@
70#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) 71#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
71#define POODLE_SCOOP_IO_OUT ( 0 ) 72#define POODLE_SCOOP_IO_OUT ( 0 )
72 73
74#define POODLE_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO)
75#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0)
76#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2)
77#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7)
78#define POODLE_GPIO_L_PCLK (POODLE_SCOOP_GPIO_BASE + 9)
79#define POODLE_GPIO_L_LCLK (POODLE_SCOOP_GPIO_BASE + 10)
80#define POODLE_GPIO_HS_OUT (POODLE_SCOOP_GPIO_BASE + 11)
81
73#define POODLE_LOCOMO_GPIO_AMP_ON LOCOMO_GPIO(8) 82#define POODLE_LOCOMO_GPIO_AMP_ON LOCOMO_GPIO(8)
74#define POODLE_LOCOMO_GPIO_MUTE_L LOCOMO_GPIO(10) 83#define POODLE_LOCOMO_GPIO_MUTE_L LOCOMO_GPIO(10)
75#define POODLE_LOCOMO_GPIO_MUTE_R LOCOMO_GPIO(11) 84#define POODLE_LOCOMO_GPIO_MUTE_R LOCOMO_GPIO(11)
diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h
index bd14365f7ed5..31ac26b55bc1 100644
--- a/arch/arm/mach-pxa/include/mach/spitz.h
+++ b/arch/arm/mach-pxa/include/mach/spitz.h
@@ -16,6 +16,7 @@
16#endif 16#endif
17 17
18#include <linux/fb.h> 18#include <linux/fb.h>
19#include <linux/gpio.h>
19 20
20/* Spitz/Akita GPIOs */ 21/* Spitz/Akita GPIOs */
21 22
@@ -100,13 +101,24 @@
100#define SPITZ_SCP_JK_A SCOOP_GPCR_PA18 /* Low */ 101#define SPITZ_SCP_JK_A SCOOP_GPCR_PA18 /* Low */
101#define SPITZ_SCP_ADC_TEMP_ON SCOOP_GPCR_PA19 /* Low */ 102#define SPITZ_SCP_ADC_TEMP_ON SCOOP_GPCR_PA19 /* Low */
102 103
103#define SPITZ_SCP_IO_DIR (SPITZ_SCP_LED_GREEN | SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \ 104#define SPITZ_SCP_IO_DIR (SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \
104 SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_LED_ORANGE | \ 105 SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | \
105 SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) 106 SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
106#define SPITZ_SCP_IO_OUT (SPITZ_SCP_CHRG_ON | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R) 107#define SPITZ_SCP_IO_OUT (SPITZ_SCP_CHRG_ON | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R)
107#define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) 108#define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
108#define SPITZ_SCP_SUS_SET 0 109#define SPITZ_SCP_SUS_SET 0
109 110
111#define SPITZ_SCP_GPIO_BASE (NR_BUILTIN_GPIO)
112#define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0)
113#define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1)
114#define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2)
115#define SPITZ_GPIO_MUTE_L (SPITZ_SCP_GPIO_BASE + 3)
116#define SPITZ_GPIO_MUTE_R (SPITZ_SCP_GPIO_BASE + 4)
117#define SPITZ_GPIO_CF_POWER (SPITZ_SCP_GPIO_BASE + 5)
118#define SPITZ_GPIO_LED_ORANGE (SPITZ_SCP_GPIO_BASE + 6)
119#define SPITZ_GPIO_JK_A (SPITZ_SCP_GPIO_BASE + 7)
120#define SPITZ_GPIO_ADC_TEMP_ON (SPITZ_SCP_GPIO_BASE + 8)
121
110/* Spitz Scoop Device (No. 2) GPIOs */ 122/* Spitz Scoop Device (No. 2) GPIOs */
111/* Suspend States in comments */ 123/* Suspend States in comments */
112#define SPITZ_SCP2_IR_ON SCOOP_GPCR_PA11 /* High */ 124#define SPITZ_SCP2_IR_ON SCOOP_GPCR_PA11 /* High */
@@ -119,15 +131,36 @@
119#define SPITZ_SCP2_BACKLIGHT_ON SCOOP_GPCR_PA18 /* Low */ 131#define SPITZ_SCP2_BACKLIGHT_ON SCOOP_GPCR_PA18 /* Low */
120#define SPITZ_SCP2_MIC_BIAS SCOOP_GPCR_PA19 /* Low */ 132#define SPITZ_SCP2_MIC_BIAS SCOOP_GPCR_PA19 /* Low */
121 133
122#define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \ 134#define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \
123 SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ 135 SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \
124 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) 136 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
125 137
126#define SPITZ_SCP2_IO_OUT (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1) 138#define SPITZ_SCP2_IO_OUT (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1)
127#define SPITZ_SCP2_SUS_CLR (SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ 139#define SPITZ_SCP2_SUS_CLR (SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \
128 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) 140 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
129#define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) 141#define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1)
130 142
143#define SPITZ_SCP2_GPIO_BASE (NR_BUILTIN_GPIO + 12)
144#define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0)
145#define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1
146#define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2)
147#define SPITZ_GPIO_RESERVED_2 (SPITZ_SCP2_GPIO_BASE + 3)
148#define SPITZ_GPIO_RESERVED_3 (SPITZ_SCP2_GPIO_BASE + 4)
149#define SPITZ_GPIO_RESERVED_4 (SPITZ_SCP2_GPIO_BASE + 5)
150#define SPITZ_GPIO_BACKLIGHT_CONT (SPITZ_SCP2_GPIO_BASE + 6)
151#define SPITZ_GPIO_BACKLIGHT_ON (SPITZ_SCP2_GPIO_BASE + 7)
152#define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8)
153
154/* Akita IO Expander GPIOs */
155#define AKITA_IOEXP_GPIO_BASE (NR_BUILTIN_GPIO + 12)
156#define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0)
157#define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1)
158#define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2)
159#define AKITA_GPIO_BACKLIGHT_ON (AKITA_IOEXP_GPIO_BASE + 3)
160#define AKITA_GPIO_BACKLIGHT_CONT (AKITA_IOEXP_GPIO_BASE + 4)
161#define AKITA_GPIO_AKIN_PULLUP (AKITA_IOEXP_GPIO_BASE + 5)
162#define AKITA_GPIO_IR_ON (AKITA_IOEXP_GPIO_BASE + 6)
163#define AKITA_GPIO_RESERVED_7 (AKITA_IOEXP_GPIO_BASE + 7)
131 164
132/* Spitz IRQ Definitions */ 165/* Spitz IRQ Definitions */
133 166
@@ -154,5 +187,4 @@
154 */ 187 */
155extern struct platform_device spitzscoop_device; 188extern struct platform_device spitzscoop_device;
156extern struct platform_device spitzscoop2_device; 189extern struct platform_device spitzscoop2_device;
157extern struct platform_device spitzssp_device;
158extern struct sharpsl_charger_machinfo spitz_pm_machinfo; 190extern struct sharpsl_charger_machinfo spitz_pm_machinfo;
diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h
index 641d0ec110bb..903e1a2e6641 100644
--- a/arch/arm/mach-pxa/include/mach/trizeps4.h
+++ b/arch/arm/mach-pxa/include/mach/trizeps4.h
@@ -17,11 +17,16 @@
17#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */ 17#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */
18#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */ 18#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */
19 19
20#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board CSFR register */ 20 /* Logic on ConXS-board CSFR register*/
21#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) /* Logic chip on ConXS-Board BOCR register */ 21#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS)
22#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) /* Logic chip on ConXS-Board IRCR register*/ 22 /* Logic on ConXS-board BOCR register*/
23#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) /* Logic chip on ConXS-Board UPSR register*/ 23#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000)
24#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) /* Logic chip on ConXS-Board DICR register*/ 24 /* Logic on ConXS-board IRCR register*/
25#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000)
26 /* Logic on ConXS-board UPSR register*/
27#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000)
28 /* Logic on ConXS-board DICR register*/
29#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000)
25 30
26/* virtual memory regions */ 31/* virtual memory regions */
27#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */ 32#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */
@@ -54,6 +59,15 @@
54#define GPIO_MMC_DET 12 59#define GPIO_MMC_DET 12
55#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET) 60#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET)
56 61
62/* DOC NAND chip */
63#define GPIO_DOC_LOCK 94
64#define GPIO_DOC_IRQ 93
65#define TRIZEPS4_DOC_IRQ IRQ_GPIO(GPIO_DOC_IRQ)
66
67/* SPI interface */
68#define GPIO_SPI 53
69#define TRIZEPS4_SPI_IRQ IRQ_GPIO(GPIO_SPI)
70
57/* LEDS using tx2 / rx2 */ 71/* LEDS using tx2 / rx2 */
58#define GPIO_SYS_BUSY_LED 46 72#define GPIO_SYS_BUSY_LED 46
59#define GPIO_HEARTBEAT_LED 47 73#define GPIO_HEARTBEAT_LED 47
@@ -62,24 +76,66 @@
62#define GPIO_PIC 0 76#define GPIO_PIC 0
63#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) 77#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC)
64 78
65#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) 79#ifdef CONFIG_MACH_TRIZEPS_CONXS
66#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) 80/* for CONXS base board define these registers */
81#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT)
82#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS)
67 83
68#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) 84#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT)
69#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) 85#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS)
70 86
71#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) 87#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT)
72#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) 88#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS)
89
90#define IRCR_P2V(x) ((x) - TRIZEPS4_IRCR_PHYS + TRIZEPS4_IRCR_VIRT)
91#define IRCR_V2P(x) ((x) - TRIZEPS4_IRCR_VIRT + TRIZEPS4_IRCR_PHYS)
73 92
74#ifndef __ASSEMBLY__ 93#ifndef __ASSEMBLY__
75#define ConXS_CFSR (*((volatile unsigned short *)CFSR_P2V(0x0C000000))) 94static inline unsigned short CFSR_readw(void)
76#define ConXS_BCR (*((volatile unsigned short *)BCR_P2V(0x0E000000))) 95{
77#define ConXS_DCR (*((volatile unsigned short *)DCR_P2V(0x0F800000))) 96 /* [Compact Flash Status Register] is read only */
97 return *((unsigned short *)CFSR_P2V(0x0C000000));
98}
99static inline void BCR_writew(unsigned short value)
100{
101 /* [Board Control Regsiter] is write only */
102 *((unsigned short *)BCR_P2V(0x0E000000)) = value;
103}
104static inline void DCR_writew(unsigned short value)
105{
106 /* [Display Control Register] is write only */
107 *((unsigned short *)DCR_P2V(0x0E000000)) = value;
108}
109static inline void IRCR_writew(unsigned short value)
110{
111 /* [InfraRed data Control Register] is write only */
112 *((unsigned short *)IRCR_P2V(0x0E000000)) = value;
113}
78#else 114#else
79#define ConXS_CFSR CFSR_P2V(0x0C000000) 115#define ConXS_CFSR CFSR_P2V(0x0C000000)
80#define ConXS_BCR BCR_P2V(0x0E000000) 116#define ConXS_BCR BCR_P2V(0x0E000000)
81#define ConXS_DCR DCR_P2V(0x0F800000) 117#define ConXS_DCR DCR_P2V(0x0F800000)
118#define ConXS_IRCR IRCR_P2V(0x0F800000)
82#endif 119#endif
120#else
121/* for whatever baseboard define function registers */
122static inline unsigned short CFSR_readw(void)
123{
124 return 0;
125}
126static inline void BCR_writew(unsigned short value)
127{
128 ;
129}
130static inline void DCR_writew(unsigned short value)
131{
132 ;
133}
134static inline void IRCR_writew(unsigned short value)
135{
136 ;
137}
138#endif /* CONFIG_MACH_TRIZEPS_CONXS */
83 139
84#define ConXS_CFSR_BVD_MASK 0x0003 140#define ConXS_CFSR_BVD_MASK 0x0003
85#define ConXS_CFSR_BVD1 (1 << 0) 141#define ConXS_CFSR_BVD1 (1 << 0)
diff --git a/arch/arm/mach-pxa/include/mach/viper.h b/arch/arm/mach-pxa/include/mach/viper.h
new file mode 100644
index 000000000000..10988c270ca3
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/viper.h
@@ -0,0 +1,96 @@
1/*
2 * arch/arm/mach-pxa/include/mach/viper.h
3 *
4 * Author: Ian Campbell
5 * Created: Feb 03, 2003
6 * Copyright: Arcom Control Systems.
7 *
8 * Maintained by Marc Zyngier <maz@misterjones.org>
9 * <marc.zyngier@altran.com>
10 *
11 * Created based on lubbock.h:
12 * Author: Nicolas Pitre
13 * Created: Jun 15, 2001
14 * Copyright: MontaVista Software Inc.
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
19 */
20
21#ifndef ARCH_VIPER_H
22#define ARCH_VIPER_H
23
24#define VIPER_BOOT_PHYS PXA_CS0_PHYS
25#define VIPER_FLASH_PHYS PXA_CS1_PHYS
26#define VIPER_ETH_PHYS PXA_CS2_PHYS
27#define VIPER_USB_PHYS PXA_CS3_PHYS
28#define VIPER_ETH_DATA_PHYS PXA_CS4_PHYS
29#define VIPER_CPLD_PHYS PXA_CS5_PHYS
30
31#define VIPER_CPLD_BASE (0xf0000000)
32#define VIPER_PC104IO_BASE (0xf1000000)
33#define VIPER_USB_BASE (0xf1800000)
34
35#define VIPER_ETH_GPIO (0)
36#define VIPER_CPLD_GPIO (1)
37#define VIPER_USB_GPIO (2)
38#define VIPER_UARTA_GPIO (4)
39#define VIPER_UARTB_GPIO (3)
40#define VIPER_CF_CD_GPIO (32)
41#define VIPER_CF_RDY_GPIO (8)
42#define VIPER_BCKLIGHT_EN_GPIO (9)
43#define VIPER_LCD_EN_GPIO (10)
44#define VIPER_PSU_DATA_GPIO (6)
45#define VIPER_PSU_CLK_GPIO (11)
46#define VIPER_UART_SHDN_GPIO (12)
47#define VIPER_BRIGHTNESS_GPIO (16)
48#define VIPER_PSU_nCS_LD_GPIO (19)
49#define VIPER_UPS_GPIO (20)
50#define VIPER_CF_POWER_GPIO (82)
51#define VIPER_TPM_I2C_SDA_GPIO (26)
52#define VIPER_TPM_I2C_SCL_GPIO (27)
53#define VIPER_RTC_I2C_SDA_GPIO (83)
54#define VIPER_RTC_I2C_SCL_GPIO (84)
55
56#define VIPER_CPLD_P2V(x) ((x) - VIPER_CPLD_PHYS + VIPER_CPLD_BASE)
57#define VIPER_CPLD_V2P(x) ((x) - VIPER_CPLD_BASE + VIPER_CPLD_PHYS)
58
59#ifndef __ASSEMBLY__
60# define __VIPER_CPLD_REG(x) (*((volatile u16 *)VIPER_CPLD_P2V(x)))
61#endif
62
63/* board level registers in the CPLD: (offsets from CPLD_BASE) ... */
64
65/* ... Physical addresses */
66#define _VIPER_LO_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100000)
67#define _VIPER_ICR_PHYS (VIPER_CPLD_PHYS + 0x100002)
68#define _VIPER_HI_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100004)
69#define _VIPER_VERSION_PHYS (VIPER_CPLD_PHYS + 0x100006)
70#define VIPER_UARTA_PHYS (VIPER_CPLD_PHYS + 0x300010)
71#define VIPER_UARTB_PHYS (VIPER_CPLD_PHYS + 0x300000)
72#define _VIPER_SRAM_BASE (VIPER_CPLD_PHYS + 0x800000)
73
74/* ... Virtual addresses */
75#define VIPER_LO_IRQ_STATUS __VIPER_CPLD_REG(_VIPER_LO_IRQ_STATUS)
76#define VIPER_HI_IRQ_STATUS __VIPER_CPLD_REG(_VIPER_HI_IRQ_STATUS)
77#define VIPER_VERSION __VIPER_CPLD_REG(_VIPER_VERSION_PHYS)
78#define VIPER_ICR __VIPER_CPLD_REG(_VIPER_ICR_PHYS)
79
80/* Decode VIPER_VERSION register */
81#define VIPER_CPLD_REVISION(x) (((x) >> 5) & 0x7)
82#define VIPER_BOARD_VERSION(x) (((x) >> 3) & 0x3)
83#define VIPER_BOARD_ISSUE(x) (((x) >> 0) & 0x7)
84
85/* Interrupt and Configuration Register (VIPER_ICR) */
86/* This is a write only register. Only CF_RST is used under Linux */
87
88extern void viper_cf_rst(int state);
89
90#define VIPER_ICR_RETRIG (1 << 0)
91#define VIPER_ICR_AUTO_CLR (1 << 1)
92#define VIPER_ICR_R_DIS (1 << 2)
93#define VIPER_ICR_CF_RST (1 << 3)
94
95#endif
96
diff --git a/arch/arm/mach-pxa/leds-trizeps4.c b/arch/arm/mach-pxa/leds-trizeps4.c
deleted file mode 100644
index 3bc29007df3a..000000000000
--- a/arch/arm/mach-pxa/leds-trizeps4.c
+++ /dev/null
@@ -1,134 +0,0 @@
1/*
2 * linux/arch/arm/mach-pxa/leds-trizeps4.c
3 *
4 * Author: Jürgen Schindele
5 * Created: 20 02, 2006
6 * Copyright: Jürgen Schindele
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/init.h>
14
15#include <mach/hardware.h>
16#include <asm/system.h>
17#include <asm/types.h>
18#include <asm/leds.h>
19
20#include <mach/pxa-regs.h>
21#include <mach/pxa2xx-gpio.h>
22#include <mach/trizeps4.h>
23
24#include "leds.h"
25
26#define LED_STATE_ENABLED 1
27#define LED_STATE_CLAIMED 2
28
29#define SYS_BUSY 0x01
30#define HEARTBEAT 0x02
31#define BLINK 0x04
32
33static unsigned int led_state;
34static unsigned int hw_led_state;
35
36void trizeps4_leds_event(led_event_t evt)
37{
38 unsigned long flags;
39
40 local_irq_save(flags);
41
42 switch (evt) {
43 case led_start:
44 hw_led_state = 0;
45 pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
46 pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
47 led_state = LED_STATE_ENABLED;
48 break;
49
50 case led_stop:
51 led_state &= ~LED_STATE_ENABLED;
52 break;
53
54 case led_claim:
55 led_state |= LED_STATE_CLAIMED;
56 hw_led_state = 0;
57 break;
58
59 case led_release:
60 led_state &= ~LED_STATE_CLAIMED;
61 hw_led_state = 0;
62 break;
63
64#ifdef CONFIG_LEDS_TIMER
65 case led_timer:
66 hw_led_state ^= HEARTBEAT;
67 break;
68#endif
69
70#ifdef CONFIG_LEDS_CPU
71 case led_idle_start:
72 hw_led_state &= ~SYS_BUSY;
73 break;
74
75 case led_idle_end:
76 hw_led_state |= SYS_BUSY;
77 break;
78#endif
79
80 case led_halted:
81 break;
82
83 case led_green_on:
84 hw_led_state |= BLINK;
85 break;
86
87 case led_green_off:
88 hw_led_state &= ~BLINK;
89 break;
90
91 case led_amber_on:
92 break;
93
94 case led_amber_off:
95 break;
96
97 case led_red_on:
98 break;
99
100 case led_red_off:
101 break;
102
103 default:
104 break;
105 }
106
107 if (led_state & LED_STATE_ENABLED) {
108 switch (hw_led_state) {
109 case 0:
110 GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
111 GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
112 break;
113 case 1:
114 GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
115 GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
116 break;
117 case 2:
118 GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
119 GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
120 break;
121 case 3:
122 GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
123 GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
124 break;
125 }
126 }
127 else {
128 /* turn all off */
129 GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
130 GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
131 }
132
133 local_irq_restore(flags);
134}
diff --git a/arch/arm/mach-pxa/leds.c b/arch/arm/mach-pxa/leds.c
index e13eb841e48d..bbe4d5f6afaa 100644
--- a/arch/arm/mach-pxa/leds.c
+++ b/arch/arm/mach-pxa/leds.c
@@ -24,8 +24,6 @@ pxa_leds_init(void)
24 leds_event = mainstone_leds_event; 24 leds_event = mainstone_leds_event;
25 if (machine_is_pxa_idp()) 25 if (machine_is_pxa_idp())
26 leds_event = idp_leds_event; 26 leds_event = idp_leds_event;
27 if (machine_is_trizeps4())
28 leds_event = trizeps4_leds_event;
29 27
30 leds_event(led_start); 28 leds_event(led_start);
31 return 0; 29 return 0;
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 58f3402a0375..b4d00aba0e31 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -20,6 +20,7 @@
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/spi/spi.h>
23#include <linux/smc91x.h> 24#include <linux/smc91x.h>
24 25
25#include <asm/types.h> 26#include <asm/types.h>
@@ -38,6 +39,7 @@
38#include <mach/gpio.h> 39#include <mach/gpio.h>
39#include <mach/pxafb.h> 40#include <mach/pxafb.h>
40#include <mach/ssp.h> 41#include <mach/ssp.h>
42#include <mach/pxa2xx_spi.h>
41#include <mach/pxa27x_keypad.h> 43#include <mach/pxa27x_keypad.h>
42#include <mach/pxa3xx_nand.h> 44#include <mach/pxa3xx_nand.h>
43#include <mach/littleton.h> 45#include <mach/littleton.h>
@@ -72,8 +74,8 @@ static mfp_cfg_t littleton_mfp_cfg[] __initdata = {
72 74
73 /* SSP2 */ 75 /* SSP2 */
74 GPIO25_SSP2_SCLK, 76 GPIO25_SSP2_SCLK,
75 GPIO17_SSP2_FRM,
76 GPIO27_SSP2_TXD, 77 GPIO27_SSP2_TXD,
78 GPIO17_GPIO, /* SFRM as chip-select */
77 79
78 /* Debug Ethernet */ 80 /* Debug Ethernet */
79 GPIO90_GPIO, 81 GPIO90_GPIO,
@@ -123,160 +125,6 @@ static struct platform_device smc91x_device = {
123}; 125};
124 126
125#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) 127#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
126/* use bit 30, 31 as the indicator of command parameter number */
127#define CMD0(x) ((0x00000000) | ((x) << 9))
128#define CMD1(x, x1) ((0x40000000) | ((x) << 9) | 0x100 | (x1))
129#define CMD2(x, x1, x2) ((0x80000000) | ((x) << 18) | 0x20000 |\
130 ((x1) << 9) | 0x100 | (x2))
131
132static uint32_t lcd_panel_reset[] = {
133 CMD0(0x1), /* reset */
134 CMD0(0x0), /* nop */
135 CMD0(0x0), /* nop */
136 CMD0(0x0), /* nop */
137};
138
139static uint32_t lcd_panel_on[] = {
140 CMD0(0x29), /* Display ON */
141 CMD2(0xB8, 0xFF, 0xF9), /* Output Control */
142 CMD0(0x11), /* Sleep out */
143 CMD1(0xB0, 0x16), /* Wake */
144};
145
146static uint32_t lcd_panel_off[] = {
147 CMD0(0x28), /* Display OFF */
148 CMD2(0xB8, 0x80, 0x02), /* Output Control */
149 CMD0(0x10), /* Sleep in */
150 CMD1(0xB0, 0x00), /* Deep stand by in */
151};
152
153static uint32_t lcd_vga_pass_through[] = {
154 CMD1(0xB0, 0x16),
155 CMD1(0xBC, 0x80),
156 CMD1(0xE1, 0x00),
157 CMD1(0x36, 0x50),
158 CMD1(0x3B, 0x00),
159};
160
161static uint32_t lcd_qvga_pass_through[] = {
162 CMD1(0xB0, 0x16),
163 CMD1(0xBC, 0x81),
164 CMD1(0xE1, 0x00),
165 CMD1(0x36, 0x50),
166 CMD1(0x3B, 0x22),
167};
168
169static uint32_t lcd_vga_transfer[] = {
170 CMD1(0xcf, 0x02), /* Blanking period control (1) */
171 CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
172 CMD1(0xd1, 0x01), /* CKV timing control on/off */
173 CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */
174 CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */
175 CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */
176 CMD1(0xd5, 0x14), /* ASW timing control (2) */
177 CMD0(0x21), /* Invert for normally black display */
178 CMD0(0x29), /* Display on */
179};
180
181static uint32_t lcd_qvga_transfer[] = {
182 CMD1(0xd6, 0x02), /* Blanking period control (1) */
183 CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */
184 CMD1(0xd8, 0x01), /* CKV timing control on/off */
185 CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */
186 CMD2(0xde, 0x05, 0x0a), /* OEV timing control */
187 CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */
188 CMD1(0xe0, 0x0a), /* ASW timing control (2) */
189 CMD0(0x21), /* Invert for normally black display */
190 CMD0(0x29), /* Display on */
191};
192
193static uint32_t lcd_panel_config[] = {
194 CMD2(0xb8, 0xff, 0xf9), /* Output control */
195 CMD0(0x11), /* sleep out */
196 CMD1(0xba, 0x01), /* Display mode (1) */
197 CMD1(0xbb, 0x00), /* Display mode (2) */
198 CMD1(0x3a, 0x60), /* Display mode 18-bit RGB */
199 CMD1(0xbf, 0x10), /* Drive system change control */
200 CMD1(0xb1, 0x56), /* Booster operation setup */
201 CMD1(0xb2, 0x33), /* Booster mode setup */
202 CMD1(0xb3, 0x11), /* Booster frequency setup */
203 CMD1(0xb4, 0x02), /* Op amp/system clock */
204 CMD1(0xb5, 0x35), /* VCS voltage */
205 CMD1(0xb6, 0x40), /* VCOM voltage */
206 CMD1(0xb7, 0x03), /* External display signal */
207 CMD1(0xbd, 0x00), /* ASW slew rate */
208 CMD1(0xbe, 0x00), /* Dummy data for QuadData operation */
209 CMD1(0xc0, 0x11), /* Sleep out FR count (A) */
210 CMD1(0xc1, 0x11), /* Sleep out FR count (B) */
211 CMD1(0xc2, 0x11), /* Sleep out FR count (C) */
212 CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */
213 CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */
214 CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */
215 CMD1(0xc6, 0xc0), /* Sleep out FR count (G) */
216 CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */
217 CMD1(0xc8, 0x44), /* Gamma 1 fine tuning (2) */
218 CMD1(0xc9, 0x33), /* Gamma 1 inclination adjustment */
219 CMD1(0xca, 0x00), /* Gamma 1 blue offset adjustment */
220 CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */
221};
222
223static void ssp_reconfig(struct ssp_dev *dev, int nparam)
224{
225 static int last_nparam = -1;
226
227 /* check if it is necessary to re-config SSP */
228 if (nparam == last_nparam)
229 return;
230
231 ssp_disable(dev);
232 ssp_config(dev, (nparam == 2) ? 0x0010058a : 0x00100581, 0x18, 0, 0);
233
234 last_nparam = nparam;
235}
236
237static void ssp_send_cmd(uint32_t *cmd, int num)
238{
239 static int ssp_initialized;
240 static struct ssp_dev ssp2;
241
242 int i;
243
244 if (!ssp_initialized) {
245 ssp_init(&ssp2, 2, SSP_NO_IRQ);
246 ssp_initialized = 1;
247 }
248
249 clk_enable(ssp2.ssp->clk);
250 for (i = 0; i < num; i++, cmd++) {
251 ssp_reconfig(&ssp2, (*cmd >> 30) & 0x3);
252 ssp_write_word(&ssp2, *cmd & 0x3fffffff);
253
254 /* FIXME: ssp_flush() is mandatory here to work */
255 ssp_flush(&ssp2);
256 }
257 clk_disable(ssp2.ssp->clk);
258}
259
260static void littleton_lcd_power(int on, struct fb_var_screeninfo *var)
261{
262 if (on) {
263 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_on));
264 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_reset));
265 if (var->xres > 240) {
266 /* VGA */
267 ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_pass_through));
268 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config));
269 ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_transfer));
270 } else {
271 /* QVGA */
272 ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_pass_through));
273 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config));
274 ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_transfer));
275 }
276 } else
277 ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_off));
278}
279
280static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = { 128static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = {
281 [0] = { 129 [0] = {
282 /* VGA */ 130 /* VGA */
@@ -312,7 +160,6 @@ static struct pxafb_mach_info littleton_lcd_info = {
312 .modes = tpo_tdo24mtea1_modes, 160 .modes = tpo_tdo24mtea1_modes,
313 .num_modes = 2, 161 .num_modes = 2,
314 .lcd_conn = LCD_COLOR_TFT_16BPP, 162 .lcd_conn = LCD_COLOR_TFT_16BPP,
315 .pxafb_lcd_power = littleton_lcd_power,
316}; 163};
317 164
318static void littleton_init_lcd(void) 165static void littleton_init_lcd(void)
@@ -323,6 +170,51 @@ static void littleton_init_lcd(void)
323static inline void littleton_init_lcd(void) {}; 170static inline void littleton_init_lcd(void) {};
324#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */ 171#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */
325 172
173#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
174static struct pxa2xx_spi_master littleton_spi_info = {
175 .num_chipselect = 1,
176};
177
178static void littleton_tdo24m_cs(u32 cmd)
179{
180 gpio_set_value(LITTLETON_GPIO_LCD_CS, !(cmd == PXA2XX_CS_ASSERT));
181}
182
183static struct pxa2xx_spi_chip littleton_tdo24m_chip = {
184 .rx_threshold = 1,
185 .tx_threshold = 1,
186 .cs_control = littleton_tdo24m_cs,
187};
188
189static struct spi_board_info littleton_spi_devices[] __initdata = {
190 {
191 .modalias = "tdo24m",
192 .max_speed_hz = 1000000,
193 .bus_num = 2,
194 .chip_select = 0,
195 .controller_data= &littleton_tdo24m_chip,
196 },
197};
198
199static void __init littleton_init_spi(void)
200{
201 int err;
202
203 err = gpio_request(LITTLETON_GPIO_LCD_CS, "LCD_CS");
204 if (err) {
205 pr_warning("failed to request GPIO for LCS CS\n");
206 return;
207 }
208
209 gpio_direction_output(LITTLETON_GPIO_LCD_CS, 1);
210
211 pxa2xx_set_spi_info(2, &littleton_spi_info);
212 spi_register_board_info(ARRAY_AND_SIZE(littleton_spi_devices));
213}
214#else
215static inline void littleton_init_spi(void) {}
216#endif
217
326#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) 218#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
327static unsigned int littleton_matrix_key_map[] = { 219static unsigned int littleton_matrix_key_map[] = {
328 /* KEY(row, col, key_code) */ 220 /* KEY(row, col, key_code) */
@@ -433,6 +325,7 @@ static void __init littleton_init(void)
433 */ 325 */
434 platform_device_register(&smc91x_device); 326 platform_device_register(&smc91x_device);
435 327
328 littleton_init_spi();
436 littleton_init_lcd(); 329 littleton_init_lcd();
437 littleton_init_keypad(); 330 littleton_init_keypad();
438 littleton_init_nand(); 331 littleton_init_nand();
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index b7038948d1d4..7b158e5248ad 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -40,7 +40,7 @@
40 40
41#include <mach/pxa-regs.h> 41#include <mach/pxa-regs.h>
42#include <mach/pxa2xx-regs.h> 42#include <mach/pxa2xx-regs.h>
43#include <mach/pxa2xx-gpio.h> 43#include <mach/mfp-pxa27x.h>
44#include <mach/lpd270.h> 44#include <mach/lpd270.h>
45#include <mach/audio.h> 45#include <mach/audio.h>
46#include <mach/pxafb.h> 46#include <mach/pxafb.h>
@@ -51,6 +51,43 @@
51#include "generic.h" 51#include "generic.h"
52#include "devices.h" 52#include "devices.h"
53 53
54static unsigned long lpd270_pin_config[] __initdata = {
55 /* Chip Selects */
56 GPIO15_nCS_1, /* Mainboard Flash */
57 GPIO78_nCS_2, /* CPLD + Ethernet */
58
59 /* LCD - 16bpp Active TFT */
60 GPIO58_LCD_LDD_0,
61 GPIO59_LCD_LDD_1,
62 GPIO60_LCD_LDD_2,
63 GPIO61_LCD_LDD_3,
64 GPIO62_LCD_LDD_4,
65 GPIO63_LCD_LDD_5,
66 GPIO64_LCD_LDD_6,
67 GPIO65_LCD_LDD_7,
68 GPIO66_LCD_LDD_8,
69 GPIO67_LCD_LDD_9,
70 GPIO68_LCD_LDD_10,
71 GPIO69_LCD_LDD_11,
72 GPIO70_LCD_LDD_12,
73 GPIO71_LCD_LDD_13,
74 GPIO72_LCD_LDD_14,
75 GPIO73_LCD_LDD_15,
76 GPIO74_LCD_FCLK,
77 GPIO75_LCD_LCLK,
78 GPIO76_LCD_PCLK,
79 GPIO77_LCD_BIAS,
80 GPIO16_PWM0_OUT, /* Backlight */
81
82 /* USB Host */
83 GPIO88_USBH1_PWR,
84 GPIO89_USBH1_PEN,
85
86 /* AC97 */
87 GPIO45_AC97_SYSCLK,
88
89 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
90};
54 91
55static unsigned int lpd270_irq_enabled; 92static unsigned int lpd270_irq_enabled;
56 93
@@ -265,8 +302,8 @@ static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
265static struct pxafb_mach_info sharp_lq057q3dc02 = { 302static struct pxafb_mach_info sharp_lq057q3dc02 = {
266 .modes = &sharp_lq057q3dc02_mode, 303 .modes = &sharp_lq057q3dc02_mode,
267 .num_modes = 1, 304 .num_modes = 1,
268 .lccr0 = 0x07800080, 305 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
269 .lccr3 = 0x00400000, 306 LCD_ALTERNATE_MAPPING,
270}; 307};
271 308
272/* 12.1" TFT SVGA (LoLo display number 2) */ 309/* 12.1" TFT SVGA (LoLo display number 2) */
@@ -287,8 +324,8 @@ static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
287static struct pxafb_mach_info sharp_lq121s1dg31 = { 324static struct pxafb_mach_info sharp_lq121s1dg31 = {
288 .modes = &sharp_lq121s1dg31_mode, 325 .modes = &sharp_lq121s1dg31_mode,
289 .num_modes = 1, 326 .num_modes = 1,
290 .lccr0 = 0x07800080, 327 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
291 .lccr3 = 0x00400000, 328 LCD_ALTERNATE_MAPPING,
292}; 329};
293 330
294/* 3.6" TFT QVGA (LoLo display number 3) */ 331/* 3.6" TFT QVGA (LoLo display number 3) */
@@ -309,8 +346,8 @@ static struct pxafb_mode_info sharp_lq036q1da01_mode = {
309static struct pxafb_mach_info sharp_lq036q1da01 = { 346static struct pxafb_mach_info sharp_lq036q1da01 = {
310 .modes = &sharp_lq036q1da01_mode, 347 .modes = &sharp_lq036q1da01_mode,
311 .num_modes = 1, 348 .num_modes = 1,
312 .lccr0 = 0x07800080, 349 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
313 .lccr3 = 0x00400000, 350 LCD_ALTERNATE_MAPPING,
314}; 351};
315 352
316/* 6.4" TFT VGA (LoLo display number 5) */ 353/* 6.4" TFT VGA (LoLo display number 5) */
@@ -331,8 +368,8 @@ static struct pxafb_mode_info sharp_lq64d343_mode = {
331static struct pxafb_mach_info sharp_lq64d343 = { 368static struct pxafb_mach_info sharp_lq64d343 = {
332 .modes = &sharp_lq64d343_mode, 369 .modes = &sharp_lq64d343_mode,
333 .num_modes = 1, 370 .num_modes = 1,
334 .lccr0 = 0x07800080, 371 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
335 .lccr3 = 0x00400000, 372 LCD_ALTERNATE_MAPPING,
336}; 373};
337 374
338/* 10.4" TFT VGA (LoLo display number 7) */ 375/* 10.4" TFT VGA (LoLo display number 7) */
@@ -353,8 +390,8 @@ static struct pxafb_mode_info sharp_lq10d368_mode = {
353static struct pxafb_mach_info sharp_lq10d368 = { 390static struct pxafb_mach_info sharp_lq10d368 = {
354 .modes = &sharp_lq10d368_mode, 391 .modes = &sharp_lq10d368_mode,
355 .num_modes = 1, 392 .num_modes = 1,
356 .lccr0 = 0x07800080, 393 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
357 .lccr3 = 0x00400000, 394 LCD_ALTERNATE_MAPPING,
358}; 395};
359 396
360/* 3.5" TFT QVGA (LoLo display number 8) */ 397/* 3.5" TFT QVGA (LoLo display number 8) */
@@ -375,8 +412,8 @@ static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
375static struct pxafb_mach_info sharp_lq035q7db02_20 = { 412static struct pxafb_mach_info sharp_lq035q7db02_20 = {
376 .modes = &sharp_lq035q7db02_20_mode, 413 .modes = &sharp_lq035q7db02_20_mode,
377 .num_modes = 1, 414 .num_modes = 1,
378 .lccr0 = 0x07800080, 415 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
379 .lccr3 = 0x00400000, 416 LCD_ALTERNATE_MAPPING,
380}; 417};
381 418
382static struct pxafb_mach_info *lpd270_lcd_to_use; 419static struct pxafb_mach_info *lpd270_lcd_to_use;
@@ -413,10 +450,6 @@ static struct platform_device *platform_devices[] __initdata = {
413 450
414static int lpd270_ohci_init(struct device *dev) 451static int lpd270_ohci_init(struct device *dev)
415{ 452{
416 /* setup Port1 GPIO pin. */
417 pxa_gpio_mode(88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
418 pxa_gpio_mode(89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
419
420 /* Set the Power Control Polarity Low and Power Sense 453 /* Set the Power Control Polarity Low and Power Sense
421 Polarity Low to active low. */ 454 Polarity Low to active low. */
422 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) & 455 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
@@ -432,6 +465,8 @@ static struct pxaohci_platform_data lpd270_ohci_platform_data = {
432 465
433static void __init lpd270_init(void) 466static void __init lpd270_init(void)
434{ 467{
468 pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
469
435 lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; 470 lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
436 lpd270_flash_data[1].width = 4; 471 lpd270_flash_data[1].width = 4;
437 472
@@ -442,12 +477,6 @@ static void __init lpd270_init(void)
442 */ 477 */
443 ARB_CNTRL = ARB_CORE_PARK | 0x234; 478 ARB_CNTRL = ARB_CORE_PARK | 0x234;
444 479
445 /*
446 * On LogicPD PXA270, we route AC97_SYSCLK via GPIO45.
447 */
448 pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
449 pxa_gpio_mode(GPIO16_PWM0_MD);
450
451 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 480 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
452 481
453 pxa_set_ac97_info(NULL); 482 pxa_set_ac97_info(NULL);
@@ -473,15 +502,6 @@ static void __init lpd270_map_io(void)
473 pxa_map_io(); 502 pxa_map_io();
474 iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc)); 503 iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
475 504
476 /* initialize sleep mode regs (wake-up sources, etc) */
477 PGSR0 = 0x00008800;
478 PGSR1 = 0x00000002;
479 PGSR2 = 0x0001FC00;
480 PGSR3 = 0x00001F81;
481 PWER = 0xC0000002;
482 PRER = 0x00000002;
483 PFER = 0x00000002;
484
485 /* for use I SRAM as framebuffer. */ 505 /* for use I SRAM as framebuffer. */
486 PSLR |= 0x00000F04; 506 PSLR |= 0x00000F04;
487 PCFR = 0x00000066; 507 PCFR = 0x00000066;
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 4ffdff2d9ff1..ecbfbb9f46a2 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -57,13 +57,36 @@
57 57
58static unsigned long lubbock_pin_config[] __initdata = { 58static unsigned long lubbock_pin_config[] __initdata = {
59 GPIO15_nCS_1, /* CS1 - Flash */ 59 GPIO15_nCS_1, /* CS1 - Flash */
60 GPIO78_nCS_2, /* CS2 - Baseboard FGPA */
60 GPIO79_nCS_3, /* CS3 - SMC ethernet */ 61 GPIO79_nCS_3, /* CS3 - SMC ethernet */
62 GPIO80_nCS_4, /* CS4 - SA1111 */
61 63
62 /* SSP data pins */ 64 /* SSP data pins */
63 GPIO23_SSP1_SCLK, 65 GPIO23_SSP1_SCLK,
64 GPIO25_SSP1_TXD, 66 GPIO25_SSP1_TXD,
65 GPIO26_SSP1_RXD, 67 GPIO26_SSP1_RXD,
66 68
69 /* LCD - 16bpp DSTN */
70 GPIO58_LCD_LDD_0,
71 GPIO59_LCD_LDD_1,
72 GPIO60_LCD_LDD_2,
73 GPIO61_LCD_LDD_3,
74 GPIO62_LCD_LDD_4,
75 GPIO63_LCD_LDD_5,
76 GPIO64_LCD_LDD_6,
77 GPIO65_LCD_LDD_7,
78 GPIO66_LCD_LDD_8,
79 GPIO67_LCD_LDD_9,
80 GPIO68_LCD_LDD_10,
81 GPIO69_LCD_LDD_11,
82 GPIO70_LCD_LDD_12,
83 GPIO71_LCD_LDD_13,
84 GPIO72_LCD_LDD_14,
85 GPIO73_LCD_LDD_15,
86 GPIO74_LCD_FCLK,
87 GPIO75_LCD_LCLK,
88 GPIO76_LCD_PCLK,
89
67 /* BTUART */ 90 /* BTUART */
68 GPIO42_BTUART_RXD, 91 GPIO42_BTUART_RXD,
69 GPIO43_BTUART_TXD, 92 GPIO43_BTUART_TXD,
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 143f28adaf95..8ebdac7e9a13 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -409,7 +409,7 @@ static struct platform_device backlight = {
409 * LEDs 409 * LEDs
410 */ 410 */
411 411
412struct gpio_led gpio_leds[] = { 412static struct gpio_led gpio_leds[] = {
413 { 413 {
414 .name = "magician::vibra", 414 .name = "magician::vibra",
415 .default_trigger = "none", 415 .default_trigger = "none",
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 925575f10acf..3ee1f39062e9 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -25,7 +25,12 @@
25 25
26#include "generic.h" 26#include "generic.h"
27 27
28#define PGSR(x) __REG2(0x40F00020, ((x) & 0x60) >> 3) 28#define gpio_to_bank(gpio) ((gpio) >> 5)
29
30#define PGSR(x) __REG2(0x40F00020, (x) << 2)
31#define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3)
32#define GAFR_L(x) __GAFR(0, x)
33#define GAFR_U(x) __GAFR(1, x)
29 34
30#define PWER_WE35 (1 << 24) 35#define PWER_WE35 (1 << 24)
31 36
@@ -38,49 +43,59 @@ struct gpio_desc {
38}; 43};
39 44
40static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1]; 45static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
46static int gpio_nr;
41 47
42static int __mfp_config_lpm(unsigned gpio, unsigned long lpm) 48static unsigned long gpdr_lpm[4];
43{
44 unsigned mask = GPIO_bit(gpio);
45
46 /* low power state */
47 switch (lpm) {
48 case MFP_LPM_DRIVE_HIGH:
49 PGSR(gpio) |= mask;
50 break;
51 case MFP_LPM_DRIVE_LOW:
52 PGSR(gpio) &= ~mask;
53 break;
54 case MFP_LPM_INPUT:
55 break;
56 default:
57 pr_warning("%s: invalid low power state for GPIO%d\n",
58 __func__, gpio);
59 return -EINVAL;
60 }
61 return 0;
62}
63 49
64static int __mfp_config_gpio(unsigned gpio, unsigned long c) 50static int __mfp_config_gpio(unsigned gpio, unsigned long c)
65{ 51{
66 unsigned long gafr, mask = GPIO_bit(gpio); 52 unsigned long gafr, mask = GPIO_bit(gpio);
67 int fn; 53 int bank = gpio_to_bank(gpio);
54 int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
55 int shft = (gpio & 0xf) << 1;
56 int fn = MFP_AF(c);
57 int dir = c & MFP_DIR_OUT;
68 58
69 fn = MFP_AF(c);
70 if (fn > 3) 59 if (fn > 3)
71 return -EINVAL; 60 return -EINVAL;
72 61
73 /* alternate function and direction */ 62 /* alternate function and direction at run-time */
74 gafr = GAFR(gpio) & ~(0x3 << ((gpio & 0xf) * 2)); 63 gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank);
75 GAFR(gpio) = gafr | (fn << ((gpio & 0xf) * 2)); 64 gafr = (gafr & ~(0x3 << shft)) | (fn << shft);
76 65
77 if (c & MFP_DIR_OUT) 66 if (uorl == 0)
67 GAFR_L(bank) = gafr;
68 else
69 GAFR_U(bank) = gafr;
70
71 if (dir == MFP_DIR_OUT)
78 GPDR(gpio) |= mask; 72 GPDR(gpio) |= mask;
79 else 73 else
80 GPDR(gpio) &= ~mask; 74 GPDR(gpio) &= ~mask;
81 75
82 if (__mfp_config_lpm(gpio, c & MFP_LPM_STATE_MASK)) 76 /* alternate function and direction at low power mode */
83 return -EINVAL; 77 switch (c & MFP_LPM_STATE_MASK) {
78 case MFP_LPM_DRIVE_HIGH:
79 PGSR(bank) |= mask;
80 dir = MFP_DIR_OUT;
81 break;
82 case MFP_LPM_DRIVE_LOW:
83 PGSR(bank) &= ~mask;
84 dir = MFP_DIR_OUT;
85 break;
86 case MFP_LPM_DEFAULT:
87 break;
88 default:
89 /* warning and fall through, treat as MFP_LPM_DEFAULT */
90 pr_warning("%s: GPIO%d: unsupported low power mode\n",
91 __func__, gpio);
92 break;
93 }
94
95 if (dir == MFP_DIR_OUT)
96 gpdr_lpm[bank] |= mask;
97 else
98 gpdr_lpm[bank] &= ~mask;
84 99
85 /* give early warning if MFP_LPM_CAN_WAKEUP is set on the 100 /* give early warning if MFP_LPM_CAN_WAKEUP is set on the
86 * configurations of those pins not able to wakeup 101 * configurations of those pins not able to wakeup
@@ -91,7 +106,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
91 return -EINVAL; 106 return -EINVAL;
92 } 107 }
93 108
94 if ((c & MFP_LPM_CAN_WAKEUP) && (c & MFP_DIR_OUT)) { 109 if ((c & MFP_LPM_CAN_WAKEUP) && (dir == MFP_DIR_OUT)) {
95 pr_warning("%s: output GPIO%d unable to wakeup\n", 110 pr_warning("%s: output GPIO%d unable to wakeup\n",
96 __func__, gpio); 111 __func__, gpio);
97 return -EINVAL; 112 return -EINVAL;
@@ -135,7 +150,7 @@ void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
135 150
136void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm) 151void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
137{ 152{
138 unsigned long flags; 153 unsigned long flags, c;
139 int gpio; 154 int gpio;
140 155
141 gpio = __mfp_validate(mfp); 156 gpio = __mfp_validate(mfp);
@@ -143,7 +158,11 @@ void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
143 return; 158 return;
144 159
145 local_irq_save(flags); 160 local_irq_save(flags);
146 __mfp_config_lpm(gpio, lpm); 161
162 c = gpio_desc[gpio].config;
163 c = (c & ~MFP_LPM_STATE_MASK) | lpm;
164 __mfp_config_gpio(gpio, c);
165
147 local_irq_restore(flags); 166 local_irq_restore(flags);
148} 167}
149 168
@@ -187,23 +206,22 @@ int gpio_set_wake(unsigned int gpio, unsigned int on)
187} 206}
188 207
189#ifdef CONFIG_PXA25x 208#ifdef CONFIG_PXA25x
190static int __init pxa25x_mfp_init(void) 209static void __init pxa25x_mfp_init(void)
191{ 210{
192 int i; 211 int i;
193 212
194 if (cpu_is_pxa25x()) { 213 for (i = 0; i <= 84; i++)
195 for (i = 0; i <= 84; i++) 214 gpio_desc[i].valid = 1;
196 gpio_desc[i].valid = 1;
197 215
198 for (i = 0; i <= 15; i++) { 216 for (i = 0; i <= 15; i++) {
199 gpio_desc[i].can_wakeup = 1; 217 gpio_desc[i].can_wakeup = 1;
200 gpio_desc[i].mask = GPIO_bit(i); 218 gpio_desc[i].mask = GPIO_bit(i);
201 }
202 } 219 }
203 220
204 return 0; 221 gpio_nr = 85;
205} 222}
206postcore_initcall(pxa25x_mfp_init); 223#else
224static inline void pxa25x_mfp_init(void) {}
207#endif /* CONFIG_PXA25x */ 225#endif /* CONFIG_PXA25x */
208 226
209#ifdef CONFIG_PXA27x 227#ifdef CONFIG_PXA27x
@@ -233,45 +251,103 @@ int keypad_set_wake(unsigned int on)
233 return 0; 251 return 0;
234} 252}
235 253
236static int __init pxa27x_mfp_init(void) 254static void __init pxa27x_mfp_init(void)
237{ 255{
238 int i, gpio; 256 int i, gpio;
239 257
240 if (cpu_is_pxa27x()) { 258 for (i = 0; i <= 120; i++) {
241 for (i = 0; i <= 120; i++) { 259 /* skip GPIO2, 5, 6, 7, 8, they are not
242 /* skip GPIO2, 5, 6, 7, 8, they are not 260 * valid pins allow configuration
243 * valid pins allow configuration 261 */
244 */ 262 if (i == 2 || i == 5 || i == 6 || i == 7 || i == 8)
245 if (i == 2 || i == 5 || i == 6 || 263 continue;
246 i == 7 || i == 8)
247 continue;
248 264
249 gpio_desc[i].valid = 1; 265 gpio_desc[i].valid = 1;
250 } 266 }
251 267
252 /* Keypad GPIOs */ 268 /* Keypad GPIOs */
253 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) { 269 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
254 gpio = pxa27x_pkwr_gpio[i]; 270 gpio = pxa27x_pkwr_gpio[i];
255 gpio_desc[gpio].can_wakeup = 1; 271 gpio_desc[gpio].can_wakeup = 1;
256 gpio_desc[gpio].keypad_gpio = 1; 272 gpio_desc[gpio].keypad_gpio = 1;
257 gpio_desc[gpio].mask = 1 << i; 273 gpio_desc[gpio].mask = 1 << i;
258 } 274 }
259 275
260 /* Overwrite GPIO13 as a PWER wakeup source */ 276 /* Overwrite GPIO13 as a PWER wakeup source */
261 for (i = 0; i <= 15; i++) { 277 for (i = 0; i <= 15; i++) {
262 /* skip GPIO2, 5, 6, 7, 8 */ 278 /* skip GPIO2, 5, 6, 7, 8 */
263 if (GPIO_bit(i) & 0x1e4) 279 if (GPIO_bit(i) & 0x1e4)
264 continue; 280 continue;
265 281
266 gpio_desc[i].can_wakeup = 1; 282 gpio_desc[i].can_wakeup = 1;
267 gpio_desc[i].mask = GPIO_bit(i); 283 gpio_desc[i].mask = GPIO_bit(i);
268 } 284 }
285
286 gpio_desc[35].can_wakeup = 1;
287 gpio_desc[35].mask = PWER_WE35;
288
289 gpio_nr = 121;
290}
291#else
292static inline void pxa27x_mfp_init(void) {}
293#endif /* CONFIG_PXA27x */
294
295#ifdef CONFIG_PM
296static unsigned long saved_gafr[2][4];
297static unsigned long saved_gpdr[4];
298
299static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
300{
301 int i;
302
303 for (i = 0; i <= gpio_to_bank(gpio_nr); i++) {
269 304
270 gpio_desc[35].can_wakeup = 1; 305 saved_gafr[0][i] = GAFR_L(i);
271 gpio_desc[35].mask = PWER_WE35; 306 saved_gafr[1][i] = GAFR_U(i);
307 saved_gpdr[i] = GPDR(i * 32);
308
309 GPDR(i * 32) = gpdr_lpm[i];
272 } 310 }
311 return 0;
312}
273 313
314static int pxa2xx_mfp_resume(struct sys_device *d)
315{
316 int i;
317
318 for (i = 0; i <= gpio_to_bank(gpio_nr); i++) {
319 GAFR_L(i) = saved_gafr[0][i];
320 GAFR_U(i) = saved_gafr[1][i];
321 GPDR(i * 32) = saved_gpdr[i];
322 }
323 PSSR = PSSR_RDH | PSSR_PH;
274 return 0; 324 return 0;
275} 325}
276postcore_initcall(pxa27x_mfp_init); 326#else
277#endif /* CONFIG_PXA27x */ 327#define pxa2xx_mfp_suspend NULL
328#define pxa2xx_mfp_resume NULL
329#endif
330
331struct sysdev_class pxa2xx_mfp_sysclass = {
332 .name = "mfp",
333 .suspend = pxa2xx_mfp_suspend,
334 .resume = pxa2xx_mfp_resume,
335};
336
337static int __init pxa2xx_mfp_init(void)
338{
339 int i;
340
341 if (cpu_is_pxa25x())
342 pxa25x_mfp_init();
343
344 if (cpu_is_pxa27x())
345 pxa27x_mfp_init();
346
347 /* initialize gafr_run[], pgsr_lpm[] from existing values */
348 for (i = 0; i <= gpio_to_bank(gpio_nr); i++)
349 gpdr_lpm[i] = GPDR(i * 32);
350
351 return sysdev_class_register(&pxa2xx_mfp_sysclass);
352}
353postcore_initcall(pxa2xx_mfp_init);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
new file mode 100644
index 000000000000..0842c531ee4d
--- /dev/null
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -0,0 +1,905 @@
1/*
2 * Handles the Mitac Mio A701 Board
3 *
4 * Copyright (C) 2008 Robert Jarzmik
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/platform_device.h>
25#include <linux/sysdev.h>
26#include <linux/input.h>
27#include <linux/delay.h>
28#include <linux/gpio_keys.h>
29#include <linux/pwm_backlight.h>
30#include <linux/rtc.h>
31#include <linux/leds.h>
32#include <linux/gpio.h>
33#include <linux/interrupt.h>
34#include <linux/irq.h>
35#include <linux/pda_power.h>
36#include <linux/power_supply.h>
37#include <linux/wm97xx.h>
38#include <linux/mtd/physmap.h>
39
40#include <asm/mach-types.h>
41#include <asm/mach/arch.h>
42#include <mach/mfp-pxa27x.h>
43#include <mach/pxa27x_keypad.h>
44#include <mach/pxafb.h>
45#include <mach/pxa2xx-regs.h>
46#include <mach/mmc.h>
47#include <mach/udc.h>
48#include <mach/pxa27x-udc.h>
49
50#include <mach/mioa701.h>
51
52#include "generic.h"
53#include "devices.h"
54
55static unsigned long mioa701_pin_config[] = {
56 /* Mio global */
57 MIO_CFG_OUT(GPIO9_CHARGE_nEN, AF0, DRIVE_LOW),
58 MIO_CFG_OUT(GPIO18_POWEROFF, AF0, DRIVE_LOW),
59 MFP_CFG_OUT(GPIO3, AF0, DRIVE_HIGH),
60 MFP_CFG_OUT(GPIO4, AF0, DRIVE_HIGH),
61
62 /* Backlight PWM 0 */
63 GPIO16_PWM0_OUT,
64
65 /* MMC */
66 GPIO32_MMC_CLK,
67 GPIO92_MMC_DAT_0,
68 GPIO109_MMC_DAT_1,
69 GPIO110_MMC_DAT_2,
70 GPIO111_MMC_DAT_3,
71 GPIO112_MMC_CMD,
72 MIO_CFG_IN(GPIO78_SDIO_RO, AF0),
73 MIO_CFG_IN(GPIO15_SDIO_INSERT, AF0),
74 MIO_CFG_OUT(GPIO91_SDIO_EN, AF0, DRIVE_LOW),
75
76 /* USB */
77 MIO_CFG_IN(GPIO13_USB_DETECT, AF0),
78 MIO_CFG_OUT(GPIO22_USB_ENABLE, AF0, DRIVE_LOW),
79
80 /* LCD */
81 GPIO58_LCD_LDD_0,
82 GPIO59_LCD_LDD_1,
83 GPIO60_LCD_LDD_2,
84 GPIO61_LCD_LDD_3,
85 GPIO62_LCD_LDD_4,
86 GPIO63_LCD_LDD_5,
87 GPIO64_LCD_LDD_6,
88 GPIO65_LCD_LDD_7,
89 GPIO66_LCD_LDD_8,
90 GPIO67_LCD_LDD_9,
91 GPIO68_LCD_LDD_10,
92 GPIO69_LCD_LDD_11,
93 GPIO70_LCD_LDD_12,
94 GPIO71_LCD_LDD_13,
95 GPIO72_LCD_LDD_14,
96 GPIO73_LCD_LDD_15,
97 GPIO74_LCD_FCLK,
98 GPIO75_LCD_LCLK,
99 GPIO76_LCD_PCLK,
100
101 /* Bluetooth */
102 GPIO44_BTUART_CTS,
103 GPIO42_BTUART_RXD,
104 GPIO45_BTUART_RTS,
105 GPIO43_BTUART_TXD,
106 MIO_CFG_OUT(GPIO83_BT_ON, AF0, DRIVE_LOW),
107
108 /* GPS */
109 MIO_CFG_OUT(GPIO23_GPS_UNKNOWN1, AF0, DRIVE_LOW),
110 MIO_CFG_OUT(GPIO26_GPS_ON, AF0, DRIVE_LOW),
111 MIO_CFG_OUT(GPIO27_GPS_RESET, AF0, DRIVE_LOW),
112 MIO_CFG_OUT(GPIO106_GPS_UNKNOWN2, AF0, DRIVE_LOW),
113 MIO_CFG_OUT(GPIO107_GPS_UNKNOWN3, AF0, DRIVE_LOW),
114 GPIO46_STUART_RXD,
115 GPIO47_STUART_TXD,
116
117 /* GSM */
118 MIO_CFG_OUT(GPIO24_GSM_MOD_RESET_CMD, AF0, DRIVE_LOW),
119 MIO_CFG_OUT(GPIO88_GSM_nMOD_ON_CMD, AF0, DRIVE_HIGH),
120 MIO_CFG_OUT(GPIO90_GSM_nMOD_OFF_CMD, AF0, DRIVE_HIGH),
121 MIO_CFG_OUT(GPIO114_GSM_nMOD_DTE_UART_STATE, AF0, DRIVE_HIGH),
122 MIO_CFG_IN(GPIO25_GSM_MOD_ON_STATE, AF0),
123 MIO_CFG_IN(GPIO113_GSM_EVENT, AF0) | WAKEUP_ON_EDGE_BOTH,
124 GPIO34_FFUART_RXD,
125 GPIO35_FFUART_CTS,
126 GPIO36_FFUART_DCD,
127 GPIO37_FFUART_DSR,
128 GPIO39_FFUART_TXD,
129 GPIO40_FFUART_DTR,
130 GPIO41_FFUART_RTS,
131
132 /* Sound */
133 GPIO89_AC97_SYSCLK,
134 MIO_CFG_IN(GPIO12_HPJACK_INSERT, AF0),
135
136 /* Leds */
137 MIO_CFG_OUT(GPIO10_LED_nCharging, AF0, DRIVE_HIGH),
138 MIO_CFG_OUT(GPIO97_LED_nBlue, AF0, DRIVE_HIGH),
139 MIO_CFG_OUT(GPIO98_LED_nOrange, AF0, DRIVE_HIGH),
140 MIO_CFG_OUT(GPIO82_LED_nVibra, AF0, DRIVE_HIGH),
141 MIO_CFG_OUT(GPIO115_LED_nKeyboard, AF0, DRIVE_HIGH),
142
143 /* Keyboard */
144 MIO_CFG_IN(GPIO0_KEY_POWER, AF0) | WAKEUP_ON_EDGE_BOTH,
145 MIO_CFG_IN(GPIO93_KEY_VOLUME_UP, AF0),
146 MIO_CFG_IN(GPIO94_KEY_VOLUME_DOWN, AF0),
147 GPIO100_KP_MKIN_0,
148 GPIO101_KP_MKIN_1,
149 GPIO102_KP_MKIN_2,
150 GPIO103_KP_MKOUT_0,
151 GPIO104_KP_MKOUT_1,
152 GPIO105_KP_MKOUT_2,
153
154 /* Unknown */
155 MFP_CFG_IN(GPIO14, AF0),
156 MFP_CFG_IN(GPIO20, AF0),
157 MFP_CFG_IN(GPIO21, AF0),
158 MFP_CFG_IN(GPIO33, AF0),
159 MFP_CFG_OUT(GPIO49, AF0, DRIVE_HIGH),
160 MFP_CFG_OUT(GPIO57, AF0, DRIVE_HIGH),
161 MFP_CFG_OUT(GPIO77, AF0, DRIVE_HIGH),
162 MFP_CFG_IN(GPIO80, AF0),
163 MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH),
164 MFP_CFG_IN(GPIO96, AF0),
165 MFP_CFG_OUT(GPIO116, AF0, DRIVE_HIGH),
166};
167
168#define MIO_GPIO_IN(num, _desc) \
169 { .gpio = (num), .dir = 0, .desc = (_desc) }
170#define MIO_GPIO_OUT(num, _init, _desc) \
171 { .gpio = (num), .dir = 1, .init = (_init), .desc = (_desc) }
172struct gpio_ress {
173 unsigned gpio : 8;
174 unsigned dir : 1;
175 unsigned init : 1;
176 char *desc;
177};
178
179static int mio_gpio_request(struct gpio_ress *gpios, int size)
180{
181 int i, rc = 0;
182 int gpio;
183 int dir;
184
185 for (i = 0; (!rc) && (i < size); i++) {
186 gpio = gpios[i].gpio;
187 dir = gpios[i].dir;
188 rc = gpio_request(gpio, gpios[i].desc);
189 if (rc) {
190 printk(KERN_ERR "Error requesting GPIO %d(%s) : %d\n",
191 gpio, gpios[i].desc, rc);
192 continue;
193 }
194 if (dir)
195 gpio_direction_output(gpio, gpios[i].init);
196 else
197 gpio_direction_input(gpio);
198 }
199 while ((rc) && (--i >= 0))
200 gpio_free(gpios[i].gpio);
201 return rc;
202}
203
204static void mio_gpio_free(struct gpio_ress *gpios, int size)
205{
206 int i;
207
208 for (i = 0; i < size; i++)
209 gpio_free(gpios[i].gpio);
210}
211
212/* LCD Screen and Backlight */
213static struct platform_pwm_backlight_data mioa701_backlight_data = {
214 .pwm_id = 0,
215 .max_brightness = 100,
216 .dft_brightness = 50,
217 .pwm_period_ns = 4000 * 1024, /* Fl = 250kHz */
218};
219
220/*
221 * LTM0305A776C LCD panel timings
222 *
223 * see:
224 * - the LTM0305A776C datasheet,
225 * - and the PXA27x Programmers' manual
226 */
227static struct pxafb_mode_info mioa701_ltm0305a776c = {
228 .pixclock = 220000, /* CLK=4.545 MHz */
229 .xres = 240,
230 .yres = 320,
231 .bpp = 16,
232 .hsync_len = 4,
233 .vsync_len = 2,
234 .left_margin = 6,
235 .right_margin = 4,
236 .upper_margin = 5,
237 .lower_margin = 3,
238};
239
240static void mioa701_lcd_power(int on, struct fb_var_screeninfo *si)
241{
242 gpio_set_value(GPIO87_LCD_POWER, on);
243}
244
245static struct pxafb_mach_info mioa701_pxafb_info = {
246 .modes = &mioa701_ltm0305a776c,
247 .num_modes = 1,
248 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
249 .pxafb_lcd_power = mioa701_lcd_power,
250};
251
252/*
253 * Keyboard configuration
254 */
255static unsigned int mioa701_matrix_keys[] = {
256 KEY(0, 0, KEY_UP),
257 KEY(0, 1, KEY_RIGHT),
258 KEY(0, 2, KEY_MEDIA),
259 KEY(1, 0, KEY_DOWN),
260 KEY(1, 1, KEY_ENTER),
261 KEY(1, 2, KEY_CONNECT), /* GPS key */
262 KEY(2, 0, KEY_LEFT),
263 KEY(2, 1, KEY_PHONE), /* Phone Green key */
264 KEY(2, 2, KEY_CAMERA) /* Camera key */
265};
266static struct pxa27x_keypad_platform_data mioa701_keypad_info = {
267 .matrix_key_rows = 3,
268 .matrix_key_cols = 3,
269 .matrix_key_map = mioa701_matrix_keys,
270 .matrix_key_map_size = ARRAY_SIZE(mioa701_matrix_keys),
271};
272
273/*
274 * GPIO Key Configuration
275 */
276#define MIO_KEY(key, _gpio, _desc, _wakeup) \
277 { .code = (key), .gpio = (_gpio), .active_low = 0, \
278 .desc = (_desc), .type = EV_KEY, .wakeup = (_wakeup) }
279static struct gpio_keys_button mioa701_button_table[] = {
280 MIO_KEY(KEY_EXIT, GPIO0_KEY_POWER, "Power button", 1),
281 MIO_KEY(KEY_VOLUMEUP, GPIO93_KEY_VOLUME_UP, "Volume up", 0),
282 MIO_KEY(KEY_VOLUMEDOWN, GPIO94_KEY_VOLUME_DOWN, "Volume down", 0),
283 MIO_KEY(KEY_HP, GPIO12_HPJACK_INSERT, "HP jack detect", 0)
284};
285
286static struct gpio_keys_platform_data mioa701_gpio_keys_data = {
287 .buttons = mioa701_button_table,
288 .nbuttons = ARRAY_SIZE(mioa701_button_table),
289};
290
291/*
292 * Leds and vibrator
293 */
294#define ONE_LED(_gpio, _name) \
295{ .gpio = (_gpio), .name = (_name), .active_low = true }
296static struct gpio_led gpio_leds[] = {
297 ONE_LED(GPIO10_LED_nCharging, "mioa701:charging"),
298 ONE_LED(GPIO97_LED_nBlue, "mioa701:blue"),
299 ONE_LED(GPIO98_LED_nOrange, "mioa701:orange"),
300 ONE_LED(GPIO82_LED_nVibra, "mioa701:vibra"),
301 ONE_LED(GPIO115_LED_nKeyboard, "mioa701:keyboard")
302};
303
304static struct gpio_led_platform_data gpio_led_info = {
305 .leds = gpio_leds,
306 .num_leds = ARRAY_SIZE(gpio_leds),
307};
308
309/*
310 * GSM Sagem XS200 chip
311 *
312 * GSM handling was purged from kernel. For history, this is the way to go :
313 * - init : GPIO24_GSM_MOD_RESET_CMD = 0, GPIO114_GSM_nMOD_DTE_UART_STATE = 1
314 * GPIO88_GSM_nMOD_ON_CMD = 1, GPIO90_GSM_nMOD_OFF_CMD = 1
315 * - reset : GPIO24_GSM_MOD_RESET_CMD = 1, msleep(100),
316 * GPIO24_GSM_MOD_RESET_CMD = 0
317 * - turn on : GPIO88_GSM_nMOD_ON_CMD = 0, msleep(1000),
318 * GPIO88_GSM_nMOD_ON_CMD = 1
319 * - turn off : GPIO90_GSM_nMOD_OFF_CMD = 0, msleep(1000),
320 * GPIO90_GSM_nMOD_OFF_CMD = 1
321 */
322static int is_gsm_on(void)
323{
324 int is_on;
325
326 is_on = !!gpio_get_value(GPIO25_GSM_MOD_ON_STATE);
327 return is_on;
328}
329
330irqreturn_t gsm_on_irq(int irq, void *p)
331{
332 printk(KERN_DEBUG "Mioa701: GSM status changed to %s\n",
333 is_gsm_on() ? "on" : "off");
334 return IRQ_HANDLED;
335}
336
337struct gpio_ress gsm_gpios[] = {
338 MIO_GPIO_IN(GPIO25_GSM_MOD_ON_STATE, "GSM state"),
339 MIO_GPIO_IN(GPIO113_GSM_EVENT, "GSM event"),
340};
341
342static int __init gsm_init(void)
343{
344 int rc;
345
346 rc = mio_gpio_request(ARRAY_AND_SIZE(gsm_gpios));
347 if (rc)
348 goto err_gpio;
349 rc = request_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), gsm_on_irq,
350 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
351 "GSM XS200 Power Irq", NULL);
352 if (rc)
353 goto err_irq;
354
355 gpio_set_wake(GPIO113_GSM_EVENT, 1);
356 return 0;
357
358err_irq:
359 printk(KERN_ERR "Mioa701: Can't request GSM_ON irq\n");
360 mio_gpio_free(ARRAY_AND_SIZE(gsm_gpios));
361err_gpio:
362 printk(KERN_ERR "Mioa701: gsm not available\n");
363 return rc;
364}
365
366static void gsm_exit(void)
367{
368 free_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), NULL);
369 mio_gpio_free(ARRAY_AND_SIZE(gsm_gpios));
370}
371
372/*
373 * Bluetooth BRF6150 chip
374 *
375 * BT handling was purged from kernel. For history, this is the way to go :
376 * - turn on : GPIO83_BT_ON = 1
377 * - turn off : GPIO83_BT_ON = 0
378 */
379
380/*
381 * GPS Sirf Star III chip
382 *
383 * GPS handling was purged from kernel. For history, this is the way to go :
384 * - init : GPIO23_GPS_UNKNOWN1 = 1, GPIO26_GPS_ON = 0, GPIO27_GPS_RESET = 0
385 * GPIO106_GPS_UNKNOWN2 = 0, GPIO107_GPS_UNKNOWN3 = 0
386 * - turn on : GPIO27_GPS_RESET = 1, GPIO26_GPS_ON = 1
387 * - turn off : GPIO26_GPS_ON = 0, GPIO27_GPS_RESET = 0
388 */
389
390/*
391 * USB UDC
392 */
393static void udc_power_command(int cmd)
394{
395 switch (cmd) {
396 case PXA2XX_UDC_CMD_DISCONNECT:
397 gpio_set_value(GPIO22_USB_ENABLE, 0);
398 break;
399 case PXA2XX_UDC_CMD_CONNECT:
400 gpio_set_value(GPIO22_USB_ENABLE, 1);
401 break;
402 default:
403 printk(KERN_INFO "udc_control: unknown command (0x%x)!\n", cmd);
404 break;
405 }
406}
407
408static int is_usb_connected(void)
409{
410 return !!gpio_get_value(GPIO13_USB_DETECT);
411}
412
413static struct pxa2xx_udc_mach_info mioa701_udc_info = {
414 .udc_is_connected = is_usb_connected,
415 .udc_command = udc_power_command,
416};
417
418struct gpio_ress udc_gpios[] = {
419 MIO_GPIO_OUT(GPIO22_USB_ENABLE, 0, "USB Vbus enable")
420};
421
422static int __init udc_init(void)
423{
424 pxa_set_udc_info(&mioa701_udc_info);
425 return mio_gpio_request(ARRAY_AND_SIZE(udc_gpios));
426}
427
428static void udc_exit(void)
429{
430 mio_gpio_free(ARRAY_AND_SIZE(udc_gpios));
431}
432
433/*
434 * SDIO/MMC Card controller
435 */
436static void mci_setpower(struct device *dev, unsigned int vdd)
437{
438 struct pxamci_platform_data *p_d = dev->platform_data;
439
440 if ((1 << vdd) & p_d->ocr_mask)
441 gpio_set_value(GPIO91_SDIO_EN, 1); /* enable SDIO power */
442 else
443 gpio_set_value(GPIO91_SDIO_EN, 0); /* disable SDIO power */
444}
445
446static int mci_get_ro(struct device *dev)
447{
448 return gpio_get_value(GPIO78_SDIO_RO);
449}
450
451struct gpio_ress mci_gpios[] = {
452 MIO_GPIO_IN(GPIO78_SDIO_RO, "SDIO readonly detect"),
453 MIO_GPIO_IN(GPIO15_SDIO_INSERT, "SDIO insertion detect"),
454 MIO_GPIO_OUT(GPIO91_SDIO_EN, 0, "SDIO power enable")
455};
456
457static void mci_exit(struct device *dev, void *data)
458{
459 mio_gpio_free(ARRAY_AND_SIZE(mci_gpios));
460 free_irq(gpio_to_irq(GPIO15_SDIO_INSERT), data);
461}
462
463static struct pxamci_platform_data mioa701_mci_info;
464
465/**
466 * The card detect interrupt isn't debounced so we delay it by 250ms
467 * to give the card a chance to fully insert/eject.
468 */
469static int mci_init(struct device *dev, irq_handler_t detect_int, void *data)
470{
471 int rc;
472 int irq = gpio_to_irq(GPIO15_SDIO_INSERT);
473
474 rc = mio_gpio_request(ARRAY_AND_SIZE(mci_gpios));
475 if (rc)
476 goto err_gpio;
477 /* enable RE/FE interrupt on card insertion and removal */
478 rc = request_irq(irq, detect_int,
479 IRQF_DISABLED | IRQF_TRIGGER_RISING |
480 IRQF_TRIGGER_FALLING,
481 "MMC card detect", data);
482 if (rc)
483 goto err_irq;
484
485 mioa701_mci_info.detect_delay = msecs_to_jiffies(250);
486 return 0;
487
488err_irq:
489 dev_err(dev, "mioa701_mci_init: MMC/SD:"
490 " can't request MMC card detect IRQ\n");
491 mio_gpio_free(ARRAY_AND_SIZE(mci_gpios));
492err_gpio:
493 return rc;
494}
495
496static struct pxamci_platform_data mioa701_mci_info = {
497 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
498 .init = mci_init,
499 .get_ro = mci_get_ro,
500 .setpower = mci_setpower,
501 .exit = mci_exit,
502};
503
504/* FlashRAM */
505static struct resource strataflash_resource = {
506 .start = PXA_CS0_PHYS,
507 .end = PXA_CS0_PHYS + SZ_64M - 1,
508 .flags = IORESOURCE_MEM,
509};
510
511static struct physmap_flash_data strataflash_data = {
512 .width = 2,
513 /* .set_vpp = mioa701_set_vpp, */
514};
515
516static struct platform_device strataflash = {
517 .name = "physmap-flash",
518 .id = -1,
519 .resource = &strataflash_resource,
520 .num_resources = 1,
521 .dev = {
522 .platform_data = &strataflash_data,
523 },
524};
525
526/*
527 * Suspend/Resume bootstrap management
528 *
529 * MIO A701 reboot sequence is highly ROM dependant. From the one dissassembled,
530 * this sequence is as follows :
531 * - disables interrupts
532 * - initialize SDRAM (self refresh RAM into active RAM)
533 * - initialize GPIOs (depends on value at 0xa020b020)
534 * - initialize coprossessors
535 * - if edge detect on PWR_SCL(GPIO3), then proceed to cold start
536 * - or if value at 0xa020b000 not equal to 0x0f0f0f0f, proceed to cold start
537 * - else do a resume, ie. jump to addr 0xa0100000
538 */
539#define RESUME_ENABLE_ADDR 0xa020b000
540#define RESUME_ENABLE_VAL 0x0f0f0f0f
541#define RESUME_BT_ADDR 0xa020b020
542#define RESUME_UNKNOWN_ADDR 0xa020b024
543#define RESUME_VECTOR_ADDR 0xa0100000
544#define BOOTSTRAP_WORDS mioa701_bootstrap_lg/4
545
546static u32 *save_buffer;
547
548static void install_bootstrap(void)
549{
550 int i;
551 u32 *rom_bootstrap = phys_to_virt(RESUME_VECTOR_ADDR);
552 u32 *src = &mioa701_bootstrap;
553
554 for (i = 0; i < BOOTSTRAP_WORDS; i++)
555 rom_bootstrap[i] = src[i];
556}
557
558
559static int mioa701_sys_suspend(struct sys_device *sysdev, pm_message_t state)
560{
561 int i = 0, is_bt_on;
562 u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR);
563 u32 *mem_resume_enabler = phys_to_virt(RESUME_ENABLE_ADDR);
564 u32 *mem_resume_bt = phys_to_virt(RESUME_BT_ADDR);
565 u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR);
566
567 /* Devices prepare suspend */
568 is_bt_on = gpio_get_value(GPIO83_BT_ON);
569 pxa2xx_mfp_set_lpm(GPIO83_BT_ON,
570 is_bt_on ? MFP_LPM_DRIVE_HIGH : MFP_LPM_DRIVE_LOW);
571
572 for (i = 0; i < BOOTSTRAP_WORDS; i++)
573 save_buffer[i] = mem_resume_vector[i];
574 save_buffer[i++] = *mem_resume_enabler;
575 save_buffer[i++] = *mem_resume_bt;
576 save_buffer[i++] = *mem_resume_unknown;
577
578 *mem_resume_enabler = RESUME_ENABLE_VAL;
579 *mem_resume_bt = is_bt_on;
580
581 install_bootstrap();
582 return 0;
583}
584
585static int mioa701_sys_resume(struct sys_device *sysdev)
586{
587 int i = 0;
588 u32 *mem_resume_vector = phys_to_virt(RESUME_VECTOR_ADDR);
589 u32 *mem_resume_enabler = phys_to_virt(RESUME_ENABLE_ADDR);
590 u32 *mem_resume_bt = phys_to_virt(RESUME_BT_ADDR);
591 u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR);
592
593 for (i = 0; i < BOOTSTRAP_WORDS; i++)
594 mem_resume_vector[i] = save_buffer[i];
595 *mem_resume_enabler = save_buffer[i++];
596 *mem_resume_bt = save_buffer[i++];
597 *mem_resume_unknown = save_buffer[i++];
598
599 return 0;
600}
601
602static struct sysdev_class mioa701_sysclass = {
603 .name = "mioa701",
604};
605
606static struct sys_device sysdev_bootstrap = {
607 .cls = &mioa701_sysclass,
608};
609
610static struct sysdev_driver driver_bootstrap = {
611 .suspend = &mioa701_sys_suspend,
612 .resume = &mioa701_sys_resume,
613};
614
615static int __init bootstrap_init(void)
616{
617 int rc;
618 int save_size = mioa701_bootstrap_lg + (sizeof(u32) * 3);
619
620 rc = sysdev_class_register(&mioa701_sysclass);
621 if (rc) {
622 printk(KERN_ERR "Failed registering mioa701 sys class\n");
623 return -ENODEV;
624 }
625 rc = sysdev_register(&sysdev_bootstrap);
626 if (rc) {
627 printk(KERN_ERR "Failed registering mioa701 sys device\n");
628 return -ENODEV;
629 }
630 rc = sysdev_driver_register(&mioa701_sysclass, &driver_bootstrap);
631 if (rc) {
632 printk(KERN_ERR "Failed registering PMU sys driver\n");
633 return -ENODEV;
634 }
635
636 save_buffer = kmalloc(save_size, GFP_KERNEL);
637 if (!save_buffer)
638 return -ENOMEM;
639 printk(KERN_INFO "MioA701: allocated %d bytes for bootstrap\n",
640 save_size);
641 return 0;
642}
643
644static void bootstrap_exit(void)
645{
646 kfree(save_buffer);
647 sysdev_driver_unregister(&mioa701_sysclass, &driver_bootstrap);
648 sysdev_unregister(&sysdev_bootstrap);
649 sysdev_class_unregister(&mioa701_sysclass);
650
651 printk(KERN_CRIT "Unregistering mioa701 suspend will hang next"
652 "resume !!!\n");
653}
654
655/*
656 * Power Supply
657 */
658static char *supplicants[] = {
659 "mioa701_battery"
660};
661
662static void mioa701_set_charge(int flags)
663{
664 gpio_set_value(GPIO9_CHARGE_nEN, !flags);
665}
666
667static struct pda_power_pdata power_pdata = {
668 .is_ac_online = is_usb_connected,
669 .set_charge = mioa701_set_charge,
670 .supplied_to = supplicants,
671 .num_supplicants = ARRAY_SIZE(supplicants),
672};
673
674static struct resource power_resources[] = {
675 [0] = {
676 .name = "ac",
677 .start = gpio_to_irq(GPIO13_USB_DETECT),
678 .end = gpio_to_irq(GPIO13_USB_DETECT),
679 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
680 IORESOURCE_IRQ_LOWEDGE,
681 },
682};
683
684static struct platform_device power_dev = {
685 .name = "pda-power",
686 .id = -1,
687 .resource = power_resources,
688 .num_resources = ARRAY_SIZE(power_resources),
689 .dev = {
690 .platform_data = &power_pdata,
691 },
692};
693
694#if defined(CONFIG_PDA_POWER) && defined(CONFIG_TOUCHSCREEN_WM97XX)
695static struct wm97xx *battery_wm;
696
697static enum power_supply_property battery_props[] = {
698 POWER_SUPPLY_PROP_STATUS,
699 POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
700 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
701 POWER_SUPPLY_PROP_VOLTAGE_NOW,
702 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, /* Necessary for apm */
703};
704
705static int get_battery_voltage(void)
706{
707 int adc = -1;
708
709 if (battery_wm)
710 adc = wm97xx_read_aux_adc(battery_wm, WM97XX_AUX_ID1);
711 return adc;
712}
713
714static int get_battery_status(struct power_supply *b)
715{
716 int status;
717
718 if (is_usb_connected())
719 status = POWER_SUPPLY_STATUS_CHARGING;
720 else
721 status = POWER_SUPPLY_STATUS_DISCHARGING;
722
723 return status;
724}
725
726static int get_property(struct power_supply *b,
727 enum power_supply_property psp,
728 union power_supply_propval *val)
729{
730 int rc = 0;
731
732 switch (psp) {
733 case POWER_SUPPLY_PROP_STATUS:
734 val->intval = get_battery_status(b);
735 break;
736 case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
737 val->intval = 0xfd0;
738 break;
739 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
740 val->intval = 0xc00;
741 break;
742 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
743 val->intval = get_battery_voltage();
744 break;
745 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
746 val->intval = 100;
747 break;
748 default:
749 val->intval = -1;
750 rc = -1;
751 }
752
753 return rc;
754};
755
756static struct power_supply battery_ps = {
757 .name = "mioa701_battery",
758 .type = POWER_SUPPLY_TYPE_BATTERY,
759 .get_property = get_property,
760 .properties = battery_props,
761 .num_properties = ARRAY_SIZE(battery_props),
762};
763
764static int battery_probe(struct platform_device *pdev)
765{
766 struct wm97xx *wm = platform_get_drvdata(pdev);
767 int rc;
768
769 battery_wm = wm;
770
771 rc = power_supply_register(NULL, &battery_ps);
772 if (rc)
773 dev_err(&pdev->dev,
774 "Could not register mioa701 battery -> %d\n", rc);
775 return rc;
776}
777
778static int battery_remove(struct platform_device *pdev)
779{
780 battery_wm = NULL;
781 return 0;
782}
783
784static struct platform_driver mioa701_battery_driver = {
785 .driver = {
786 .name = "wm97xx-battery",
787 },
788 .probe = battery_probe,
789 .remove = battery_remove
790};
791
792static int __init mioa701_battery_init(void)
793{
794 int rc;
795
796 rc = platform_driver_register(&mioa701_battery_driver);
797 if (rc)
798 printk(KERN_ERR "Could not register mioa701 battery driver\n");
799 return rc;
800}
801
802#else
803static int __init mioa701_battery_init(void)
804{
805 return 0;
806}
807#endif
808
809/*
810 * Mio global
811 */
812
813/* Devices */
814#define MIO_PARENT_DEV(var, strname, tparent, pdata) \
815static struct platform_device var = { \
816 .name = strname, \
817 .id = -1, \
818 .dev = { \
819 .platform_data = pdata, \
820 .parent = tparent, \
821 }, \
822};
823#define MIO_SIMPLE_DEV(var, strname, pdata) \
824 MIO_PARENT_DEV(var, strname, NULL, pdata)
825
826MIO_SIMPLE_DEV(mioa701_gpio_keys, "gpio-keys", &mioa701_gpio_keys_data)
827MIO_PARENT_DEV(mioa701_backlight, "pwm-backlight", &pxa27x_device_pwm0.dev,
828 &mioa701_backlight_data);
829MIO_SIMPLE_DEV(mioa701_led, "leds-gpio", &gpio_led_info)
830MIO_SIMPLE_DEV(pxa2xx_pcm, "pxa2xx-pcm", NULL)
831MIO_SIMPLE_DEV(pxa2xx_ac97, "pxa2xx-ac97", NULL)
832MIO_PARENT_DEV(mio_wm9713_codec, "wm9713-codec", &pxa2xx_ac97.dev, NULL)
833MIO_SIMPLE_DEV(mioa701_sound, "mioa701-wm9713", NULL)
834MIO_SIMPLE_DEV(mioa701_board, "mioa701-board", NULL)
835
836static struct platform_device *devices[] __initdata = {
837 &mioa701_gpio_keys,
838 &mioa701_backlight,
839 &mioa701_led,
840 &pxa2xx_pcm,
841 &pxa2xx_ac97,
842 &mio_wm9713_codec,
843 &mioa701_sound,
844 &power_dev,
845 &strataflash,
846 &mioa701_board
847};
848
849static void mioa701_machine_exit(void);
850
851static void mioa701_poweroff(void)
852{
853 mioa701_machine_exit();
854 gpio_set_value(GPIO18_POWEROFF, 1);
855}
856
857static void mioa701_restart(char c)
858{
859 mioa701_machine_exit();
860 arm_machine_restart(c);
861}
862
863struct gpio_ress global_gpios[] = {
864 MIO_GPIO_OUT(GPIO9_CHARGE_nEN, 1, "Charger enable"),
865 MIO_GPIO_OUT(GPIO18_POWEROFF, 0, "Power Off"),
866 MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power")
867};
868
869static void __init mioa701_machine_init(void)
870{
871 PSLR = 0xff100000; /* SYSDEL=125ms, PWRDEL=125ms, PSLR_SL_ROD=1 */
872 PCFR = PCFR_DC_EN | PCFR_GPR_EN | PCFR_OPDE;
873 RTTR = 32768 - 1; /* Reset crazy WinCE value */
874 UP2OCR = UP2OCR_HXOE;
875
876 pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config));
877 mio_gpio_request(ARRAY_AND_SIZE(global_gpios));
878 bootstrap_init();
879 set_pxa_fb_info(&mioa701_pxafb_info);
880 pxa_set_mci_info(&mioa701_mci_info);
881 pxa_set_keypad_info(&mioa701_keypad_info);
882 udc_init();
883 pm_power_off = mioa701_poweroff;
884 arm_pm_restart = mioa701_restart;
885 platform_add_devices(devices, ARRAY_SIZE(devices));
886 gsm_init();
887 mioa701_battery_init();
888}
889
890static void mioa701_machine_exit(void)
891{
892 udc_exit();
893 bootstrap_exit();
894 gsm_exit();
895}
896
897MACHINE_START(MIOA701, "MIO A701")
898 .phys_io = 0x40000000,
899 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
900 .boot_params = 0xa0000100,
901 .map_io = &pxa_map_io,
902 .init_irq = &pxa27x_init_irq,
903 .init_machine = mioa701_machine_init,
904 .timer = &pxa_timer,
905MACHINE_END
diff --git a/arch/arm/mach-pxa/mioa701_bootresume.S b/arch/arm/mach-pxa/mioa701_bootresume.S
new file mode 100644
index 000000000000..a647693d9856
--- /dev/null
+++ b/arch/arm/mach-pxa/mioa701_bootresume.S
@@ -0,0 +1,36 @@
1/* Bootloader to resume MIO A701
2 *
3 * 2007-1-12 Robert Jarzmik
4 *
5 * This code is licenced under the GPLv2.
6*/
7
8#include <linux/linkage.h>
9#include <asm/assembler.h>
10
11/*
12 * Note: Yes, part of the following code is located into the .data section.
13 * This is to allow jumpaddr to be accessed with a relative load
14 * while we can't rely on any MMU translation. We could have put
15 * sleep_save_sp in the .text section as well, but some setups might
16 * insist on it to be truly read-only.
17 */
18 .data
19ENTRY(mioa701_bootstrap)
200:
21 b 1f
22ENTRY(mioa701_jumpaddr)
23 .word 0x40f00008 @ PSPR in no-MMU mode
241:
25 mov r0, #0xa0000000 @ Don't suppose memory access works
26 orr r0, r0, #0x00200000 @ even if it's supposed to
27 mov r1, #0
28 str r1, [r0] @ Early disable resume for next boot
29 ldr r0, mioa701_jumpaddr @ (Murphy's Law)
30 ldr r0, [r0]
31 mov pc, r0
322:
33
34ENTRY(mioa701_bootstrap_lg)
35 .data
36 .word 2b-0b
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c
new file mode 100644
index 000000000000..8a73814126b1
--- /dev/null
+++ b/arch/arm/mach-pxa/mp900.c
@@ -0,0 +1,100 @@
1/*
2 * linux/arch/arm/mach-pxa/mp900.c
3 *
4 * Support for the NEC MobilePro900/C platform
5 *
6 * Based on mach-pxa/gumstix.c
7 *
8 * 2007, 2008 Kristoffer Ericson <kristoffer.ericson@gmail.com>
9 * 2007, 2008 Michael Petchkovsky <mkpetch@internode.on.net>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/init.h>
17#include <linux/device.h>
18#include <linux/platform_device.h>
19#include <linux/types.h>
20#include <linux/usb/isp116x.h>
21
22#include <mach/hardware.h>
23#include <mach/pxa-regs.h>
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26#include "generic.h"
27
28static void isp116x_pfm_delay(struct device *dev, int delay)
29{
30
31 /* 400Mhz PXA2 = 2.5ns / instruction */
32
33 int cyc = delay / 10;
34
35 /* 4 Instructions = 4 x 2.5ns = 10ns */
36 __asm__ volatile ("0:\n"
37 "subs %0, %1, #1\n"
38 "bge 0b\n"
39 :"=r" (cyc)
40 :"0"(cyc)
41 );
42}
43
44static struct isp116x_platform_data isp116x_pfm_data = {
45 .remote_wakeup_enable = 1,
46 .delay = isp116x_pfm_delay,
47};
48
49static struct resource isp116x_pfm_resources[] = {
50 [0] = {
51 .start = 0x0d000000,
52 .end = 0x0d000000 + 1,
53 .flags = IORESOURCE_MEM,
54 },
55 [1] = {
56 .start = 0x0d000000 + 4,
57 .end = 0x0d000000 + 5,
58 .flags = IORESOURCE_MEM,
59 },
60 [2] = {
61 .start = 61,
62 .end = 61,
63 .flags = IORESOURCE_IRQ,
64 },
65};
66
67static struct platform_device mp900c_dummy_device = {
68 .name = "mp900c_dummy",
69 .id = -1,
70};
71
72static struct platform_device mp900c_usb = {
73 .name = "isp116x-hcd",
74 .num_resources = ARRAY_SIZE(isp116x_pfm_resources),
75 .resource = isp116x_pfm_resources,
76 .dev.platform_data = &isp116x_pfm_data,
77};
78
79static struct platform_device *devices[] __initdata = {
80 &mp900c_dummy_device,
81 &mp900c_usb,
82};
83
84static void __init mp900c_init(void)
85{
86 printk(KERN_INFO "MobilePro 900/C machine init\n");
87 platform_add_devices(devices, ARRAY_SIZE(devices));
88}
89
90/* Maintainer - Michael Petchkovsky <mkpetch@internode.on.net> */
91MACHINE_START(NEC_MP900, "MobilePro900/C")
92 .phys_io = 0x40000000,
93 .boot_params = 0xa0220100,
94 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
95 .timer = &pxa_timer,
96 .map_io = pxa_map_io,
97 .init_irq = pxa25x_init_irq,
98 .init_machine = mp900c_init,
99MACHINE_END
100
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index fe924a23debe..4447711c9fc6 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -25,6 +25,8 @@
25#include <linux/pda_power.h> 25#include <linux/pda_power.h>
26#include <linux/pwm_backlight.h> 26#include <linux/pwm_backlight.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/wm97xx_batt.h>
29#include <linux/power_supply.h>
28 30
29#include <asm/mach-types.h> 31#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
@@ -340,6 +342,23 @@ static struct platform_device power_supply = {
340}; 342};
341 343
342/****************************************************************************** 344/******************************************************************************
345 * WM97xx battery
346 ******************************************************************************/
347static struct wm97xx_batt_info wm97xx_batt_pdata = {
348 .batt_aux = WM97XX_AUX_ID3,
349 .temp_aux = WM97XX_AUX_ID2,
350 .charge_gpio = -1,
351 .max_voltage = PALMTX_BAT_MAX_VOLTAGE,
352 .min_voltage = PALMTX_BAT_MIN_VOLTAGE,
353 .batt_mult = 1000,
354 .batt_div = 414,
355 .temp_mult = 1,
356 .temp_div = 1,
357 .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO,
358 .batt_name = "main-batt",
359};
360
361/******************************************************************************
343 * Framebuffer 362 * Framebuffer
344 ******************************************************************************/ 363 ******************************************************************************/
345static struct pxafb_mode_info palmtx_lcd_modes[] = { 364static struct pxafb_mode_info palmtx_lcd_modes[] = {
@@ -401,6 +420,7 @@ static void __init palmtx_init(void)
401 pxa_set_ac97_info(NULL); 420 pxa_set_ac97_info(NULL);
402 pxa_set_ficp_info(&palmtx_ficp_platform_data); 421 pxa_set_ficp_info(&palmtx_ficp_platform_data);
403 pxa_set_keypad_info(&palmtx_keypad_platform_data); 422 pxa_set_keypad_info(&palmtx_keypad_platform_data);
423 wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
404 424
405 platform_add_devices(devices, ARRAY_SIZE(devices)); 425 platform_add_devices(devices, ARRAY_SIZE(devices));
406} 426}
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
new file mode 100644
index 000000000000..a90b4d77a201
--- /dev/null
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -0,0 +1,480 @@
1/*
2 * Hardware definitions for Palm Zire72
3 *
4 * Authors:
5 * Vladimir "Farcaller" Pouzanov <farcaller@gmail.com>
6 * Sergey Lapin <slapin@ossfans.org>
7 * Alex Osborne <bobofdoom@gmail.com>
8 * Jan Herman <2hp@seznam.cz>
9 *
10 * Rewrite for mainline:
11 * Marek Vasut <marek.vasut@gmail.com>
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * (find more info at www.hackndev.com)
18 *
19 */
20
21#include <linux/platform_device.h>
22#include <linux/sysdev.h>
23#include <linux/delay.h>
24#include <linux/irq.h>
25#include <linux/gpio_keys.h>
26#include <linux/input.h>
27#include <linux/pda_power.h>
28#include <linux/pwm_backlight.h>
29#include <linux/gpio.h>
30#include <linux/power_supply.h>
31
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34#include <asm/mach/map.h>
35
36#include <mach/audio.h>
37#include <mach/palmz72.h>
38#include <mach/mmc.h>
39#include <mach/pxafb.h>
40#include <mach/pxa-regs.h>
41#include <mach/pxa2xx-regs.h>
42#include <mach/mfp-pxa27x.h>
43#include <mach/irda.h>
44#include <mach/pxa27x_keypad.h>
45#include <mach/udc.h>
46#include <mach/pm.h>
47
48#include "generic.h"
49#include "devices.h"
50
51/******************************************************************************
52 * Pin configuration
53 ******************************************************************************/
54static unsigned long palmz72_pin_config[] __initdata = {
55 /* MMC */
56 GPIO32_MMC_CLK,
57 GPIO92_MMC_DAT_0,
58 GPIO109_MMC_DAT_1,
59 GPIO110_MMC_DAT_2,
60 GPIO111_MMC_DAT_3,
61 GPIO112_MMC_CMD,
62 GPIO14_GPIO, /* SD detect */
63 GPIO115_GPIO, /* SD RO */
64 GPIO98_GPIO, /* SD power */
65
66 /* AC97 */
67 GPIO28_AC97_BITCLK,
68 GPIO29_AC97_SDATA_IN_0,
69 GPIO30_AC97_SDATA_OUT,
70 GPIO31_AC97_SYNC,
71
72 /* IrDA */
73 GPIO49_GPIO, /* ir disable */
74 GPIO46_FICP_RXD,
75 GPIO47_FICP_TXD,
76
77 /* PWM */
78 GPIO16_PWM0_OUT,
79
80 /* USB */
81 GPIO15_GPIO, /* usb detect */
82 GPIO12_GPIO, /* usb pullup */
83 GPIO95_GPIO, /* usb power */
84
85 /* Matrix keypad */
86 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
87 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
88 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
89 GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
90 GPIO103_KP_MKOUT_0,
91 GPIO104_KP_MKOUT_1,
92 GPIO105_KP_MKOUT_2,
93
94 /* LCD */
95 GPIO58_LCD_LDD_0,
96 GPIO59_LCD_LDD_1,
97 GPIO60_LCD_LDD_2,
98 GPIO61_LCD_LDD_3,
99 GPIO62_LCD_LDD_4,
100 GPIO63_LCD_LDD_5,
101 GPIO64_LCD_LDD_6,
102 GPIO65_LCD_LDD_7,
103 GPIO66_LCD_LDD_8,
104 GPIO67_LCD_LDD_9,
105 GPIO68_LCD_LDD_10,
106 GPIO69_LCD_LDD_11,
107 GPIO70_LCD_LDD_12,
108 GPIO71_LCD_LDD_13,
109 GPIO72_LCD_LDD_14,
110 GPIO73_LCD_LDD_15,
111 GPIO74_LCD_FCLK,
112 GPIO75_LCD_LCLK,
113 GPIO76_LCD_PCLK,
114 GPIO77_LCD_BIAS,
115 GPIO20_GPIO, /* bl power */
116 GPIO21_GPIO, /* LCD border switch */
117 GPIO22_GPIO, /* LCD border color */
118 GPIO96_GPIO, /* lcd power */
119
120 /* Misc. */
121 GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* power detect */
122 GPIO88_GPIO, /* green led */
123 GPIO27_GPIO, /* WM9712 IRQ */
124};
125
126/******************************************************************************
127 * SD/MMC card controller
128 ******************************************************************************/
129static int palmz72_mci_init(struct device *dev,
130 irq_handler_t palmz72_detect_int, void *data)
131{
132 int err = 0;
133
134 /* Setup an interrupt for detecting card insert/remove events */
135 err = gpio_request(GPIO_NR_PALMZ72_SD_DETECT_N, "SD IRQ");
136 if (err)
137 goto err;
138 err = gpio_direction_input(GPIO_NR_PALMZ72_SD_DETECT_N);
139 if (err)
140 goto err2;
141 err = request_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N),
142 palmz72_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
143 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
144 "SD/MMC card detect", data);
145 if (err) {
146 printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
147 __func__);
148 goto err2;
149 }
150
151 /* SD_POWER is not actually power, but it is more like chip
152 * select, i.e. it is inverted */
153
154 err = gpio_request(GPIO_NR_PALMZ72_SD_POWER_N, "SD_POWER");
155 if (err)
156 goto err3;
157 err = gpio_direction_output(GPIO_NR_PALMZ72_SD_POWER_N, 0);
158 if (err)
159 goto err4;
160 err = gpio_request(GPIO_NR_PALMZ72_SD_RO, "SD_RO");
161 if (err)
162 goto err4;
163 err = gpio_direction_input(GPIO_NR_PALMZ72_SD_RO);
164 if (err)
165 goto err5;
166
167 printk(KERN_DEBUG "%s: irq registered\n", __func__);
168
169 return 0;
170
171err5:
172 gpio_free(GPIO_NR_PALMZ72_SD_RO);
173err4:
174 gpio_free(GPIO_NR_PALMZ72_SD_POWER_N);
175err3:
176 free_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), data);
177err2:
178 gpio_free(GPIO_NR_PALMZ72_SD_DETECT_N);
179err:
180 return err;
181}
182
183static void palmz72_mci_exit(struct device *dev, void *data)
184{
185 gpio_free(GPIO_NR_PALMZ72_SD_POWER_N);
186 free_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), data);
187 gpio_free(GPIO_NR_PALMZ72_SD_DETECT_N);
188 gpio_free(GPIO_NR_PALMZ72_SD_RO);
189}
190
191static void palmz72_mci_power(struct device *dev, unsigned int vdd)
192{
193 struct pxamci_platform_data *p_d = dev->platform_data;
194 if (p_d->ocr_mask & (1 << vdd))
195 gpio_set_value(GPIO_NR_PALMZ72_SD_POWER_N, 0);
196 else
197 gpio_set_value(GPIO_NR_PALMZ72_SD_POWER_N, 1);
198}
199
200static int palmz72_mci_ro(struct device *dev)
201{
202 return gpio_get_value(GPIO_NR_PALMZ72_SD_RO);
203}
204
205static struct pxamci_platform_data palmz72_mci_platform_data = {
206 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
207 .setpower = palmz72_mci_power,
208 .get_ro = palmz72_mci_ro,
209 .init = palmz72_mci_init,
210 .exit = palmz72_mci_exit,
211};
212
213/******************************************************************************
214 * GPIO keyboard
215 ******************************************************************************/
216static unsigned int palmz72_matrix_keys[] = {
217 KEY(0, 0, KEY_POWER),
218 KEY(0, 1, KEY_F1),
219 KEY(0, 2, KEY_ENTER),
220
221 KEY(1, 0, KEY_F2),
222 KEY(1, 1, KEY_F3),
223 KEY(1, 2, KEY_F4),
224
225 KEY(2, 0, KEY_UP),
226 KEY(2, 2, KEY_DOWN),
227
228 KEY(3, 0, KEY_RIGHT),
229 KEY(3, 2, KEY_LEFT),
230};
231
232static struct pxa27x_keypad_platform_data palmz72_keypad_platform_data = {
233 .matrix_key_rows = 4,
234 .matrix_key_cols = 3,
235 .matrix_key_map = palmz72_matrix_keys,
236 .matrix_key_map_size = ARRAY_SIZE(palmz72_matrix_keys),
237
238 .debounce_interval = 30,
239};
240
241/******************************************************************************
242 * Backlight
243 ******************************************************************************/
244static int palmz72_backlight_init(struct device *dev)
245{
246 int ret;
247
248 ret = gpio_request(GPIO_NR_PALMZ72_BL_POWER, "BL POWER");
249 if (ret)
250 goto err;
251 ret = gpio_direction_output(GPIO_NR_PALMZ72_BL_POWER, 0);
252 if (ret)
253 goto err2;
254 ret = gpio_request(GPIO_NR_PALMZ72_LCD_POWER, "LCD POWER");
255 if (ret)
256 goto err2;
257 ret = gpio_direction_output(GPIO_NR_PALMZ72_LCD_POWER, 0);
258 if (ret)
259 goto err3;
260
261 return 0;
262err3:
263 gpio_free(GPIO_NR_PALMZ72_LCD_POWER);
264err2:
265 gpio_free(GPIO_NR_PALMZ72_BL_POWER);
266err:
267 return ret;
268}
269
270static int palmz72_backlight_notify(int brightness)
271{
272 gpio_set_value(GPIO_NR_PALMZ72_BL_POWER, brightness);
273 gpio_set_value(GPIO_NR_PALMZ72_LCD_POWER, brightness);
274 return brightness;
275}
276
277static void palmz72_backlight_exit(struct device *dev)
278{
279 gpio_free(GPIO_NR_PALMZ72_BL_POWER);
280 gpio_free(GPIO_NR_PALMZ72_LCD_POWER);
281}
282
283static struct platform_pwm_backlight_data palmz72_backlight_data = {
284 .pwm_id = 0,
285 .max_brightness = PALMZ72_MAX_INTENSITY,
286 .dft_brightness = PALMZ72_MAX_INTENSITY,
287 .pwm_period_ns = PALMZ72_PERIOD_NS,
288 .init = palmz72_backlight_init,
289 .notify = palmz72_backlight_notify,
290 .exit = palmz72_backlight_exit,
291};
292
293static struct platform_device palmz72_backlight = {
294 .name = "pwm-backlight",
295 .dev = {
296 .parent = &pxa27x_device_pwm0.dev,
297 .platform_data = &palmz72_backlight_data,
298 },
299};
300
301/******************************************************************************
302 * IrDA
303 ******************************************************************************/
304static int palmz72_irda_startup(struct device *dev)
305{
306 int err;
307 err = gpio_request(GPIO_NR_PALMZ72_IR_DISABLE, "IR DISABLE");
308 if (err)
309 goto err;
310 err = gpio_direction_output(GPIO_NR_PALMZ72_IR_DISABLE, 1);
311 if (err)
312 gpio_free(GPIO_NR_PALMZ72_IR_DISABLE);
313err:
314 return err;
315}
316
317static void palmz72_irda_shutdown(struct device *dev)
318{
319 gpio_free(GPIO_NR_PALMZ72_IR_DISABLE);
320}
321
322static void palmz72_irda_transceiver_mode(struct device *dev, int mode)
323{
324 gpio_set_value(GPIO_NR_PALMZ72_IR_DISABLE, mode & IR_OFF);
325 pxa2xx_transceiver_mode(dev, mode);
326}
327
328static struct pxaficp_platform_data palmz72_ficp_platform_data = {
329 .startup = palmz72_irda_startup,
330 .shutdown = palmz72_irda_shutdown,
331 .transceiver_cap = IR_SIRMODE | IR_OFF,
332 .transceiver_mode = palmz72_irda_transceiver_mode,
333};
334
335/******************************************************************************
336 * LEDs
337 ******************************************************************************/
338static struct gpio_led gpio_leds[] = {
339 {
340 .name = "palmz72:green:led",
341 .default_trigger = "none",
342 .gpio = GPIO_NR_PALMZ72_LED_GREEN,
343 },
344};
345
346static struct gpio_led_platform_data gpio_led_info = {
347 .leds = gpio_leds,
348 .num_leds = ARRAY_SIZE(gpio_leds),
349};
350
351static struct platform_device palmz72_leds = {
352 .name = "leds-gpio",
353 .id = -1,
354 .dev = {
355 .platform_data = &gpio_led_info,
356 }
357};
358
359/******************************************************************************
360 * Power supply
361 ******************************************************************************/
362static int power_supply_init(struct device *dev)
363{
364 int ret;
365
366 ret = gpio_request(GPIO_NR_PALMZ72_POWER_DETECT, "CABLE_STATE_AC");
367 if (ret)
368 goto err1;
369 ret = gpio_direction_input(GPIO_NR_PALMZ72_POWER_DETECT);
370 if (ret)
371 goto err2;
372
373 ret = gpio_request(GPIO_NR_PALMZ72_USB_DETECT_N, "CABLE_STATE_USB");
374 if (ret)
375 goto err2;
376 ret = gpio_direction_input(GPIO_NR_PALMZ72_USB_DETECT_N);
377 if (ret)
378 goto err3;
379
380 return 0;
381err3:
382 gpio_free(GPIO_NR_PALMZ72_USB_DETECT_N);
383err2:
384 gpio_free(GPIO_NR_PALMZ72_POWER_DETECT);
385err1:
386 return ret;
387}
388
389static int palmz72_is_ac_online(void)
390{
391 return gpio_get_value(GPIO_NR_PALMZ72_POWER_DETECT);
392}
393
394static int palmz72_is_usb_online(void)
395{
396 return !gpio_get_value(GPIO_NR_PALMZ72_USB_DETECT_N);
397}
398
399static void power_supply_exit(struct device *dev)
400{
401 gpio_free(GPIO_NR_PALMZ72_USB_DETECT_N);
402 gpio_free(GPIO_NR_PALMZ72_POWER_DETECT);
403}
404
405static char *palmz72_supplicants[] = {
406 "main-battery",
407};
408
409static struct pda_power_pdata power_supply_info = {
410 .init = power_supply_init,
411 .is_ac_online = palmz72_is_ac_online,
412 .is_usb_online = palmz72_is_usb_online,
413 .exit = power_supply_exit,
414 .supplied_to = palmz72_supplicants,
415 .num_supplicants = ARRAY_SIZE(palmz72_supplicants),
416};
417
418static struct platform_device power_supply = {
419 .name = "pda-power",
420 .id = -1,
421 .dev = {
422 .platform_data = &power_supply_info,
423 },
424};
425
426/******************************************************************************
427 * Framebuffer
428 ******************************************************************************/
429static struct pxafb_mode_info palmz72_lcd_modes[] = {
430{
431 .pixclock = 115384,
432 .xres = 320,
433 .yres = 320,
434 .bpp = 16,
435
436 .left_margin = 27,
437 .right_margin = 7,
438 .upper_margin = 7,
439 .lower_margin = 8,
440
441 .hsync_len = 6,
442 .vsync_len = 1,
443},
444};
445
446static struct pxafb_mach_info palmz72_lcd_screen = {
447 .modes = palmz72_lcd_modes,
448 .num_modes = ARRAY_SIZE(palmz72_lcd_modes),
449 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
450};
451
452/******************************************************************************
453 * Machine init
454 ******************************************************************************/
455static struct platform_device *devices[] __initdata = {
456 &palmz72_backlight,
457 &palmz72_leds,
458 &power_supply,
459};
460
461static void __init palmz72_init(void)
462{
463 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmz72_pin_config));
464 set_pxa_fb_info(&palmz72_lcd_screen);
465 pxa_set_mci_info(&palmz72_mci_platform_data);
466 pxa_set_ac97_info(NULL);
467 pxa_set_ficp_info(&palmz72_ficp_platform_data);
468 pxa_set_keypad_info(&palmz72_keypad_platform_data);
469 platform_add_devices(devices, ARRAY_SIZE(devices));
470}
471
472MACHINE_START(PALMZ72, "Palm Zire72")
473 .phys_io = 0x40000000,
474 .io_pg_offst = io_p2v(0x40000000),
475 .boot_params = 0xa0000100,
476 .map_io = pxa_map_io,
477 .init_irq = pxa27x_init_irq,
478 .timer = &pxa_timer,
479 .init_machine = palmz72_init
480MACHINE_END
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c
index 730b9f6ede1d..36135a02fdc7 100644
--- a/arch/arm/mach-pxa/pcm027.c
+++ b/arch/arm/mach-pxa/pcm027.c
@@ -31,7 +31,7 @@
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32#include <mach/hardware.h> 32#include <mach/hardware.h>
33#include <mach/pxa-regs.h> 33#include <mach/pxa-regs.h>
34#include <mach/pxa2xx-gpio.h> 34#include <mach/mfp-pxa27x.h>
35#include <mach/pxa2xx-regs.h> 35#include <mach/pxa2xx-regs.h>
36#include <mach/pxa2xx_spi.h> 36#include <mach/pxa2xx_spi.h>
37#include <mach/pcm027.h> 37#include <mach/pcm027.h>
@@ -86,6 +86,28 @@
86 * *) CPU internal use only 86 * *) CPU internal use only
87 */ 87 */
88 88
89static unsigned long pcm027_pin_config[] __initdata = {
90 /* Chip Selects */
91 GPIO20_nSDCS_2,
92 GPIO21_nSDCS_3,
93 GPIO15_nCS_1,
94 GPIO78_nCS_2,
95 GPIO80_nCS_4,
96 GPIO33_nCS_5, /* Ethernet */
97
98 /* I2C */
99 GPIO117_I2C_SCL,
100 GPIO118_I2C_SDA,
101
102 /* GPIO */
103 GPIO52_GPIO, /* IRQ from network controller */
104#ifdef CONFIG_LEDS_GPIO
105 GPIO90_GPIO, /* PCM027_LED_CPU */
106 GPIO91_GPIO, /* PCM027_LED_HEART_BEAT */
107#endif
108 GPIO114_GPIO, /* IRQ from CAN controller */
109};
110
89/* 111/*
90 * SMC91x network controller specific stuff 112 * SMC91x network controller specific stuff
91 */ 113 */
@@ -206,13 +228,9 @@ static void __init pcm027_init(void)
206 */ 228 */
207 ARB_CNTRL = ARB_CORE_PARK | 0x234; 229 ARB_CNTRL = ARB_CORE_PARK | 0x234;
208 230
209 platform_add_devices(devices, ARRAY_SIZE(devices)); 231 pxa2xx_mfp_config(pcm027_pin_config, ARRAY_SIZE(pcm027_pin_config));
210 232
211 /* LEDs (on demand only) */ 233 platform_add_devices(devices, ARRAY_SIZE(devices));
212#ifdef CONFIG_LEDS_GPIO
213 pxa_gpio_mode(PCM027_LED_CPU | GPIO_OUT);
214 pxa_gpio_mode(PCM027_LED_HEARD_BEAT | GPIO_OUT);
215#endif /* CONFIG_LEDS_GPIO */
216 234
217 /* at last call the baseboard to initialize itself */ 235 /* at last call the baseboard to initialize itself */
218#ifdef CONFIG_MACH_PCM990_BASEBOARD 236#ifdef CONFIG_MACH_PCM990_BASEBOARD
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 055ec63d768c..2e3bd8b1523b 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -20,6 +20,9 @@
20#include <linux/fb.h> 20#include <linux/fb.h>
21#include <linux/pm.h> 21#include <linux/pm.h>
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/gpio.h>
24#include <linux/spi/spi.h>
25#include <linux/spi/ads7846.h>
23 26
24#include <mach/hardware.h> 27#include <mach/hardware.h>
25#include <asm/mach-types.h> 28#include <asm/mach-types.h>
@@ -33,14 +36,16 @@
33 36
34#include <mach/pxa-regs.h> 37#include <mach/pxa-regs.h>
35#include <mach/pxa2xx-regs.h> 38#include <mach/pxa2xx-regs.h>
36#include <mach/pxa2xx-gpio.h> 39#include <mach/mfp-pxa25x.h>
37#include <mach/mmc.h> 40#include <mach/mmc.h>
38#include <mach/udc.h> 41#include <mach/udc.h>
42#include <mach/i2c.h>
39#include <mach/irda.h> 43#include <mach/irda.h>
40#include <mach/poodle.h> 44#include <mach/poodle.h>
41#include <mach/pxafb.h> 45#include <mach/pxafb.h>
42#include <mach/sharpsl.h> 46#include <mach/sharpsl.h>
43#include <mach/ssp.h> 47#include <mach/ssp.h>
48#include <mach/pxa2xx_spi.h>
44 49
45#include <asm/hardware/scoop.h> 50#include <asm/hardware/scoop.h>
46#include <asm/hardware/locomo.h> 51#include <asm/hardware/locomo.h>
@@ -50,6 +55,88 @@
50#include "devices.h" 55#include "devices.h"
51#include "sharpsl.h" 56#include "sharpsl.h"
52 57
58static unsigned long poodle_pin_config[] __initdata = {
59 /* I/O */
60 GPIO79_nCS_3,
61 GPIO80_nCS_4,
62 GPIO18_RDY,
63
64 /* Clock */
65 GPIO12_32KHz,
66
67 /* SSP1 */
68 GPIO23_SSP1_SCLK,
69 GPIO25_SSP1_TXD,
70 GPIO26_SSP1_RXD,
71 GPIO24_GPIO, /* POODLE_GPIO_TP_CS - SFRM as chip select */
72
73 /* I2S */
74 GPIO28_I2S_BITCLK_OUT,
75 GPIO29_I2S_SDATA_IN,
76 GPIO30_I2S_SDATA_OUT,
77 GPIO31_I2S_SYNC,
78 GPIO32_I2S_SYSCLK,
79
80 /* Infra-Red */
81 GPIO47_FICP_TXD,
82 GPIO46_FICP_RXD,
83
84 /* FFUART */
85 GPIO40_FFUART_DTR,
86 GPIO41_FFUART_RTS,
87 GPIO39_FFUART_TXD,
88 GPIO37_FFUART_DSR,
89 GPIO34_FFUART_RXD,
90 GPIO35_FFUART_CTS,
91
92 /* LCD */
93 GPIO58_LCD_LDD_0,
94 GPIO59_LCD_LDD_1,
95 GPIO60_LCD_LDD_2,
96 GPIO61_LCD_LDD_3,
97 GPIO62_LCD_LDD_4,
98 GPIO63_LCD_LDD_5,
99 GPIO64_LCD_LDD_6,
100 GPIO65_LCD_LDD_7,
101 GPIO66_LCD_LDD_8,
102 GPIO67_LCD_LDD_9,
103 GPIO68_LCD_LDD_10,
104 GPIO69_LCD_LDD_11,
105 GPIO70_LCD_LDD_12,
106 GPIO71_LCD_LDD_13,
107 GPIO72_LCD_LDD_14,
108 GPIO73_LCD_LDD_15,
109 GPIO74_LCD_FCLK,
110 GPIO75_LCD_LCLK,
111 GPIO76_LCD_PCLK,
112 GPIO77_LCD_BIAS,
113
114 /* PC Card */
115 GPIO48_nPOE,
116 GPIO49_nPWE,
117 GPIO50_nPIOR,
118 GPIO51_nPIOW,
119 GPIO52_nPCE_1,
120 GPIO53_nPCE_2,
121 GPIO54_nPSKTSEL,
122 GPIO55_nPREG,
123 GPIO56_nPWAIT,
124 GPIO57_nIOIS16,
125
126 /* MMC */
127 GPIO6_MMC_CLK,
128 GPIO8_MMC_CS0,
129
130 /* GPIO */
131 GPIO9_GPIO, /* POODLE_GPIO_nSD_DETECT */
132 GPIO7_GPIO, /* POODLE_GPIO_nSD_WP */
133 GPIO3_GPIO, /* POODLE_GPIO_SD_PWR */
134 GPIO33_GPIO, /* POODLE_GPIO_SD_PWR1 */
135
136 GPIO20_GPIO, /* POODLE_GPIO_USB_PULLUP */
137 GPIO22_GPIO, /* POODLE_GPIO_IR_ON */
138};
139
53static struct resource poodle_scoop_resources[] = { 140static struct resource poodle_scoop_resources[] = {
54 [0] = { 141 [0] = {
55 .start = 0x10800000, 142 .start = 0x10800000,
@@ -61,6 +148,7 @@ static struct resource poodle_scoop_resources[] = {
61static struct scoop_config poodle_scoop_setup = { 148static struct scoop_config poodle_scoop_setup = {
62 .io_dir = POODLE_SCOOP_IO_DIR, 149 .io_dir = POODLE_SCOOP_IO_DIR,
63 .io_out = POODLE_SCOOP_IO_OUT, 150 .io_out = POODLE_SCOOP_IO_OUT,
151 .gpio_base = POODLE_SCOOP_GPIO_BASE,
64}; 152};
65 153
66struct platform_device poodle_scoop_device = { 154struct platform_device poodle_scoop_device = {
@@ -73,27 +161,6 @@ struct platform_device poodle_scoop_device = {
73 .resource = poodle_scoop_resources, 161 .resource = poodle_scoop_resources,
74}; 162};
75 163
76static void poodle_pcmcia_init(void)
77{
78 /* Setup default state of GPIO outputs
79 before we enable them as outputs. */
80 GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
81 GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) |
82 GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO52_nPCE_1) |
83 GPIO_bit(GPIO53_nPCE_2);
84
85 pxa_gpio_mode(GPIO48_nPOE_MD);
86 pxa_gpio_mode(GPIO49_nPWE_MD);
87 pxa_gpio_mode(GPIO50_nPIOR_MD);
88 pxa_gpio_mode(GPIO51_nPIOW_MD);
89 pxa_gpio_mode(GPIO55_nPREG_MD);
90 pxa_gpio_mode(GPIO56_nPWAIT_MD);
91 pxa_gpio_mode(GPIO57_nIOIS16_MD);
92 pxa_gpio_mode(GPIO52_nPCE_1_MD);
93 pxa_gpio_mode(GPIO53_nPCE_2_MD);
94 pxa_gpio_mode(GPIO54_pSKTSEL_MD);
95}
96
97static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = { 164static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = {
98{ 165{
99 .dev = &poodle_scoop_device.dev, 166 .dev = &poodle_scoop_device.dev,
@@ -106,7 +173,6 @@ static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = {
106static struct scoop_pcmcia_config poodle_pcmcia_config = { 173static struct scoop_pcmcia_config poodle_pcmcia_config = {
107 .devs = &poodle_pcmcia_scoop[0], 174 .devs = &poodle_pcmcia_scoop[0],
108 .num_devs = 1, 175 .num_devs = 1,
109 .pcmcia_init = poodle_pcmcia_init,
110}; 176};
111 177
112EXPORT_SYMBOL(poodle_scoop_device); 178EXPORT_SYMBOL(poodle_scoop_device);
@@ -135,62 +201,55 @@ struct platform_device poodle_locomo_device = {
135 201
136EXPORT_SYMBOL(poodle_locomo_device); 202EXPORT_SYMBOL(poodle_locomo_device);
137 203
138/* 204#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
139 * Poodle SSP Device 205static struct pxa2xx_spi_master poodle_spi_info = {
140 */ 206 .num_chipselect = 1,
141
142struct platform_device poodle_ssp_device = {
143 .name = "corgi-ssp",
144 .id = -1,
145};
146
147struct corgissp_machinfo poodle_ssp_machinfo = {
148 .port = 1,
149 .cs_lcdcon = -1,
150 .cs_ads7846 = -1,
151 .cs_max1111 = -1,
152 .clk_lcdcon = 2,
153 .clk_ads7846 = 36,
154 .clk_max1111 = 2,
155}; 207};
156 208
157 209static struct ads7846_platform_data poodle_ads7846_info = {
158/* 210 .model = 7846,
159 * Poodle Touch Screen Device 211 .vref_delay_usecs = 100,
160 */ 212 .x_plate_ohms = 419,
161static struct resource poodlets_resources[] = { 213 .y_plate_ohms = 486,
162 [0] = { 214 .gpio_pendown = POODLE_GPIO_TP_INT,
163 .start = POODLE_IRQ_GPIO_TP_INT,
164 .end = POODLE_IRQ_GPIO_TP_INT,
165 .flags = IORESOURCE_IRQ,
166 },
167}; 215};
168 216
169static unsigned long poodle_get_hsync_invperiod(void) 217static void ads7846_cs(u32 command)
170{ 218{
171 return 0; 219 gpio_set_value(POODLE_GPIO_TP_CS, !(command == PXA2XX_CS_ASSERT));
172} 220}
173 221
174static void poodle_null_hsync(void) 222static struct pxa2xx_spi_chip poodle_ads7846_chip = {
175{ 223 .cs_control = ads7846_cs,
176}
177
178static struct corgits_machinfo poodle_ts_machinfo = {
179 .get_hsync_invperiod = poodle_get_hsync_invperiod,
180 .put_hsync = poodle_null_hsync,
181 .wait_hsync = poodle_null_hsync,
182}; 224};
183 225
184static struct platform_device poodle_ts_device = { 226static struct spi_board_info poodle_spi_devices[] = {
185 .name = "corgi-ts", 227 {
186 .dev = { 228 .modalias = "ads7846",
187 .platform_data = &poodle_ts_machinfo, 229 .max_speed_hz = 10000,
230 .bus_num = 1,
231 .platform_data = &poodle_ads7846_info,
232 .controller_data= &poodle_ads7846_chip,
233 .irq = gpio_to_irq(POODLE_GPIO_TP_INT),
188 }, 234 },
189 .id = -1,
190 .num_resources = ARRAY_SIZE(poodlets_resources),
191 .resource = poodlets_resources,
192}; 235};
193 236
237static void __init poodle_init_spi(void)
238{
239 int err;
240
241 err = gpio_request(POODLE_GPIO_TP_CS, "ADS7846_CS");
242 if (err)
243 return;
244
245 gpio_direction_output(POODLE_GPIO_TP_CS, 1);
246
247 pxa2xx_set_spi_info(1, &poodle_spi_info);
248 spi_register_board_info(ARRAY_AND_SIZE(poodle_spi_devices));
249}
250#else
251static inline void poodle_init_spi(void) {}
252#endif
194 253
195/* 254/*
196 * MMC/SD Device 255 * MMC/SD Device
@@ -204,22 +263,50 @@ static int poodle_mci_init(struct device *dev, irq_handler_t poodle_detect_int,
204{ 263{
205 int err; 264 int err;
206 265
207 /* setup GPIO for PXA25x MMC controller */ 266 err = gpio_request(POODLE_GPIO_nSD_DETECT, "nSD_DETECT");
208 pxa_gpio_mode(GPIO6_MMCCLK_MD); 267 if (err)
209 pxa_gpio_mode(GPIO8_MMCCS0_MD); 268 goto err_out;
210 pxa_gpio_mode(POODLE_GPIO_nSD_DETECT | GPIO_IN); 269
211 pxa_gpio_mode(POODLE_GPIO_nSD_WP | GPIO_IN); 270 err = gpio_request(POODLE_GPIO_nSD_WP, "nSD_WP");
212 pxa_gpio_mode(POODLE_GPIO_SD_PWR | GPIO_OUT); 271 if (err)
213 pxa_gpio_mode(POODLE_GPIO_SD_PWR1 | GPIO_OUT); 272 goto err_free_1;
273
274 err = gpio_request(POODLE_GPIO_SD_PWR, "SD_PWR");
275 if (err)
276 goto err_free_2;
277
278 err = gpio_request(POODLE_GPIO_SD_PWR1, "SD_PWR1");
279 if (err)
280 goto err_free_3;
281
282 gpio_direction_input(POODLE_GPIO_nSD_DETECT);
283 gpio_direction_input(POODLE_GPIO_nSD_WP);
284
285 gpio_direction_output(POODLE_GPIO_SD_PWR, 0);
286 gpio_direction_output(POODLE_GPIO_SD_PWR1, 0);
214 287
215 poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250); 288 poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250);
216 289
217 err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int, 290 err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int,
218 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 291 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
219 "MMC card detect", data); 292 "MMC card detect", data);
220 if (err) 293 if (err) {
221 printk(KERN_ERR "poodle_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 294 pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n",
295 __func__);
296 goto err_free_4;
297 }
298
299 return 0;
222 300
301err_free_4:
302 gpio_free(POODLE_GPIO_SD_PWR1);
303err_free_3:
304 gpio_free(POODLE_GPIO_SD_PWR);
305err_free_2:
306 gpio_free(POODLE_GPIO_nSD_WP);
307err_free_1:
308 gpio_free(POODLE_GPIO_nSD_DETECT);
309err_out:
223 return err; 310 return err;
224} 311}
225 312
@@ -227,18 +314,19 @@ static void poodle_mci_setpower(struct device *dev, unsigned int vdd)
227{ 314{
228 struct pxamci_platform_data* p_d = dev->platform_data; 315 struct pxamci_platform_data* p_d = dev->platform_data;
229 316
230 if (( 1 << vdd) & p_d->ocr_mask) { 317 if ((1 << vdd) & p_d->ocr_mask) {
231 GPSR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR); 318 gpio_set_value(POODLE_GPIO_SD_PWR, 1);
232 mdelay(2); 319 mdelay(2);
233 GPSR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1); 320 gpio_set_value(POODLE_GPIO_SD_PWR1, 1);
234 } else { 321 } else {
235 GPCR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1); 322 gpio_set_value(POODLE_GPIO_SD_PWR1, 0);
236 GPCR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR); 323 gpio_set_value(POODLE_GPIO_SD_PWR, 0);
237 } 324 }
238} 325}
239 326
240static int poodle_mci_get_ro(struct device *dev) 327static int poodle_mci_get_ro(struct device *dev)
241{ 328{
329 return !!gpio_get_value(POODLE_GPIO_nSD_WP);
242 return GPLR(POODLE_GPIO_nSD_WP) & GPIO_bit(POODLE_GPIO_nSD_WP); 330 return GPLR(POODLE_GPIO_nSD_WP) & GPIO_bit(POODLE_GPIO_nSD_WP);
243} 331}
244 332
@@ -246,6 +334,10 @@ static int poodle_mci_get_ro(struct device *dev)
246static void poodle_mci_exit(struct device *dev, void *data) 334static void poodle_mci_exit(struct device *dev, void *data)
247{ 335{
248 free_irq(POODLE_IRQ_GPIO_nSD_DETECT, data); 336 free_irq(POODLE_IRQ_GPIO_nSD_DETECT, data);
337 gpio_free(POODLE_GPIO_SD_PWR1);
338 gpio_free(POODLE_GPIO_SD_PWR);
339 gpio_free(POODLE_GPIO_nSD_WP);
340 gpio_free(POODLE_GPIO_nSD_DETECT);
249} 341}
250 342
251static struct pxamci_platform_data poodle_mci_platform_data = { 343static struct pxamci_platform_data poodle_mci_platform_data = {
@@ -262,38 +354,41 @@ static struct pxamci_platform_data poodle_mci_platform_data = {
262 */ 354 */
263static void poodle_irda_transceiver_mode(struct device *dev, int mode) 355static void poodle_irda_transceiver_mode(struct device *dev, int mode)
264{ 356{
265 if (mode & IR_OFF) { 357 gpio_set_value(POODLE_GPIO_IR_ON, mode & IR_OFF);
266 GPSR(POODLE_GPIO_IR_ON) = GPIO_bit(POODLE_GPIO_IR_ON);
267 } else {
268 GPCR(POODLE_GPIO_IR_ON) = GPIO_bit(POODLE_GPIO_IR_ON);
269 }
270 pxa2xx_transceiver_mode(dev, mode); 358 pxa2xx_transceiver_mode(dev, mode);
271} 359}
272 360
361static int poodle_irda_startup(struct device *dev)
362{
363 int err;
364
365 err = gpio_request(POODLE_GPIO_IR_ON, "IR_ON");
366 if (err)
367 return err;
368
369 gpio_direction_output(POODLE_GPIO_IR_ON, 1);
370 return 0;
371}
372
373static void poodle_irda_shutdown(struct device *dev)
374{
375 gpio_free(POODLE_GPIO_IR_ON);
376}
377
273static struct pxaficp_platform_data poodle_ficp_platform_data = { 378static struct pxaficp_platform_data poodle_ficp_platform_data = {
274 .transceiver_cap = IR_SIRMODE | IR_OFF, 379 .transceiver_cap = IR_SIRMODE | IR_OFF,
275 .transceiver_mode = poodle_irda_transceiver_mode, 380 .transceiver_mode = poodle_irda_transceiver_mode,
381 .startup = poodle_irda_startup,
382 .shutdown = poodle_irda_shutdown,
276}; 383};
277 384
278 385
279/* 386/*
280 * USB Device Controller 387 * USB Device Controller
281 */ 388 */
282static void poodle_udc_command(int cmd)
283{
284 switch(cmd) {
285 case PXA2XX_UDC_CMD_CONNECT:
286 GPSR(POODLE_GPIO_USB_PULLUP) = GPIO_bit(POODLE_GPIO_USB_PULLUP);
287 break;
288 case PXA2XX_UDC_CMD_DISCONNECT:
289 GPCR(POODLE_GPIO_USB_PULLUP) = GPIO_bit(POODLE_GPIO_USB_PULLUP);
290 break;
291 }
292}
293
294static struct pxa2xx_udc_mach_info udc_info __initdata = { 389static struct pxa2xx_udc_mach_info udc_info __initdata = {
295 /* no connect GPIO; poodle can't tell connection status */ 390 /* no connect GPIO; poodle can't tell connection status */
296 .udc_command = poodle_udc_command, 391 .gpio_pullup = POODLE_GPIO_USB_PULLUP,
297}; 392};
298 393
299 394
@@ -315,15 +410,12 @@ static struct pxafb_mode_info poodle_fb_mode = {
315static struct pxafb_mach_info poodle_fb_info = { 410static struct pxafb_mach_info poodle_fb_info = {
316 .modes = &poodle_fb_mode, 411 .modes = &poodle_fb_mode,
317 .num_modes = 1, 412 .num_modes = 1,
318 .lccr0 = LCCR0_Act | LCCR0_Sngl | LCCR0_Color, 413 .lcd_conn = LCD_COLOR_TFT_16BPP,
319 .lccr3 = 0,
320}; 414};
321 415
322static struct platform_device *devices[] __initdata = { 416static struct platform_device *devices[] __initdata = {
323 &poodle_locomo_device, 417 &poodle_locomo_device,
324 &poodle_scoop_device, 418 &poodle_scoop_device,
325 &poodle_ssp_device,
326 &poodle_ts_device,
327}; 419};
328 420
329static void poodle_poweroff(void) 421static void poodle_poweroff(void)
@@ -343,58 +435,23 @@ static void __init poodle_init(void)
343 pm_power_off = poodle_poweroff; 435 pm_power_off = poodle_poweroff;
344 arm_pm_restart = poodle_restart; 436 arm_pm_restart = poodle_restart;
345 437
346 /* setup sleep mode values */
347 PWER = 0x00000002;
348 PFER = 0x00000000;
349 PRER = 0x00000002;
350 PGSR0 = 0x00008000;
351 PGSR1 = 0x003F0202;
352 PGSR2 = 0x0001C000;
353 PCFR |= PCFR_OPDE; 438 PCFR |= PCFR_OPDE;
354 439
355 /* cpu initialize */ 440 pxa2xx_mfp_config(ARRAY_AND_SIZE(poodle_pin_config));
356 /* Pgsr Register */ 441
357 PGSR0 = 0x0146dd80; 442 platform_scoop_config = &poodle_pcmcia_config;
358 PGSR1 = 0x03bf0890; 443
359 PGSR2 = 0x0001c000; 444 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
360 445 if (ret)
361 /* Alternate Register */ 446 pr_warning("poodle: Unable to register LoCoMo device\n");
362 GAFR0_L = 0x01001000;
363 GAFR0_U = 0x591a8010;
364 GAFR1_L = 0x900a8451;
365 GAFR1_U = 0xaaa5aaaa;
366 GAFR2_L = 0x8aaaaaaa;
367 GAFR2_U = 0x00000002;
368
369 /* Direction Register */
370 GPDR0 = 0xd3f0904c;
371 GPDR1 = 0xfcffb7d3;
372 GPDR2 = 0x0001ffff;
373
374 /* Output Register */
375 GPCR0 = 0x00000000;
376 GPCR1 = 0x00000000;
377 GPCR2 = 0x00000000;
378
379 GPSR0 = 0x00400000;
380 GPSR1 = 0x00000000;
381 GPSR2 = 0x00000000;
382 447
383 set_pxa_fb_parent(&poodle_locomo_device.dev); 448 set_pxa_fb_parent(&poodle_locomo_device.dev);
384 set_pxa_fb_info(&poodle_fb_info); 449 set_pxa_fb_info(&poodle_fb_info);
385 pxa_gpio_mode(POODLE_GPIO_USB_PULLUP | GPIO_OUT);
386 pxa_gpio_mode(POODLE_GPIO_IR_ON | GPIO_OUT);
387 pxa_set_udc_info(&udc_info); 450 pxa_set_udc_info(&udc_info);
388 pxa_set_mci_info(&poodle_mci_platform_data); 451 pxa_set_mci_info(&poodle_mci_platform_data);
389 pxa_set_ficp_info(&poodle_ficp_platform_data); 452 pxa_set_ficp_info(&poodle_ficp_platform_data);
390 453 pxa_set_i2c_info(NULL);
391 platform_scoop_config = &poodle_pcmcia_config; 454 poodle_init_spi();
392
393 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
394 if (ret) {
395 printk(KERN_WARNING "poodle: Unable to register LoCoMo device\n");
396 }
397 corgi_ssp_set_machinfo(&poodle_ssp_machinfo);
398} 455}
399 456
400static void __init fixup_poodle(struct machine_desc *desc, 457static void __init fixup_poodle(struct machine_desc *desc,
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 3caa74a10d13..25d17a1dab78 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -209,45 +209,21 @@ static struct clk pxa25x_clks[] = {
209 * More ones like CP and general purpose register values are preserved 209 * More ones like CP and general purpose register values are preserved
210 * with the stack pointer in sleep.S. 210 * with the stack pointer in sleep.S.
211 */ 211 */
212enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, 212enum {
213
214 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
215 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
216 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
217
218 SLEEP_SAVE_PSTR, 213 SLEEP_SAVE_PSTR,
219
220 SLEEP_SAVE_CKEN, 214 SLEEP_SAVE_CKEN,
221
222 SLEEP_SAVE_COUNT 215 SLEEP_SAVE_COUNT
223}; 216};
224 217
225 218
226static void pxa25x_cpu_pm_save(unsigned long *sleep_save) 219static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
227{ 220{
228 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
229
230 SAVE(GAFR0_L); SAVE(GAFR0_U);
231 SAVE(GAFR1_L); SAVE(GAFR1_U);
232 SAVE(GAFR2_L); SAVE(GAFR2_U);
233
234 SAVE(CKEN); 221 SAVE(CKEN);
235 SAVE(PSTR); 222 SAVE(PSTR);
236
237 /* Clear GPIO transition detect bits */
238 GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
239} 223}
240 224
241static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) 225static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
242{ 226{
243 /* restore registers */
244 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
245 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
246 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
247 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
248
249 PSSR = PSSR_RDH | PSSR_PH;
250
251 RESTORE(CKEN); 227 RESTORE(CKEN);
252 RESTORE(PSTR); 228 RESTORE(PSTR);
253} 229}
@@ -346,6 +322,8 @@ static struct sys_device pxa25x_sysdev[] = {
346 { 322 {
347 .cls = &pxa_irq_sysclass, 323 .cls = &pxa_irq_sysclass,
348 }, { 324 }, {
325 .cls = &pxa2xx_mfp_sysclass,
326 }, {
349 .cls = &pxa_gpio_sysclass, 327 .cls = &pxa_gpio_sysclass,
350 }, 328 },
351}; 329};
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 4835207c1426..bf01e14098f5 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -183,36 +183,18 @@ static struct clk pxa27x_clks[] = {
183 * More ones like CP and general purpose register values are preserved 183 * More ones like CP and general purpose register values are preserved
184 * with the stack pointer in sleep.S. 184 * with the stack pointer in sleep.S.
185 */ 185 */
186enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3, 186enum {
187
188 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
189 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
190 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
191 SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U,
192
193 SLEEP_SAVE_PSTR, 187 SLEEP_SAVE_PSTR,
194
195 SLEEP_SAVE_CKEN, 188 SLEEP_SAVE_CKEN,
196
197 SLEEP_SAVE_MDREFR, 189 SLEEP_SAVE_MDREFR,
198 SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER, 190 SLEEP_SAVE_PCFR,
199 SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
200
201 SLEEP_SAVE_COUNT 191 SLEEP_SAVE_COUNT
202}; 192};
203 193
204void pxa27x_cpu_pm_save(unsigned long *sleep_save) 194void pxa27x_cpu_pm_save(unsigned long *sleep_save)
205{ 195{
206 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); SAVE(PGSR3);
207
208 SAVE(GAFR0_L); SAVE(GAFR0_U);
209 SAVE(GAFR1_L); SAVE(GAFR1_U);
210 SAVE(GAFR2_L); SAVE(GAFR2_U);
211 SAVE(GAFR3_L); SAVE(GAFR3_U);
212
213 SAVE(MDREFR); 196 SAVE(MDREFR);
214 SAVE(PWER); SAVE(PCFR); SAVE(PRER); 197 SAVE(PCFR);
215 SAVE(PFER); SAVE(PKWR);
216 198
217 SAVE(CKEN); 199 SAVE(CKEN);
218 SAVE(PSTR); 200 SAVE(PSTR);
@@ -220,21 +202,12 @@ void pxa27x_cpu_pm_save(unsigned long *sleep_save)
220 202
221void pxa27x_cpu_pm_restore(unsigned long *sleep_save) 203void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
222{ 204{
223 /* restore registers */
224 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
225 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
226 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
227 RESTORE(GAFR3_L); RESTORE(GAFR3_U);
228 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); RESTORE(PGSR3);
229
230 RESTORE(MDREFR); 205 RESTORE(MDREFR);
231 RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER); 206 RESTORE(PCFR);
232 RESTORE(PFER); RESTORE(PKWR);
233 207
234 PSSR = PSSR_RDH | PSSR_PH; 208 PSSR = PSSR_RDH | PSSR_PH;
235 209
236 RESTORE(CKEN); 210 RESTORE(CKEN);
237
238 RESTORE(PSTR); 211 RESTORE(PSTR);
239} 212}
240 213
@@ -386,6 +359,8 @@ static struct sys_device pxa27x_sysdev[] = {
386 { 359 {
387 .cls = &pxa_irq_sysclass, 360 .cls = &pxa_irq_sysclass,
388 }, { 361 }, {
362 .cls = &pxa2xx_mfp_sysclass,
363 }, {
389 .cls = &pxa_gpio_sysclass, 364 .cls = &pxa_gpio_sysclass,
390 }, 365 },
391}; 366};
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index e804ae09370c..15c2f1a8623b 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -116,24 +116,20 @@ struct battery_thresh spitz_battery_levels_noac[] = {
116 { 0, 0}, 116 { 0, 0},
117}; 117};
118 118
119/* MAX1111 Commands */
120#define MAXCTRL_PD0 1u << 0
121#define MAXCTRL_PD1 1u << 1
122#define MAXCTRL_SGL 1u << 2
123#define MAXCTRL_UNI 1u << 3
124#define MAXCTRL_SEL_SH 4
125#define MAXCTRL_STR 1u << 7
126
127/* 119/*
128 * Read MAX1111 ADC 120 * Read MAX1111 ADC
129 */ 121 */
122extern int max1111_read_channel(int);
123
130int sharpsl_pm_pxa_read_max1111(int channel) 124int sharpsl_pm_pxa_read_max1111(int channel)
131{ 125{
132 if (machine_is_tosa()) // Ugly, better move this function into another module 126 if (machine_is_tosa()) // Ugly, better move this function into another module
133 return 0; 127 return 0;
134 128
135 return corgi_ssp_max1111_get((channel << MAXCTRL_SEL_SH) | MAXCTRL_PD0 | MAXCTRL_PD1 129 /* max1111 accepts channels from 0-3, however,
136 | MAXCTRL_SGL | MAXCTRL_UNI | MAXCTRL_STR); 130 * it is encoded from 0-7 here in the code.
131 */
132 return max1111_read_channel(channel >> 1);
137} 133}
138 134
139void sharpsl_pm_pxa_init(void) 135void sharpsl_pm_pxa_init(void)
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index cd39005c98ff..245890d2b6b5 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -19,9 +19,16 @@
19#include <linux/major.h> 19#include <linux/major.h>
20#include <linux/fs.h> 20#include <linux/fs.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/gpio.h>
23#include <linux/leds.h>
22#include <linux/mmc/host.h> 24#include <linux/mmc/host.h>
23#include <linux/pm.h> 25#include <linux/pm.h>
24#include <linux/backlight.h> 26#include <linux/backlight.h>
27#include <linux/i2c.h>
28#include <linux/i2c/pca953x.h>
29#include <linux/spi/spi.h>
30#include <linux/spi/ads7846.h>
31#include <linux/spi/corgi_lcd.h>
25 32
26#include <asm/setup.h> 33#include <asm/setup.h>
27#include <asm/memory.h> 34#include <asm/memory.h>
@@ -37,15 +44,16 @@
37 44
38#include <mach/pxa-regs.h> 45#include <mach/pxa-regs.h>
39#include <mach/pxa2xx-regs.h> 46#include <mach/pxa2xx-regs.h>
40#include <mach/pxa2xx-gpio.h> 47#include <mach/mfp-pxa27x.h>
41#include <mach/pxa27x-udc.h> 48#include <mach/pxa27x-udc.h>
42#include <mach/reset.h> 49#include <mach/reset.h>
50#include <mach/i2c.h>
43#include <mach/irda.h> 51#include <mach/irda.h>
44#include <mach/mmc.h> 52#include <mach/mmc.h>
45#include <mach/ohci.h> 53#include <mach/ohci.h>
46#include <mach/udc.h> 54#include <mach/udc.h>
47#include <mach/pxafb.h> 55#include <mach/pxafb.h>
48#include <mach/akita.h> 56#include <mach/pxa2xx_spi.h>
49#include <mach/spitz.h> 57#include <mach/spitz.h>
50#include <mach/sharpsl.h> 58#include <mach/sharpsl.h>
51 59
@@ -56,6 +64,66 @@
56#include "devices.h" 64#include "devices.h"
57#include "sharpsl.h" 65#include "sharpsl.h"
58 66
67static unsigned long spitz_pin_config[] __initdata = {
68 /* Chip Selects */
69 GPIO78_nCS_2, /* SCOOP #2 */
70 GPIO80_nCS_4, /* SCOOP #1 */
71
72 /* LCD - 16bpp Active TFT */
73 GPIO58_LCD_LDD_0,
74 GPIO59_LCD_LDD_1,
75 GPIO60_LCD_LDD_2,
76 GPIO61_LCD_LDD_3,
77 GPIO62_LCD_LDD_4,
78 GPIO63_LCD_LDD_5,
79 GPIO64_LCD_LDD_6,
80 GPIO65_LCD_LDD_7,
81 GPIO66_LCD_LDD_8,
82 GPIO67_LCD_LDD_9,
83 GPIO68_LCD_LDD_10,
84 GPIO69_LCD_LDD_11,
85 GPIO70_LCD_LDD_12,
86 GPIO71_LCD_LDD_13,
87 GPIO72_LCD_LDD_14,
88 GPIO73_LCD_LDD_15,
89 GPIO74_LCD_FCLK,
90 GPIO75_LCD_LCLK,
91 GPIO76_LCD_PCLK,
92
93 /* PC Card */
94 GPIO48_nPOE,
95 GPIO49_nPWE,
96 GPIO50_nPIOR,
97 GPIO51_nPIOW,
98 GPIO85_nPCE_1,
99 GPIO54_nPCE_2,
100 GPIO79_PSKTSEL,
101 GPIO55_nPREG,
102 GPIO56_nPWAIT,
103 GPIO57_nIOIS16,
104
105 /* MMC */
106 GPIO32_MMC_CLK,
107 GPIO112_MMC_CMD,
108 GPIO92_MMC_DAT_0,
109 GPIO109_MMC_DAT_1,
110 GPIO110_MMC_DAT_2,
111 GPIO111_MMC_DAT_3,
112
113 /* GPIOs */
114 GPIO9_GPIO, /* SPITZ_GPIO_nSD_DETECT */
115 GPIO81_GPIO, /* SPITZ_GPIO_nSD_WP */
116 GPIO41_GPIO, /* SPITZ_GPIO_USB_CONNECT */
117 GPIO37_GPIO, /* SPITZ_GPIO_USB_HOST */
118 GPIO35_GPIO, /* SPITZ_GPIO_USB_DEVICE */
119 GPIO22_GPIO, /* SPITZ_GPIO_HSYNC */
120 GPIO94_GPIO, /* SPITZ_GPIO_CF_CD */
121 GPIO105_GPIO, /* SPITZ_GPIO_CF_IRQ */
122 GPIO106_GPIO, /* SPITZ_GPIO_CF2_IRQ */
123
124 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,
125};
126
59/* 127/*
60 * Spitz SCOOP Device #1 128 * Spitz SCOOP Device #1
61 */ 129 */
@@ -68,10 +136,11 @@ static struct resource spitz_scoop_resources[] = {
68}; 136};
69 137
70static struct scoop_config spitz_scoop_setup = { 138static struct scoop_config spitz_scoop_setup = {
71 .io_dir = SPITZ_SCP_IO_DIR, 139 .io_dir = SPITZ_SCP_IO_DIR,
72 .io_out = SPITZ_SCP_IO_OUT, 140 .io_out = SPITZ_SCP_IO_OUT,
73 .suspend_clr = SPITZ_SCP_SUS_CLR, 141 .suspend_clr = SPITZ_SCP_SUS_CLR,
74 .suspend_set = SPITZ_SCP_SUS_SET, 142 .suspend_set = SPITZ_SCP_SUS_SET,
143 .gpio_base = SPITZ_SCP_GPIO_BASE,
75}; 144};
76 145
77struct platform_device spitzscoop_device = { 146struct platform_device spitzscoop_device = {
@@ -96,10 +165,11 @@ static struct resource spitz_scoop2_resources[] = {
96}; 165};
97 166
98static struct scoop_config spitz_scoop2_setup = { 167static struct scoop_config spitz_scoop2_setup = {
99 .io_dir = SPITZ_SCP2_IO_DIR, 168 .io_dir = SPITZ_SCP2_IO_DIR,
100 .io_out = SPITZ_SCP2_IO_OUT, 169 .io_out = SPITZ_SCP2_IO_OUT,
101 .suspend_clr = SPITZ_SCP2_SUS_CLR, 170 .suspend_clr = SPITZ_SCP2_SUS_CLR,
102 .suspend_set = SPITZ_SCP2_SUS_SET, 171 .suspend_set = SPITZ_SCP2_SUS_SET,
172 .gpio_base = SPITZ_SCP2_GPIO_BASE,
103}; 173};
104 174
105struct platform_device spitzscoop2_device = { 175struct platform_device spitzscoop2_device = {
@@ -121,7 +191,7 @@ static void spitz_card_pwr_ctrl(int device, unsigned short new_cpr)
121 unsigned short cpr = read_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR); 191 unsigned short cpr = read_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR);
122 192
123 if (new_cpr & 0x0007) { 193 if (new_cpr & 0x0007) {
124 set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CF_POWER); 194 gpio_set_value(SPITZ_GPIO_CF_POWER, 1);
125 if (!(cpr & 0x0002) && !(cpr & 0x0004)) 195 if (!(cpr & 0x0002) && !(cpr & 0x0004))
126 mdelay(5); 196 mdelay(5);
127 if (device == SPITZ_PWR_CF) 197 if (device == SPITZ_PWR_CF)
@@ -137,34 +207,13 @@ static void spitz_card_pwr_ctrl(int device, unsigned short new_cpr)
137 if (!(cpr & 0x0002) && !(cpr & 0x0004)) { 207 if (!(cpr & 0x0002) && !(cpr & 0x0004)) {
138 write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, 0x0000); 208 write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, 0x0000);
139 mdelay(1); 209 mdelay(1);
140 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CF_POWER); 210 gpio_set_value(SPITZ_GPIO_CF_POWER, 0);
141 } else { 211 } else {
142 write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr); 212 write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr);
143 } 213 }
144 } 214 }
145} 215}
146 216
147static void spitz_pcmcia_init(void)
148{
149 /* Setup default state of GPIO outputs
150 before we enable them as outputs. */
151 GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
152 GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) |
153 GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO54_nPCE_2);
154 GPSR(GPIO85_nPCE_1) = GPIO_bit(GPIO85_nPCE_1);
155
156 pxa_gpio_mode(GPIO48_nPOE_MD);
157 pxa_gpio_mode(GPIO49_nPWE_MD);
158 pxa_gpio_mode(GPIO50_nPIOR_MD);
159 pxa_gpio_mode(GPIO51_nPIOW_MD);
160 pxa_gpio_mode(GPIO55_nPREG_MD);
161 pxa_gpio_mode(GPIO56_nPWAIT_MD);
162 pxa_gpio_mode(GPIO57_nIOIS16_MD);
163 pxa_gpio_mode(GPIO85_nPCE_1_MD);
164 pxa_gpio_mode(GPIO54_nPCE_2_MD);
165 pxa_gpio_mode(GPIO104_pSKTSEL_MD);
166}
167
168static void spitz_pcmcia_pwr(struct device *scoop, unsigned short cpr, int nr) 217static void spitz_pcmcia_pwr(struct device *scoop, unsigned short cpr, int nr)
169{ 218{
170 /* Only need to override behaviour for slot 0 */ 219 /* Only need to override behaviour for slot 0 */
@@ -190,165 +239,169 @@ static struct scoop_pcmcia_dev spitz_pcmcia_scoop[] = {
190static struct scoop_pcmcia_config spitz_pcmcia_config = { 239static struct scoop_pcmcia_config spitz_pcmcia_config = {
191 .devs = &spitz_pcmcia_scoop[0], 240 .devs = &spitz_pcmcia_scoop[0],
192 .num_devs = 2, 241 .num_devs = 2,
193 .pcmcia_init = spitz_pcmcia_init,
194 .power_ctrl = spitz_pcmcia_pwr, 242 .power_ctrl = spitz_pcmcia_pwr,
195}; 243};
196 244
197EXPORT_SYMBOL(spitzscoop_device); 245EXPORT_SYMBOL(spitzscoop_device);
198EXPORT_SYMBOL(spitzscoop2_device); 246EXPORT_SYMBOL(spitzscoop2_device);
199 247
200
201/* 248/*
202 * Spitz SSP Device 249 * Spitz Keyboard Device
203 *
204 * Set the parent as the scoop device because a lot of SSP devices
205 * also use scoop functions and this makes the power up/down order
206 * work correctly.
207 */ 250 */
208struct platform_device spitzssp_device = { 251static struct platform_device spitzkbd_device = {
209 .name = "corgi-ssp", 252 .name = "spitz-keyboard",
210 .dev = {
211 .parent = &spitzscoop_device.dev,
212 },
213 .id = -1, 253 .id = -1,
214}; 254};
215 255
216struct corgissp_machinfo spitz_ssp_machinfo = {
217 .port = 2,
218 .cs_lcdcon = SPITZ_GPIO_LCDCON_CS,
219 .cs_ads7846 = SPITZ_GPIO_ADS7846_CS,
220 .cs_max1111 = SPITZ_GPIO_MAX1111_CS,
221 .clk_lcdcon = 520,
222 .clk_ads7846 = 14,
223 .clk_max1111 = 56,
224};
225
226 256
227/* 257/*
228 * Spitz Backlight Device 258 * Spitz LEDs
229 */ 259 */
230static void spitz_bl_kick_battery(void) 260static struct gpio_led spitz_gpio_leds[] = {
231{ 261 {
232 void (*kick_batt)(void); 262 .name = "spitz:amber:charge",
233 263 .default_trigger = "sharpsl-charge",
234 kick_batt = symbol_get(sharpsl_battery_kick); 264 .gpio = SPITZ_GPIO_LED_ORANGE,
235 if (kick_batt) { 265 },
236 kick_batt(); 266 {
237 symbol_put(sharpsl_battery_kick); 267 .name = "spitz:green:hddactivity",
238 } 268 .default_trigger = "ide-disk",
239} 269 .gpio = SPITZ_GPIO_LED_GREEN,
240
241static struct generic_bl_info spitz_bl_machinfo = {
242 .name = "corgi-bl",
243 .default_intensity = 0x1f,
244 .limit_mask = 0x0b,
245 .max_intensity = 0x2f,
246 .kick_battery = spitz_bl_kick_battery,
247};
248
249static struct platform_device spitzbl_device = {
250 .name = "generic-bl",
251 .dev = {
252 .platform_data = &spitz_bl_machinfo,
253 }, 270 },
254 .id = -1,
255}; 271};
256 272
257 273static struct gpio_led_platform_data spitz_gpio_leds_info = {
258/* 274 .leds = spitz_gpio_leds,
259 * Spitz Keyboard Device 275 .num_leds = ARRAY_SIZE(spitz_gpio_leds),
260 */
261static struct platform_device spitzkbd_device = {
262 .name = "spitz-keyboard",
263 .id = -1,
264}; 276};
265 277
266
267/*
268 * Spitz LEDs
269 */
270static struct platform_device spitzled_device = { 278static struct platform_device spitzled_device = {
271 .name = "spitz-led", 279 .name = "leds-gpio",
272 .id = -1, 280 .id = -1,
281 .dev = {
282 .platform_data = &spitz_gpio_leds_info,
283 },
273}; 284};
274 285
275/* 286#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
276 * Spitz Touch Screen Device 287static struct pxa2xx_spi_master spitz_spi_info = {
277 */ 288 .num_chipselect = 3,
289};
278 290
279static unsigned long (*get_hsync_invperiod)(struct device *dev); 291static struct ads7846_platform_data spitz_ads7846_info = {
292 .model = 7846,
293 .vref_delay_usecs = 100,
294 .x_plate_ohms = 419,
295 .y_plate_ohms = 486,
296 .gpio_pendown = SPITZ_GPIO_TP_INT,
297};
280 298
281static void inline sharpsl_wait_sync(int gpio) 299static void spitz_ads7846_cs(u32 command)
282{ 300{
283 while((GPLR(gpio) & GPIO_bit(gpio)) == 0); 301 gpio_set_value(SPITZ_GPIO_ADS7846_CS, !(command == PXA2XX_CS_ASSERT));
284 while((GPLR(gpio) & GPIO_bit(gpio)) != 0);
285} 302}
286 303
287static struct device *spitz_pxafb_dev; 304static struct pxa2xx_spi_chip spitz_ads7846_chip = {
305 .cs_control = spitz_ads7846_cs,
306};
288 307
289static int is_pxafb_device(struct device * dev, void * data) 308static void spitz_bl_kick_battery(void)
290{ 309{
291 struct platform_device *pdev = container_of(dev, struct platform_device, dev); 310 void (*kick_batt)(void);
292
293 return (strncmp(pdev->name, "pxa2xx-fb", 9) == 0);
294}
295 311
296static unsigned long spitz_get_hsync_invperiod(void) 312 kick_batt = symbol_get(sharpsl_battery_kick);
297{ 313 if (kick_batt) {
298#ifdef CONFIG_FB_PXA 314 kick_batt();
299 if (!spitz_pxafb_dev) { 315 symbol_put(sharpsl_battery_kick);
300 spitz_pxafb_dev = bus_find_device(&platform_bus_type, NULL, NULL, is_pxafb_device);
301 if (!spitz_pxafb_dev)
302 return 0;
303 } 316 }
304 if (!get_hsync_invperiod)
305 get_hsync_invperiod = symbol_get(pxafb_get_hsync_time);
306 if (!get_hsync_invperiod)
307#endif
308 return 0;
309
310 return get_hsync_invperiod(spitz_pxafb_dev);
311} 317}
312 318
313static void spitz_put_hsync(void) 319static struct corgi_lcd_platform_data spitz_lcdcon_info = {
314{ 320 .init_mode = CORGI_LCD_MODE_VGA,
315 put_device(spitz_pxafb_dev); 321 .max_intensity = 0x2f,
316 if (get_hsync_invperiod) 322 .default_intensity = 0x1f,
317 symbol_put(pxafb_get_hsync_time); 323 .limit_mask = 0x0b,
318 spitz_pxafb_dev = NULL; 324 .gpio_backlight_cont = SPITZ_GPIO_BACKLIGHT_CONT,
319 get_hsync_invperiod = NULL; 325 .gpio_backlight_on = SPITZ_GPIO_BACKLIGHT_ON,
320} 326 .kick_battery = spitz_bl_kick_battery,
327};
321 328
322static void spitz_wait_hsync(void) 329static void spitz_lcdcon_cs(u32 command)
323{ 330{
324 sharpsl_wait_sync(SPITZ_GPIO_HSYNC); 331 gpio_set_value(SPITZ_GPIO_LCDCON_CS, !(command == PXA2XX_CS_ASSERT));
325} 332}
326 333
327static struct resource spitzts_resources[] = { 334static struct pxa2xx_spi_chip spitz_lcdcon_chip = {
328 [0] = { 335 .cs_control = spitz_lcdcon_cs,
329 .start = SPITZ_IRQ_GPIO_TP_INT,
330 .end = SPITZ_IRQ_GPIO_TP_INT,
331 .flags = IORESOURCE_IRQ,
332 },
333}; 336};
334 337
335static struct corgits_machinfo spitz_ts_machinfo = { 338static void spitz_max1111_cs(u32 command)
336 .get_hsync_invperiod = spitz_get_hsync_invperiod, 339{
337 .put_hsync = spitz_put_hsync, 340 gpio_set_value(SPITZ_GPIO_MAX1111_CS, !(command == PXA2XX_CS_ASSERT));
338 .wait_hsync = spitz_wait_hsync, 341}
342
343static struct pxa2xx_spi_chip spitz_max1111_chip = {
344 .cs_control = spitz_max1111_cs,
339}; 345};
340 346
341static struct platform_device spitzts_device = { 347static struct spi_board_info spitz_spi_devices[] = {
342 .name = "corgi-ts", 348 {
343 .dev = { 349 .modalias = "ads7846",
344 .parent = &spitzssp_device.dev, 350 .max_speed_hz = 1200000,
345 .platform_data = &spitz_ts_machinfo, 351 .bus_num = 2,
352 .chip_select = 0,
353 .platform_data = &spitz_ads7846_info,
354 .controller_data= &spitz_ads7846_chip,
355 .irq = gpio_to_irq(SPITZ_GPIO_TP_INT),
356 }, {
357 .modalias = "corgi-lcd",
358 .max_speed_hz = 50000,
359 .bus_num = 2,
360 .chip_select = 1,
361 .platform_data = &spitz_lcdcon_info,
362 .controller_data= &spitz_lcdcon_chip,
363 }, {
364 .modalias = "max1111",
365 .max_speed_hz = 450000,
366 .bus_num = 2,
367 .chip_select = 2,
368 .controller_data= &spitz_max1111_chip,
346 }, 369 },
347 .id = -1,
348 .num_resources = ARRAY_SIZE(spitzts_resources),
349 .resource = spitzts_resources,
350}; 370};
351 371
372static void __init spitz_init_spi(void)
373{
374 int err;
375
376 err = gpio_request(SPITZ_GPIO_ADS7846_CS, "ADS7846_CS");
377 if (err)
378 return;
379
380 err = gpio_request(SPITZ_GPIO_LCDCON_CS, "LCDCON_CS");
381 if (err)
382 goto err_free_1;
383
384 err = gpio_request(SPITZ_GPIO_MAX1111_CS, "MAX1111_CS");
385 if (err)
386 goto err_free_2;
387
388 if (machine_is_akita()) {
389 spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT;
390 spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON;
391 }
392
393 pxa2xx_set_spi_info(2, &spitz_spi_info);
394 spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices));
395 return;
396
397err_free_2:
398 gpio_free(SPITZ_GPIO_LCDCON_CS);
399err_free_1:
400 gpio_free(SPITZ_GPIO_ADS7846_CS);
401}
402#else
403static inline void spitz_init_spi(void) {}
404#endif
352 405
353/* 406/*
354 * MMC/SD Device 407 * MMC/SD Device
@@ -363,24 +416,35 @@ static int spitz_mci_init(struct device *dev, irq_handler_t spitz_detect_int, vo
363{ 416{
364 int err; 417 int err;
365 418
366 /* setup GPIO for PXA27x MMC controller */ 419 err = gpio_request(SPITZ_GPIO_nSD_DETECT, "nSD_DETECT");
367 pxa_gpio_mode(GPIO32_MMCCLK_MD); 420 if (err)
368 pxa_gpio_mode(GPIO112_MMCCMD_MD); 421 goto err_out;
369 pxa_gpio_mode(GPIO92_MMCDAT0_MD); 422
370 pxa_gpio_mode(GPIO109_MMCDAT1_MD); 423 err = gpio_request(SPITZ_GPIO_nSD_WP, "nSD_WP");
371 pxa_gpio_mode(GPIO110_MMCDAT2_MD); 424 if (err)
372 pxa_gpio_mode(GPIO111_MMCDAT3_MD); 425 goto err_free_1;
373 pxa_gpio_mode(SPITZ_GPIO_nSD_DETECT | GPIO_IN); 426
374 pxa_gpio_mode(SPITZ_GPIO_nSD_WP | GPIO_IN); 427 gpio_direction_input(SPITZ_GPIO_nSD_DETECT);
428 gpio_direction_input(SPITZ_GPIO_nSD_WP);
375 429
376 spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250); 430 spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250);
377 431
378 err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int, 432 err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int,
379 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 433 IRQF_DISABLED | IRQF_TRIGGER_RISING |
434 IRQF_TRIGGER_FALLING,
380 "MMC card detect", data); 435 "MMC card detect", data);
381 if (err) 436 if (err) {
382 printk(KERN_ERR "spitz_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 437 pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n",
438 __func__);
439 goto err_free_2;
440 }
441 return 0;
383 442
443err_free_2:
444 gpio_free(SPITZ_GPIO_nSD_WP);
445err_free_1:
446 gpio_free(SPITZ_GPIO_nSD_DETECT);
447err_out:
384 return err; 448 return err;
385} 449}
386 450
@@ -396,12 +460,14 @@ static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
396 460
397static int spitz_mci_get_ro(struct device *dev) 461static int spitz_mci_get_ro(struct device *dev)
398{ 462{
399 return GPLR(SPITZ_GPIO_nSD_WP) & GPIO_bit(SPITZ_GPIO_nSD_WP); 463 return gpio_get_value(SPITZ_GPIO_nSD_WP);
400} 464}
401 465
402static void spitz_mci_exit(struct device *dev, void *data) 466static void spitz_mci_exit(struct device *dev, void *data)
403{ 467{
404 free_irq(SPITZ_IRQ_GPIO_nSD_DETECT, data); 468 free_irq(SPITZ_IRQ_GPIO_nSD_DETECT, data);
469 gpio_free(SPITZ_GPIO_nSD_WP);
470 gpio_free(SPITZ_GPIO_nSD_DETECT);
405} 471}
406 472
407static struct pxamci_platform_data spitz_mci_platform_data = { 473static struct pxamci_platform_data spitz_mci_platform_data = {
@@ -418,15 +484,18 @@ static struct pxamci_platform_data spitz_mci_platform_data = {
418 */ 484 */
419static int spitz_ohci_init(struct device *dev) 485static int spitz_ohci_init(struct device *dev)
420{ 486{
421 /* Only Port 2 is connected */ 487 int err;
422 pxa_gpio_mode(SPITZ_GPIO_USB_CONNECT | GPIO_IN); 488
423 pxa_gpio_mode(SPITZ_GPIO_USB_HOST | GPIO_OUT); 489 err = gpio_request(SPITZ_GPIO_USB_HOST, "USB_HOST");
424 pxa_gpio_mode(SPITZ_GPIO_USB_DEVICE | GPIO_IN); 490 if (err)
491 return err;
425 492
426 /* Setup USB Port 2 Output Control Register */ 493 /* Only Port 2 is connected
494 * Setup USB Port 2 Output Control Register
495 */
427 UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE; 496 UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
428 497
429 GPSR(SPITZ_GPIO_USB_HOST) = GPIO_bit(SPITZ_GPIO_USB_HOST); 498 gpio_direction_output(SPITZ_GPIO_USB_HOST, 1);
430 499
431 UHCHR = (UHCHR) & 500 UHCHR = (UHCHR) &
432 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); 501 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
@@ -446,29 +515,50 @@ static struct pxaohci_platform_data spitz_ohci_platform_data = {
446/* 515/*
447 * Irda 516 * Irda
448 */ 517 */
518static int spitz_irda_startup(struct device *dev)
519{
520 int rc;
521
522 rc = gpio_request(SPITZ_GPIO_IR_ON, "IrDA on");
523 if (rc)
524 goto err;
525
526 rc = gpio_direction_output(SPITZ_GPIO_IR_ON, 1);
527 if (rc)
528 goto err_dir;
529
530 return 0;
531
532err_dir:
533 gpio_free(SPITZ_GPIO_IR_ON);
534err:
535 return rc;
536}
537
538static void spitz_irda_shutdown(struct device *dev)
539{
540 gpio_free(SPITZ_GPIO_IR_ON);
541}
542
449static void spitz_irda_transceiver_mode(struct device *dev, int mode) 543static void spitz_irda_transceiver_mode(struct device *dev, int mode)
450{ 544{
451 if (mode & IR_OFF) 545 gpio_set_value(SPITZ_GPIO_IR_ON, mode & IR_OFF);
452 set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON);
453 else
454 reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON);
455 pxa2xx_transceiver_mode(dev, mode); 546 pxa2xx_transceiver_mode(dev, mode);
456} 547}
457 548
458#ifdef CONFIG_MACH_AKITA 549#ifdef CONFIG_MACH_AKITA
459static void akita_irda_transceiver_mode(struct device *dev, int mode) 550static void akita_irda_transceiver_mode(struct device *dev, int mode)
460{ 551{
461 if (mode & IR_OFF) 552 gpio_set_value(AKITA_GPIO_IR_ON, mode & IR_OFF);
462 akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_IR_ON);
463 else
464 akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_IR_ON);
465 pxa2xx_transceiver_mode(dev, mode); 553 pxa2xx_transceiver_mode(dev, mode);
466} 554}
467#endif 555#endif
468 556
469static struct pxaficp_platform_data spitz_ficp_platform_data = { 557static struct pxaficp_platform_data spitz_ficp_platform_data = {
470 .transceiver_cap = IR_SIRMODE | IR_OFF, 558 .transceiver_cap = IR_SIRMODE | IR_OFF,
471 .transceiver_mode = spitz_irda_transceiver_mode, 559 .transceiver_mode = spitz_irda_transceiver_mode,
560 .startup = spitz_irda_startup,
561 .shutdown = spitz_irda_shutdown,
472}; 562};
473 563
474 564
@@ -476,14 +566,6 @@ static struct pxaficp_platform_data spitz_ficp_platform_data = {
476 * Spitz PXA Framebuffer 566 * Spitz PXA Framebuffer
477 */ 567 */
478 568
479static void spitz_lcd_power(int on, struct fb_var_screeninfo *var)
480{
481 if (on)
482 corgi_lcdtg_hw_init(var->xres);
483 else
484 corgi_lcdtg_suspend();
485}
486
487static struct pxafb_mode_info spitz_pxafb_modes[] = { 569static struct pxafb_mode_info spitz_pxafb_modes[] = {
488{ 570{
489 .pixclock = 19231, 571 .pixclock = 19231,
@@ -516,18 +598,13 @@ static struct pxafb_mach_info spitz_pxafb_info = {
516 .modes = &spitz_pxafb_modes[0], 598 .modes = &spitz_pxafb_modes[0],
517 .num_modes = 2, 599 .num_modes = 2,
518 .fixed_modes = 1, 600 .fixed_modes = 1,
519 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act | LCCR0_LDDALT | LCCR0_OUC | LCCR0_CMDIM | LCCR0_RDSTM, 601 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_ALTERNATE_MAPPING,
520 .lccr3 = LCCR3_PixRsEdg | LCCR3_OutEnH,
521 .pxafb_lcd_power = spitz_lcd_power,
522}; 602};
523 603
524 604
525static struct platform_device *devices[] __initdata = { 605static struct platform_device *devices[] __initdata = {
526 &spitzscoop_device, 606 &spitzscoop_device,
527 &spitzssp_device,
528 &spitzkbd_device, 607 &spitzkbd_device,
529 &spitzts_device,
530 &spitzbl_device,
531 &spitzled_device, 608 &spitzled_device,
532}; 609};
533 610
@@ -553,56 +630,26 @@ static void __init common_init(void)
553 630
554 PMCR = 0x00; 631 PMCR = 0x00;
555 632
556 /* setup sleep mode values */
557 PWER = 0x00000002;
558 PFER = 0x00000000;
559 PRER = 0x00000002;
560 PGSR0 = 0x0158C000;
561 PGSR1 = 0x00FF0080;
562 PGSR2 = 0x0001C004;
563
564 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ 633 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
565 PCFR |= PCFR_OPDE; 634 PCFR |= PCFR_OPDE;
566 635
567 corgi_ssp_set_machinfo(&spitz_ssp_machinfo); 636 pxa2xx_mfp_config(ARRAY_AND_SIZE(spitz_pin_config));
568 637
569 pxa_gpio_mode(SPITZ_GPIO_HSYNC | GPIO_IN); 638 spitz_init_spi();
570 639
571 platform_add_devices(devices, ARRAY_SIZE(devices)); 640 platform_add_devices(devices, ARRAY_SIZE(devices));
572 pxa_set_mci_info(&spitz_mci_platform_data); 641 pxa_set_mci_info(&spitz_mci_platform_data);
573 pxa_set_ohci_info(&spitz_ohci_platform_data); 642 pxa_set_ohci_info(&spitz_ohci_platform_data);
574 pxa_set_ficp_info(&spitz_ficp_platform_data); 643 pxa_set_ficp_info(&spitz_ficp_platform_data);
575 set_pxa_fb_parent(&spitzssp_device.dev);
576 set_pxa_fb_info(&spitz_pxafb_info); 644 set_pxa_fb_info(&spitz_pxafb_info);
645 pxa_set_i2c_info(NULL);
577} 646}
578 647
579#if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI) 648#if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI)
580static void spitz_bl_set_intensity(int intensity)
581{
582 if (intensity > 0x10)
583 intensity += 0x10;
584
585 /* Bits 0-4 are accessed via the SSP interface */
586 corgi_ssp_blduty_set(intensity & 0x1f);
587
588 /* Bit 5 is via SCOOP */
589 if (intensity & 0x0020)
590 reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT);
591 else
592 set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT);
593
594 if (intensity)
595 set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON);
596 else
597 reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON);
598}
599
600static void __init spitz_init(void) 649static void __init spitz_init(void)
601{ 650{
602 platform_scoop_config = &spitz_pcmcia_config; 651 platform_scoop_config = &spitz_pcmcia_config;
603 652
604 spitz_bl_machinfo.set_bl_intensity = spitz_bl_set_intensity;
605
606 common_init(); 653 common_init();
607 654
608 platform_device_register(&spitzscoop2_device); 655 platform_device_register(&spitzscoop2_device);
@@ -613,32 +660,17 @@ static void __init spitz_init(void)
613/* 660/*
614 * Akita IO Expander 661 * Akita IO Expander
615 */ 662 */
616struct platform_device akitaioexp_device = { 663static struct pca953x_platform_data akita_ioexp = {
617 .name = "akita-ioexp", 664 .gpio_base = AKITA_IOEXP_GPIO_BASE,
618 .id = -1,
619}; 665};
620 666
621EXPORT_SYMBOL_GPL(akitaioexp_device); 667static struct i2c_board_info akita_i2c_board_info[] = {
622 668 {
623static void akita_bl_set_intensity(int intensity) 669 .type = "max7310",
624{ 670 .addr = 0x18,
625 if (intensity > 0x10) 671 .platform_data = &akita_ioexp,
626 intensity += 0x10; 672 },
627 673};
628 /* Bits 0-4 are accessed via the SSP interface */
629 corgi_ssp_blduty_set(intensity & 0x1f);
630
631 /* Bit 5 is via IO-Expander */
632 if (intensity & 0x0020)
633 akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT);
634 else
635 akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT);
636
637 if (intensity)
638 akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON);
639 else
640 akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON);
641}
642 674
643static void __init akita_init(void) 675static void __init akita_init(void)
644{ 676{
@@ -647,11 +679,10 @@ static void __init akita_init(void)
647 /* We just pretend the second element of the array doesn't exist */ 679 /* We just pretend the second element of the array doesn't exist */
648 spitz_pcmcia_config.num_devs = 1; 680 spitz_pcmcia_config.num_devs = 1;
649 platform_scoop_config = &spitz_pcmcia_config; 681 platform_scoop_config = &spitz_pcmcia_config;
650 spitz_bl_machinfo.set_bl_intensity = akita_bl_set_intensity;
651 682
652 platform_device_register(&akitaioexp_device); 683 pxa_set_i2c_info(NULL);
684 i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info));
653 685
654 spitzscoop_device.dev.parent = &akitaioexp_device.dev;
655 common_init(); 686 common_init();
656} 687}
657#endif 688#endif
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 8a40505dfd28..53018db106ac 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -21,7 +21,6 @@
21#include <asm/irq.h> 21#include <asm/irq.h>
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm/hardware/scoop.h>
25 24
26#include <mach/sharpsl.h> 25#include <mach/sharpsl.h>
27#include <mach/spitz.h> 26#include <mach/spitz.h>
@@ -48,44 +47,35 @@ static void spitz_charger_init(void)
48 47
49static void spitz_measure_temp(int on) 48static void spitz_measure_temp(int on)
50{ 49{
51 if (on) 50 gpio_set_value(SPITZ_GPIO_ADC_TEMP_ON, on);
52 set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_ADC_TEMP_ON);
53 else
54 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_ADC_TEMP_ON);
55} 51}
56 52
57static void spitz_charge(int on) 53static void spitz_charge(int on)
58{ 54{
59 if (on) { 55 if (on) {
60 if (sharpsl_pm.flags & SHARPSL_SUSPENDED) { 56 if (sharpsl_pm.flags & SHARPSL_SUSPENDED) {
61 set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_B); 57 gpio_set_value(SPITZ_GPIO_JK_B, 1);
62 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CHRG_ON); 58 gpio_set_value(SPITZ_GPIO_CHRG_ON, 0);
63 } else { 59 } else {
64 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_B); 60 gpio_set_value(SPITZ_GPIO_JK_B, 0);
65 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CHRG_ON); 61 gpio_set_value(SPITZ_GPIO_CHRG_ON, 0);
66 } 62 }
67 } else { 63 } else {
68 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_B); 64 gpio_set_value(SPITZ_GPIO_JK_B, 0);
69 set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CHRG_ON); 65 gpio_set_value(SPITZ_GPIO_CHRG_ON, 1);
70 } 66 }
71} 67}
72 68
73static void spitz_discharge(int on) 69static void spitz_discharge(int on)
74{ 70{
75 if (on) 71 gpio_set_value(SPITZ_GPIO_JK_A, on);
76 set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_A);
77 else
78 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_A);
79} 72}
80 73
81/* HACK - For unknown reasons, accurate voltage readings are only made with a load 74/* HACK - For unknown reasons, accurate voltage readings are only made with a load
82 on the power bus which the green led on spitz provides */ 75 on the power bus which the green led on spitz provides */
83static void spitz_discharge1(int on) 76static void spitz_discharge1(int on)
84{ 77{
85 if (on) 78 gpio_set_value(SPITZ_GPIO_LED_GREEN, on);
86 set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_LED_GREEN);
87 else
88 reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_LED_GREEN);
89} 79}
90 80
91static void spitz_presuspend(void) 81static void spitz_presuspend(void)
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 3ed757e6bcc8..75ff8f4243f1 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -22,8 +22,8 @@
22#include <linux/fb.h> 22#include <linux/fb.h>
23#include <linux/ioport.h> 23#include <linux/ioport.h>
24#include <linux/delay.h> 24#include <linux/delay.h>
25#include <linux/serial_8250.h> 25#include <linux/gpio.h>
26#include <linux/mtd/mtd.h> 26#include <linux/dm9000.h>
27#include <linux/mtd/physmap.h> 27#include <linux/mtd/physmap.h>
28#include <linux/mtd/partitions.h> 28#include <linux/mtd/partitions.h>
29 29
@@ -31,7 +31,6 @@
31#include <asm/setup.h> 31#include <asm/setup.h>
32#include <asm/memory.h> 32#include <asm/memory.h>
33#include <asm/mach-types.h> 33#include <asm/mach-types.h>
34#include <mach/hardware.h>
35#include <asm/irq.h> 34#include <asm/irq.h>
36#include <asm/sizes.h> 35#include <asm/sizes.h>
37 36
@@ -40,41 +39,148 @@
40#include <asm/mach/irq.h> 39#include <asm/mach/irq.h>
41#include <asm/mach/flash.h> 40#include <asm/mach/flash.h>
42 41
42#include <mach/hardware.h>
43#include <mach/pxa-regs.h> 43#include <mach/pxa-regs.h>
44#include <mach/pxa2xx-regs.h> 44#include <mach/pxa2xx-regs.h>
45#include <mach/pxa2xx-gpio.h> 45#include <mach/mfp-pxa27x.h>
46#include <mach/pxa2xx_spi.h>
46#include <mach/trizeps4.h> 47#include <mach/trizeps4.h>
47#include <mach/audio.h> 48#include <mach/audio.h>
48#include <mach/pxafb.h> 49#include <mach/pxafb.h>
49#include <mach/mmc.h> 50#include <mach/mmc.h>
50#include <mach/irda.h> 51#include <mach/irda.h>
51#include <mach/ohci.h> 52#include <mach/ohci.h>
53#include <mach/i2c.h>
52 54
53#include "generic.h" 55#include "generic.h"
54#include "devices.h" 56#include "devices.h"
55 57
56/******************************************************************************************** 58/* comment out the following line if you want to use the
59 * Standard UART from PXA for serial / irda transmission
60 * and acivate it if you have status leds connected */
61#define STATUS_LEDS_ON_STUART_PINS 1
62
63/*****************************************************************************
64 * MultiFunctionPins of CPU
65 *****************************************************************************/
66static unsigned long trizeps4_pin_config[] __initdata = {
67 /* Chip Selects */
68 GPIO15_nCS_1, /* DiskOnChip CS */
69 GPIO93_GPIO, /* TRIZEPS4_DOC_IRQ */
70 GPIO94_GPIO, /* DOC lock */
71
72 GPIO78_nCS_2, /* DM9000 CS */
73 GPIO101_GPIO, /* TRIZEPS4_ETH_IRQ */
74
75 GPIO79_nCS_3, /* Logic CS */
76 GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* Logic irq */
77
78 /* LCD - 16bpp Active TFT */
79 GPIO58_LCD_LDD_0,
80 GPIO59_LCD_LDD_1,
81 GPIO60_LCD_LDD_2,
82 GPIO61_LCD_LDD_3,
83 GPIO62_LCD_LDD_4,
84 GPIO63_LCD_LDD_5,
85 GPIO64_LCD_LDD_6,
86 GPIO65_LCD_LDD_7,
87 GPIO66_LCD_LDD_8,
88 GPIO67_LCD_LDD_9,
89 GPIO68_LCD_LDD_10,
90 GPIO69_LCD_LDD_11,
91 GPIO70_LCD_LDD_12,
92 GPIO71_LCD_LDD_13,
93 GPIO72_LCD_LDD_14,
94 GPIO73_LCD_LDD_15,
95 GPIO74_LCD_FCLK,
96 GPIO75_LCD_LCLK,
97 GPIO76_LCD_PCLK,
98 GPIO77_LCD_BIAS,
99
100 /* UART */
101 GPIO9_FFUART_CTS,
102 GPIO10_FFUART_DCD,
103 GPIO16_FFUART_TXD,
104 GPIO33_FFUART_DSR,
105 GPIO38_FFUART_RI,
106 GPIO82_FFUART_DTR,
107 GPIO83_FFUART_RTS,
108 GPIO96_FFUART_RXD,
109
110 GPIO42_BTUART_RXD,
111 GPIO43_BTUART_TXD,
112 GPIO44_BTUART_CTS,
113 GPIO45_BTUART_RTS,
114#ifdef STATUS_LEDS_ON_STUART_PINS
115 GPIO46_GPIO,
116 GPIO47_GPIO,
117#else
118 GPIO46_STUART_RXD,
119 GPIO47_STUART_TXD,
120#endif
121 /* PCMCIA */
122 GPIO11_GPIO, /* TRIZEPS4_CD_IRQ */
123 GPIO13_GPIO, /* TRIZEPS4_READY_NINT */
124 GPIO48_nPOE,
125 GPIO49_nPWE,
126 GPIO50_nPIOR,
127 GPIO51_nPIOW,
128 GPIO54_nPCE_2,
129 GPIO55_nPREG,
130 GPIO56_nPWAIT,
131 GPIO57_nIOIS16,
132 GPIO102_nPCE_1,
133 GPIO104_PSKTSEL,
134
135 /* MultiMediaCard */
136 GPIO32_MMC_CLK,
137 GPIO92_MMC_DAT_0,
138 GPIO109_MMC_DAT_1,
139 GPIO110_MMC_DAT_2,
140 GPIO111_MMC_DAT_3,
141 GPIO112_MMC_CMD,
142 GPIO12_GPIO, /* TRIZEPS4_MMC_IRQ */
143
144 /* USB OHCI */
145 GPIO88_USBH1_PWR, /* USBHPWR1 */
146 GPIO89_USBH1_PEN, /* USBHPEN1 */
147
148 /* I2C */
149 GPIO117_I2C_SCL,
150 GPIO118_I2C_SDA,
151};
152
153static unsigned long trizeps4wl_pin_config[] __initdata = {
154 /* SSP 2 */
155 GPIO14_SSP2_SFRM,
156 GPIO19_SSP2_SCLK,
157 GPIO53_GPIO, /* TRIZEPS4_SPI_IRQ */
158 GPIO86_SSP2_RXD,
159 GPIO87_SSP2_TXD,
160};
161
162/****************************************************************************
57 * ONBOARD FLASH 163 * ONBOARD FLASH
58 ********************************************************************************************/ 164 ****************************************************************************/
59static struct mtd_partition trizeps4_partitions[] = { 165static struct mtd_partition trizeps4_partitions[] = {
60 { 166 {
61 .name = "Bootloader", 167 .name = "Bootloader",
62 .offset = 0x00000000, 168 .offset = 0x00000000,
63 .size = 0x00040000, 169 .size = 0x00040000,
64 .mask_flags = MTD_WRITEABLE /* force read-only */ 170 .mask_flags = MTD_WRITEABLE /* force read-only */
65 },{ 171 }, {
66 .name = "Backup", 172 .name = "Backup",
67 .offset = 0x00040000, 173 .offset = 0x00040000,
68 .size = 0x00040000, 174 .size = 0x00040000,
69 },{ 175 }, {
70 .name = "Image", 176 .name = "Image",
71 .offset = 0x00080000, 177 .offset = 0x00080000,
72 .size = 0x01080000, 178 .size = 0x01080000,
73 },{ 179 }, {
74 .name = "IPSM", 180 .name = "IPSM",
75 .offset = 0x01100000, 181 .offset = 0x01100000,
76 .size = 0x00e00000, 182 .size = 0x00e00000,
77 },{ 183 }, {
78 .name = "Registry", 184 .name = "Registry",
79 .offset = 0x01f00000, 185 .offset = 0x01f00000,
80 .size = MTDPART_SIZ_FULL, 186 .size = MTDPART_SIZ_FULL,
@@ -105,9 +211,9 @@ static struct platform_device flash_device = {
105 .num_resources = 1, 211 .num_resources = 1,
106}; 212};
107 213
108/******************************************************************************************** 214/****************************************************************************
109 * DAVICOM DM9000 Ethernet 215 * DAVICOM DM9000 Ethernet
110 ********************************************************************************************/ 216 ****************************************************************************/
111static struct resource dm9000_resources[] = { 217static struct resource dm9000_resources[] = {
112 [0] = { 218 [0] = {
113 .start = TRIZEPS4_ETH_PHYS+0x300, 219 .start = TRIZEPS4_ETH_PHYS+0x300,
@@ -122,67 +228,68 @@ static struct resource dm9000_resources[] = {
122 [2] = { 228 [2] = {
123 .start = TRIZEPS4_ETH_IRQ, 229 .start = TRIZEPS4_ETH_IRQ,
124 .end = TRIZEPS4_ETH_IRQ, 230 .end = TRIZEPS4_ETH_IRQ,
125 .flags = (IORESOURCE_IRQ | IRQ_TYPE_EDGE_RISING), 231 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
126 }, 232 },
127}; 233};
128 234
235static struct dm9000_plat_data tri_dm9000_platdata = {
236 .flags = DM9000_PLATF_32BITONLY,
237};
238
129static struct platform_device dm9000_device = { 239static struct platform_device dm9000_device = {
130 .name = "dm9000", 240 .name = "dm9000",
131 .id = -1, 241 .id = -1,
132 .num_resources = ARRAY_SIZE(dm9000_resources), 242 .num_resources = ARRAY_SIZE(dm9000_resources),
133 .resource = dm9000_resources, 243 .resource = dm9000_resources,
244 .dev = {
245 .platform_data = &tri_dm9000_platdata,
246 }
134}; 247};
135 248
136/******************************************************************************************** 249/****************************************************************************
137 * PXA270 serial ports 250 * LED's on GPIO pins of PXA
138 ********************************************************************************************/ 251 ****************************************************************************/
139static struct plat_serial8250_port tri_serial_ports[] = { 252static struct gpio_led trizeps4_led[] = {
140#ifdef CONFIG_SERIAL_PXA 253#ifdef STATUS_LEDS_ON_STUART_PINS
141 /* this uses the own PXA driver */
142 { 254 {
143 0, 255 .name = "led0:orange:heartbeat", /* */
144 }, 256 .default_trigger = "heartbeat",
145#else 257 .gpio = GPIO_HEARTBEAT_LED,
146 /* this uses the generic 8520 driver */ 258 .active_low = 1,
147 [0] = {
148 .membase = (void *)&FFUART,
149 .irq = IRQ_FFUART,
150 .flags = UPF_BOOT_AUTOCONF,
151 .iotype = UPIO_MEM32,
152 .regshift = 2,
153 .uartclk = (921600*16),
154 },
155 [1] = {
156 .membase = (void *)&BTUART,
157 .irq = IRQ_BTUART,
158 .flags = UPF_BOOT_AUTOCONF,
159 .iotype = UPIO_MEM32,
160 .regshift = 2,
161 .uartclk = (921600*16),
162 }, 259 },
163 { 260 {
164 0, 261 .name = "led1:yellow:cpubusy", /* */
262 .default_trigger = "cpu-busy",
263 .gpio = GPIO_SYS_BUSY_LED,
264 .active_low = 1,
165 }, 265 },
166#endif 266#endif
167}; 267};
168 268
169static struct platform_device uart_devices = { 269static struct gpio_led_platform_data trizeps4_led_data = {
170 .name = "serial8250", 270 .leds = trizeps4_led,
171 .id = 0, 271 .num_leds = ARRAY_SIZE(trizeps4_led),
272};
273
274static struct platform_device leds_devices = {
275 .name = "leds-gpio",
276 .id = -1,
172 .dev = { 277 .dev = {
173 .platform_data = tri_serial_ports, 278 .platform_data = &trizeps4_led_data,
174 }, 279 },
175 .num_resources = 0,
176 .resource = NULL,
177}; 280};
178 281
179static struct platform_device * trizeps4_devices[] __initdata = { 282static struct platform_device *trizeps4_devices[] __initdata = {
180 &flash_device, 283 &flash_device,
181 &uart_devices,
182 &dm9000_device, 284 &dm9000_device,
285 &leds_devices,
286};
287
288static struct platform_device *trizeps4wl_devices[] __initdata = {
289 &flash_device,
290 &leds_devices,
183}; 291};
184 292
185#ifdef CONFIG_MACH_TRIZEPS4_CONXS
186static short trizeps_conxs_bcr; 293static short trizeps_conxs_bcr;
187 294
188/* PCCARD power switching supports only 3,3V */ 295/* PCCARD power switching supports only 3,3V */
@@ -192,108 +299,63 @@ void board_pcmcia_power(int power)
192 /* switch power on, put in reset and enable buffers */ 299 /* switch power on, put in reset and enable buffers */
193 trizeps_conxs_bcr |= power; 300 trizeps_conxs_bcr |= power;
194 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; 301 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
195 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN); 302 trizeps_conxs_bcr &= ~ConXS_BCR_CF_BUF_EN;
196 ConXS_BCR = trizeps_conxs_bcr; 303 BCR_writew(trizeps_conxs_bcr);
197 /* wait a little */ 304 /* wait a little */
198 udelay(2000); 305 udelay(2000);
199 /* take reset away */ 306 /* take reset away */
200 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET); 307 trizeps_conxs_bcr &= ~ConXS_BCR_CF_RESET;
201 ConXS_BCR = trizeps_conxs_bcr; 308 BCR_writew(trizeps_conxs_bcr);
202 udelay(2000); 309 udelay(2000);
203 } else { 310 } else {
204 /* put in reset */ 311 /* put in reset */
205 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET; 312 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
206 ConXS_BCR = trizeps_conxs_bcr; 313 BCR_writew(trizeps_conxs_bcr);
207 udelay(1000); 314 udelay(1000);
208 /* switch power off */ 315 /* switch power off */
209 trizeps_conxs_bcr &= ~(0xf); 316 trizeps_conxs_bcr &= ~0xf;
210 ConXS_BCR = trizeps_conxs_bcr; 317 BCR_writew(trizeps_conxs_bcr);
211
212 } 318 }
213 pr_debug("%s: o%s 0x%x\n", __func__, power ? "n": "ff", trizeps_conxs_bcr); 319 pr_debug("%s: o%s 0x%x\n", __func__, power ? "n" : "ff",
320 trizeps_conxs_bcr);
214} 321}
322EXPORT_SYMBOL(board_pcmcia_power);
215 323
216/* backlight power switching for LCD panel */ 324/* backlight power switching for LCD panel */
217static void board_backlight_power(int on) 325static void board_backlight_power(int on)
218{ 326{
219 if (on) { 327 if (on)
220 trizeps_conxs_bcr |= ConXS_BCR_L_DISP; 328 trizeps_conxs_bcr |= ConXS_BCR_L_DISP;
221 } else { 329 else
222 trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP; 330 trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP;
223 }
224 pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff", trizeps_conxs_bcr);
225 ConXS_BCR = trizeps_conxs_bcr;
226}
227 331
228/* Powersupply for MMC/SD cardslot */ 332 pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff",
229static void board_mci_power(struct device *dev, unsigned int vdd) 333 trizeps_conxs_bcr);
230{ 334 BCR_writew(trizeps_conxs_bcr);
231 struct pxamci_platform_data* p_d = dev->platform_data;
232
233 if (( 1 << vdd) & p_d->ocr_mask) {
234 pr_debug("%s: on\n", __func__);
235 /* FIXME fill in values here */
236 } else {
237 pr_debug("%s: off\n", __func__);
238 /* FIXME fill in values here */
239 }
240} 335}
241 336
242static short trizeps_conxs_ircr; 337/* a I2C based RTC is known on CONXS board */
243 338static struct i2c_board_info trizeps4_i2c_devices[] __initdata = {
244/* Switch modes and Power for IRDA receiver */ 339 { I2C_BOARD_INFO("rtc-pcf8593", 0x51) }
245static void board_irda_mode(struct device *dev, int mode) 340};
246{
247 unsigned long flags;
248
249 local_irq_save(flags);
250 if (mode & IR_SIRMODE) {
251 /* Slow mode */
252 trizeps_conxs_ircr &= ~ConXS_IRCR_MODE;
253 } else if (mode & IR_FIRMODE) {
254 /* Fast mode */
255 trizeps_conxs_ircr |= ConXS_IRCR_MODE;
256 }
257 pxa2xx_transceiver_mode(dev, mode);
258 if (mode & IR_OFF) {
259 trizeps_conxs_ircr |= ConXS_IRCR_SD;
260 } else {
261 trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
262 }
263 /* FIXME write values to register */
264 local_irq_restore(flags);
265}
266
267#else
268/* for other baseboards define dummies */
269void board_pcmcia_power(int power) {;}
270#define board_backlight_power NULL
271#define board_mci_power NULL
272#define board_irda_mode NULL
273
274#endif /* CONFIG_MACH_TRIZEPS4_CONXS */
275EXPORT_SYMBOL(board_pcmcia_power);
276 341
277static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, void *data) 342/****************************************************************************
343 * MMC card slot external to module
344 ****************************************************************************/
345static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int,
346 void *data)
278{ 347{
279 int err; 348 int err;
280 /* setup GPIO for PXA27x MMC controller */
281 pxa_gpio_mode(GPIO32_MMCCLK_MD);
282 pxa_gpio_mode(GPIO112_MMCCMD_MD);
283 pxa_gpio_mode(GPIO92_MMCDAT0_MD);
284 pxa_gpio_mode(GPIO109_MMCDAT1_MD);
285 pxa_gpio_mode(GPIO110_MMCDAT2_MD);
286 pxa_gpio_mode(GPIO111_MMCDAT3_MD);
287
288 pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
289 349
290 err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int, 350 err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int,
291 IRQF_DISABLED | IRQF_TRIGGER_RISING, 351 IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_SAMPLE_RANDOM,
292 "MMC card detect", data); 352 "MMC card detect", data);
293 if (err) 353 if (err) {
294 printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 354 printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request"
295 355 "MMC card detect IRQ\n");
296 return err; 356 return -1;
357 }
358 return 0;
297} 359}
298 360
299static void trizeps4_mci_exit(struct device *dev, void *data) 361static void trizeps4_mci_exit(struct device *dev, void *data)
@@ -303,22 +365,68 @@ static void trizeps4_mci_exit(struct device *dev, void *data)
303 365
304static struct pxamci_platform_data trizeps4_mci_platform_data = { 366static struct pxamci_platform_data trizeps4_mci_platform_data = {
305 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 367 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
368 .detect_delay = 1,
306 .init = trizeps4_mci_init, 369 .init = trizeps4_mci_init,
307 .exit = trizeps4_mci_exit, 370 .exit = trizeps4_mci_exit,
308 .setpower = board_mci_power, 371 .get_ro = NULL, /* write-protection not supported */
372 .setpower = NULL, /* power-switching not supported */
309}; 373};
310 374
375/****************************************************************************
376 * IRDA mode switching on stuart
377 ****************************************************************************/
378#ifndef STATUS_LEDS_ON_STUART_PINS
379static short trizeps_conxs_ircr;
380
381static int trizeps4_irda_startup(struct device *dev)
382{
383 trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
384 IRCR_writew(trizeps_conxs_ircr);
385 return 0;
386}
387
388static void trizeps4_irda_shutdown(struct device *dev)
389{
390 trizeps_conxs_ircr |= ConXS_IRCR_SD;
391 IRCR_writew(trizeps_conxs_ircr);
392}
393
394static void trizeps4_irda_transceiver_mode(struct device *dev, int mode)
395{
396 unsigned long flags;
397
398 local_irq_save(flags);
399 /* Switch mode */
400 if (mode & IR_SIRMODE)
401 trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; /* Slow mode */
402 else if (mode & IR_FIRMODE) {
403 trizeps_conxs_ircr |= ConXS_IRCR_MODE; /* Fast mode */
404
405 /* Switch power */
406 if (mode & IR_OFF)
407 trizeps_conxs_ircr |= ConXS_IRCR_SD;
408 else
409 trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
410
411 IRCR_writew(trizeps_conxs_ircr);
412 local_irq_restore(flags);
413
414 pxa2xx_transceiver_mode(dev, mode);
415}
416
311static struct pxaficp_platform_data trizeps4_ficp_platform_data = { 417static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
312 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, 418 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
313 .transceiver_mode = board_irda_mode, 419 .transceiver_mode = trizeps4_irda_transceiver_mode,
420 .startup = trizeps4_irda_startup,
421 .shutdown = trizeps4_irda_shutdown,
314}; 422};
423#endif
315 424
425/****************************************************************************
426 * OHCI USB port
427 ****************************************************************************/
316static int trizeps4_ohci_init(struct device *dev) 428static int trizeps4_ohci_init(struct device *dev)
317{ 429{
318 /* setup Port1 GPIO pin. */
319 pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
320 pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
321
322 /* Set the Power Control Polarity Low and Power Sense 430 /* Set the Power Control Polarity Low and Power Sense
323 Polarity Low to active low. */ 431 Polarity Low to active low. */
324 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) & 432 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
@@ -327,15 +435,9 @@ static int trizeps4_ohci_init(struct device *dev)
327 return 0; 435 return 0;
328} 436}
329 437
330static void trizeps4_ohci_exit(struct device *dev)
331{
332 ;
333}
334
335static struct pxaohci_platform_data trizeps4_ohci_platform_data = { 438static struct pxaohci_platform_data trizeps4_ohci_platform_data = {
336 .port_mode = PMM_PERPORT_MODE, 439 .port_mode = PMM_PERPORT_MODE,
337 .init = trizeps4_ohci_init, 440 .init = trizeps4_ohci_init,
338 .exit = trizeps4_ohci_exit,
339}; 441};
340 442
341static struct map_desc trizeps4_io_desc[] __initdata = { 443static struct map_desc trizeps4_io_desc[] __initdata = {
@@ -372,105 +474,80 @@ static struct map_desc trizeps4_io_desc[] __initdata = {
372}; 474};
373 475
374static struct pxafb_mode_info sharp_lcd_mode = { 476static struct pxafb_mode_info sharp_lcd_mode = {
375 .pixclock = 78000, 477 .pixclock = 78000,
376 .xres = 640, 478 .xres = 640,
377 .yres = 480, 479 .yres = 480,
378 .bpp = 8, 480 .bpp = 8,
379 .hsync_len = 4, 481 .hsync_len = 4,
380 .left_margin = 4, 482 .left_margin = 4,
381 .right_margin = 4, 483 .right_margin = 4,
382 .vsync_len = 2, 484 .vsync_len = 2,
383 .upper_margin = 0, 485 .upper_margin = 0,
384 .lower_margin = 0, 486 .lower_margin = 0,
385 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 487 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
386 .cmap_greyscale = 0, 488 .cmap_greyscale = 0,
387}; 489};
388 490
389static struct pxafb_mach_info sharp_lcd = { 491static struct pxafb_mach_info sharp_lcd = {
390 .modes = &sharp_lcd_mode, 492 .modes = &sharp_lcd_mode,
391 .num_modes = 1, 493 .num_modes = 1,
392 .cmap_inverse = 0, 494 .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL,
393 .cmap_static = 0, 495 .cmap_inverse = 0,
394 .lccr0 = LCCR0_Color | LCCR0_Pas | LCCR0_Dual, 496 .cmap_static = 0,
395 .lccr3 = 0x0340ff02, 497 .pxafb_backlight_power = board_backlight_power,
396 .pxafb_backlight_power = board_backlight_power,
397}; 498};
398 499
399static struct pxafb_mode_info toshiba_lcd_mode = { 500static struct pxafb_mode_info toshiba_lcd_mode = {
400 .pixclock = 39720, 501 .pixclock = 39720,
401 .xres = 640, 502 .xres = 640,
402 .yres = 480, 503 .yres = 480,
403 .bpp = 8, 504 .bpp = 8,
404 .hsync_len = 63, 505 .hsync_len = 63,
405 .left_margin = 12, 506 .left_margin = 12,
406 .right_margin = 12, 507 .right_margin = 12,
407 .vsync_len = 4, 508 .vsync_len = 4,
408 .upper_margin = 32, 509 .upper_margin = 32,
409 .lower_margin = 10, 510 .lower_margin = 10,
410 .sync = 0, 511 .sync = 0,
411 .cmap_greyscale = 0, 512 .cmap_greyscale = 0,
412}; 513};
413 514
414static struct pxafb_mach_info toshiba_lcd = { 515static struct pxafb_mach_info toshiba_lcd = {
415 .modes = &toshiba_lcd_mode, 516 .modes = &toshiba_lcd_mode,
416 .num_modes = 1, 517 .num_modes = 1,
417 .cmap_inverse = 0, 518 .lcd_conn = (LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL),
418 .cmap_static = 0, 519 .cmap_inverse = 0,
419 .lccr0 = LCCR0_Color | LCCR0_Act, 520 .cmap_static = 0,
420 .lccr3 = 0x03400002, 521 .pxafb_backlight_power = board_backlight_power,
421 .pxafb_backlight_power = board_backlight_power,
422}; 522};
423 523
424static void __init trizeps4_init(void) 524static void __init trizeps4_init(void)
425{ 525{
426 platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices)); 526 pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4_pin_config));
527 if (machine_is_trizeps4wl()) {
528 pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4wl_pin_config));
529 platform_add_devices(trizeps4wl_devices,
530 ARRAY_SIZE(trizeps4wl_devices));
531 } else {
532 platform_add_devices(trizeps4_devices,
533 ARRAY_SIZE(trizeps4_devices));
534 }
427 535
428/* set_pxa_fb_info(&sharp_lcd); */ 536 if (0) /* dont know how to determine LCD */
429 set_pxa_fb_info(&toshiba_lcd); 537 set_pxa_fb_info(&sharp_lcd);
538 else
539 set_pxa_fb_info(&toshiba_lcd);
430 540
431 pxa_set_mci_info(&trizeps4_mci_platform_data); 541 pxa_set_mci_info(&trizeps4_mci_platform_data);
542#ifndef STATUS_LEDS_ON_STUART_PINS
432 pxa_set_ficp_info(&trizeps4_ficp_platform_data); 543 pxa_set_ficp_info(&trizeps4_ficp_platform_data);
544#endif
433 pxa_set_ohci_info(&trizeps4_ohci_platform_data); 545 pxa_set_ohci_info(&trizeps4_ohci_platform_data);
434 pxa_set_ac97_info(NULL); 546 pxa_set_ac97_info(NULL);
435} 547 pxa_set_i2c_info(NULL);
548 i2c_register_board_info(0, trizeps4_i2c_devices,
549 ARRAY_SIZE(trizeps4_i2c_devices));
436 550
437static void __init trizeps4_map_io(void)
438{
439 pxa_map_io();
440 iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
441
442 /* for DiskOnChip */
443 pxa_gpio_mode(GPIO15_nCS_1_MD);
444
445 /* for off-module PIC on ConXS board */
446 pxa_gpio_mode(GPIO_PIC | GPIO_IN);
447
448 /* UCB1400 irq */
449 pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN);
450
451 /* for DM9000 LAN */
452 pxa_gpio_mode(GPIO78_nCS_2_MD);
453 pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
454
455 /* for PCMCIA device */
456 pxa_gpio_mode(GPIO_PCD | GPIO_IN);
457 pxa_gpio_mode(GPIO_PRDY | GPIO_IN);
458
459 /* for I2C adapter */
460 pxa_gpio_mode(GPIO117_I2CSCL_MD);
461 pxa_gpio_mode(GPIO118_I2CSDA_MD);
462
463 /* MMC_DET s.o. */
464 pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
465
466 /* whats that for ??? */
467 pxa_gpio_mode(GPIO79_nCS_3_MD);
468
469#ifdef CONFIG_LEDS
470 pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
471 pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
472#endif
473#ifdef CONFIG_MACH_TRIZEPS4_CONXS
474#ifdef CONFIG_IDE_PXA_CF 551#ifdef CONFIG_IDE_PXA_CF
475 /* if boot direct from compact flash dont disable power */ 552 /* if boot direct from compact flash dont disable power */
476 trizeps_conxs_bcr = 0x0009; 553 trizeps_conxs_bcr = 0x0009;
@@ -478,18 +555,24 @@ static void __init trizeps4_map_io(void)
478 /* this is the reset value */ 555 /* this is the reset value */
479 trizeps_conxs_bcr = 0x00A0; 556 trizeps_conxs_bcr = 0x00A0;
480#endif 557#endif
481 ConXS_BCR = trizeps_conxs_bcr; 558 BCR_writew(trizeps_conxs_bcr);
482#endif 559 board_backlight_power(1);
560}
483 561
484#warning FIXME - accessing PM registers directly is deprecated 562static void __init trizeps4_map_io(void)
485 PWER = 0x00000002; 563{
486 PFER = 0x00000000; 564 pxa_map_io();
487 PRER = 0x00000002; 565 iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
488 PGSR0 = 0x0158C000; 566
489 PGSR1 = 0x00FF0080; 567 if ((MSC0 & 0x8) && (BOOT_DEF & 0x1)) {
490 PGSR2 = 0x0001C004; 568 /* if flash is 16 bit wide its a Trizeps4 WL */
491 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ 569 __machine_arch_type = MACH_TYPE_TRIZEPS4WL;
492 PCFR |= PCFR_OPDE; 570 trizeps4_flash_data[0].width = 2;
571 } else {
572 /* if flash is 32 bit wide its a Trizeps4 */
573 __machine_arch_type = MACH_TYPE_TRIZEPS4;
574 trizeps4_flash_data[0].width = 4;
575 }
493} 576}
494 577
495MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") 578MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
@@ -503,3 +586,13 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
503 .timer = &pxa_timer, 586 .timer = &pxa_timer,
504MACHINE_END 587MACHINE_END
505 588
589MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
590 /* MAINTAINER("Jürgen Schindele") */
591 .phys_io = 0x40000000,
592 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
593 .boot_params = TRIZEPS4_SDRAM_BASE + 0x100,
594 .init_machine = trizeps4_init,
595 .map_io = trizeps4_map_io,
596 .init_irq = pxa27x_init_irq,
597 .timer = &pxa_timer,
598MACHINE_END
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
new file mode 100644
index 000000000000..d7632f63603c
--- /dev/null
+++ b/arch/arm/mach-pxa/viper.c
@@ -0,0 +1,951 @@
1/*
2 * linux/arch/arm/mach-pxa/viper.c
3 *
4 * Support for the Arcom VIPER SBC.
5 *
6 * Author: Ian Campbell
7 * Created: Feb 03, 2003
8 * Copyright: Arcom Control Systems
9 *
10 * Maintained by Marc Zyngier <maz@misterjones.org>
11 * <marc.zyngier@altran.com>
12 *
13 * Based on lubbock.c:
14 * Author: Nicolas Pitre
15 * Created: Jun 15, 2001
16 * Copyright: MontaVista Software Inc.
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23#include <linux/types.h>
24#include <linux/memory.h>
25#include <linux/cpu.h>
26#include <linux/cpufreq.h>
27#include <linux/delay.h>
28#include <linux/fs.h>
29#include <linux/init.h>
30#include <linux/interrupt.h>
31#include <linux/major.h>
32#include <linux/module.h>
33#include <linux/pm.h>
34#include <linux/sched.h>
35#include <linux/gpio.h>
36#include <linux/i2c-gpio.h>
37#include <linux/serial_8250.h>
38#include <linux/smc91x.h>
39#include <linux/pwm_backlight.h>
40#include <linux/usb/isp116x.h>
41#include <linux/mtd/mtd.h>
42#include <linux/mtd/partitions.h>
43#include <linux/mtd/physmap.h>
44
45#include <mach/pxa-regs.h>
46#include <mach/pxa2xx-regs.h>
47#include <mach/bitfield.h>
48#include <mach/audio.h>
49#include <mach/pxafb.h>
50#include <mach/mfp-pxa25x.h>
51#include <mach/i2c.h>
52#include <mach/viper.h>
53
54#include <asm/setup.h>
55#include <asm/mach-types.h>
56#include <asm/irq.h>
57#include <asm/sizes.h>
58
59#include <asm/mach/arch.h>
60#include <asm/mach/map.h>
61#include <asm/mach/irq.h>
62
63#include "generic.h"
64#include "devices.h"
65
66static unsigned int icr;
67
68static void viper_icr_set_bit(unsigned int bit)
69{
70 icr |= bit;
71 VIPER_ICR = icr;
72}
73
74static void viper_icr_clear_bit(unsigned int bit)
75{
76 icr &= ~bit;
77 VIPER_ICR = icr;
78}
79
80/* This function is used from the pcmcia module to reset the CF */
81void viper_cf_rst(int state)
82{
83 if (state)
84 viper_icr_set_bit(VIPER_ICR_CF_RST);
85 else
86 viper_icr_clear_bit(VIPER_ICR_CF_RST);
87}
88EXPORT_SYMBOL(viper_cf_rst);
89
90/*
91 * The CPLD version register was not present on VIPER boards prior to
92 * v2i1. On v1 boards where the version register is not present we
93 * will just read back the previous value from the databus.
94 *
95 * Therefore we do two reads. The first time we write 0 to the
96 * (read-only) register before reading and the second time we write
97 * 0xff first. If the two reads do not match or they read back as 0xff
98 * or 0x00 then we have version 1 hardware.
99 */
100static u8 viper_hw_version(void)
101{
102 u8 v1, v2;
103 unsigned long flags;
104
105 local_irq_save(flags);
106
107 VIPER_VERSION = 0;
108 v1 = VIPER_VERSION;
109 VIPER_VERSION = 0xff;
110 v2 = VIPER_VERSION;
111
112 v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
113
114 local_irq_restore(flags);
115 return v1;
116}
117
118/* CPU sysdev */
119static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state)
120{
121 viper_icr_set_bit(VIPER_ICR_R_DIS);
122 return 0;
123}
124
125static int viper_cpu_resume(struct sys_device *sysdev)
126{
127 viper_icr_clear_bit(VIPER_ICR_R_DIS);
128 return 0;
129}
130
131static struct sysdev_driver viper_cpu_sysdev_driver = {
132 .suspend = viper_cpu_suspend,
133 .resume = viper_cpu_resume,
134};
135
136static unsigned int current_voltage_divisor;
137
138/*
139 * If force is not true then step from existing to new divisor. If
140 * force is true then jump straight to the new divisor. Stepping is
141 * used because if the jump in voltage is too large, the VCC can dip
142 * too low and the regulator cuts out.
143 *
144 * force can be used to initialize the divisor to a know state by
145 * setting the value for the current clock speed, since we are already
146 * running at that speed we know the voltage should be pretty close so
147 * the jump won't be too large
148 */
149static void viper_set_core_cpu_voltage(unsigned long khz, int force)
150{
151 int i = 0;
152 unsigned int divisor = 0;
153 const char *v;
154
155 if (khz < 200000) {
156 v = "1.0"; divisor = 0xfff;
157 } else if (khz < 300000) {
158 v = "1.1"; divisor = 0xde5;
159 } else {
160 v = "1.3"; divisor = 0x325;
161 }
162
163 pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
164 v, (int)khz / 1000, (int)khz % 1000);
165
166#define STEP 0x100
167 do {
168 int step;
169
170 if (force)
171 step = divisor;
172 else if (current_voltage_divisor < divisor - STEP)
173 step = current_voltage_divisor + STEP;
174 else if (current_voltage_divisor > divisor + STEP)
175 step = current_voltage_divisor - STEP;
176 else
177 step = divisor;
178 force = 0;
179
180 gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
181 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
182
183 for (i = 1 << 11 ; i > 0 ; i >>= 1) {
184 udelay(1);
185
186 gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
187 udelay(1);
188
189 gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
190 udelay(1);
191
192 gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
193 }
194 udelay(1);
195
196 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
197 udelay(1);
198
199 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
200
201 current_voltage_divisor = step;
202 } while (current_voltage_divisor != divisor);
203}
204
205/* Interrupt handling */
206static unsigned long viper_irq_enabled_mask;
207
208static void viper_ack_irq(unsigned int irq)
209{
210 int viper_irq = irq - PXA_ISA_IRQ(0);
211
212 if (viper_irq < 8)
213 VIPER_LO_IRQ_STATUS = 1 << viper_irq;
214 else
215 VIPER_HI_IRQ_STATUS = 1 << (viper_irq - 8);
216}
217
218static void viper_mask_irq(unsigned int irq)
219{
220 viper_irq_enabled_mask &= ~(1 << (irq - PXA_ISA_IRQ(0)));
221}
222
223static void viper_unmask_irq(unsigned int irq)
224{
225 viper_irq_enabled_mask |= (1 << (irq - PXA_ISA_IRQ(0)));
226}
227
228static inline unsigned long viper_irq_pending(void)
229{
230 return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
231 viper_irq_enabled_mask;
232}
233
234static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
235{
236 unsigned long pending;
237
238 pending = viper_irq_pending();
239 do {
240 if (likely(pending)) {
241 irq = PXA_ISA_IRQ(0) + __ffs(pending);
242 generic_handle_irq(irq);
243 }
244 pending = viper_irq_pending();
245 } while (pending);
246}
247
248static struct irq_chip viper_irq_chip = {
249 .name = "ISA",
250 .ack = viper_ack_irq,
251 .mask = viper_mask_irq,
252 .unmask = viper_unmask_irq
253};
254
255static void __init viper_init_irq(void)
256{
257 const int isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
258 int irq;
259 int isa_irq;
260
261 pxa25x_init_irq();
262
263 /* setup ISA IRQs */
264 for (irq = 0; irq < ARRAY_SIZE(isa_irqs); irq++) {
265 isa_irq = isa_irqs[irq];
266 set_irq_chip(isa_irq, &viper_irq_chip);
267 set_irq_handler(isa_irq, handle_edge_irq);
268 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
269 }
270
271 set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
272 viper_irq_handler);
273 set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
274
275#ifndef CONFIG_SERIAL_PXA
276 /*
277 * 8250 doesn't support IRQ_TYPE being passed as part
278 * of the plat_serial8250_port structure...
279 */
280 set_irq_type(gpio_to_irq(VIPER_UARTA_GPIO), IRQ_TYPE_EDGE_RISING);
281 set_irq_type(gpio_to_irq(VIPER_UARTB_GPIO), IRQ_TYPE_EDGE_RISING);
282#endif
283}
284
285/* Flat Panel */
286static struct pxafb_mode_info fb_mode_info[] = {
287 {
288 .pixclock = 157500,
289
290 .xres = 320,
291 .yres = 240,
292
293 .bpp = 16,
294
295 .hsync_len = 63,
296 .left_margin = 7,
297 .right_margin = 13,
298
299 .vsync_len = 20,
300 .upper_margin = 0,
301 .lower_margin = 0,
302
303 .sync = 0,
304 },
305};
306
307static struct pxafb_mach_info fb_info = {
308 .modes = fb_mode_info,
309 .num_modes = 1,
310 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
311};
312
313static int viper_backlight_init(struct device *dev)
314{
315 int ret;
316
317 /* GPIO9 and 10 control FB backlight. Initialise to off */
318 ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
319 if (ret)
320 goto err_request_bckl;
321
322 ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
323 if (ret)
324 goto err_request_lcd;
325
326 ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
327 if (ret)
328 goto err_dir;
329
330 ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
331 if (ret)
332 goto err_dir;
333
334 return 0;
335
336err_dir:
337 gpio_free(VIPER_LCD_EN_GPIO);
338err_request_lcd:
339 gpio_free(VIPER_BCKLIGHT_EN_GPIO);
340err_request_bckl:
341 dev_err(dev, "Failed to setup LCD GPIOs\n");
342
343 return ret;
344}
345
346static int viper_backlight_notify(int brightness)
347{
348 gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
349 gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
350
351 return brightness;
352}
353
354static void viper_backlight_exit(struct device *dev)
355{
356 gpio_free(VIPER_LCD_EN_GPIO);
357 gpio_free(VIPER_BCKLIGHT_EN_GPIO);
358}
359
360static struct platform_pwm_backlight_data viper_backlight_data = {
361 .pwm_id = 0,
362 .max_brightness = 100,
363 .dft_brightness = 100,
364 .pwm_period_ns = 1000000,
365 .init = viper_backlight_init,
366 .notify = viper_backlight_notify,
367 .exit = viper_backlight_exit,
368};
369
370static struct platform_device viper_backlight_device = {
371 .name = "pwm-backlight",
372 .dev = {
373 .parent = &pxa25x_device_pwm0.dev,
374 .platform_data = &viper_backlight_data,
375 },
376};
377
378/* Ethernet */
379static struct resource smc91x_resources[] = {
380 [0] = {
381 .name = "smc91x-regs",
382 .start = VIPER_ETH_PHYS + 0x300,
383 .end = VIPER_ETH_PHYS + 0x30f,
384 .flags = IORESOURCE_MEM,
385 },
386 [1] = {
387 .start = gpio_to_irq(VIPER_ETH_GPIO),
388 .end = gpio_to_irq(VIPER_ETH_GPIO),
389 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
390 },
391 [2] = {
392 .name = "smc91x-data32",
393 .start = VIPER_ETH_DATA_PHYS,
394 .end = VIPER_ETH_DATA_PHYS + 3,
395 .flags = IORESOURCE_MEM,
396 },
397};
398
399static struct smc91x_platdata viper_smc91x_info = {
400 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
401 .leda = RPC_LED_100_10,
402 .ledb = RPC_LED_TX_RX,
403};
404
405static struct platform_device smc91x_device = {
406 .name = "smc91x",
407 .id = -1,
408 .num_resources = ARRAY_SIZE(smc91x_resources),
409 .resource = smc91x_resources,
410 .dev = {
411 .platform_data = &viper_smc91x_info,
412 },
413};
414
415/* i2c */
416static struct i2c_gpio_platform_data i2c_bus_data = {
417 .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
418 .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
419 .udelay = 10,
420 .timeout = 100,
421};
422
423static struct platform_device i2c_bus_device = {
424 .name = "i2c-gpio",
425 .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
426 .dev = {
427 .platform_data = &i2c_bus_data,
428 }
429};
430
431static struct i2c_board_info __initdata viper_i2c_devices[] = {
432 {
433 I2C_BOARD_INFO("ds1338", 0x68),
434 },
435};
436
437/*
438 * Serial configuration:
439 * You can either have the standard PXA ports driven by the PXA driver,
440 * or all the ports (PXA + 16850) driven by the 8250 driver.
441 * Choose your poison.
442 */
443
444static struct resource viper_serial_resources[] = {
445#ifndef CONFIG_SERIAL_PXA
446 {
447 .start = 0x40100000,
448 .end = 0x4010001f,
449 .flags = IORESOURCE_MEM,
450 },
451 {
452 .start = 0x40200000,
453 .end = 0x4020001f,
454 .flags = IORESOURCE_MEM,
455 },
456 {
457 .start = 0x40700000,
458 .end = 0x4070001f,
459 .flags = IORESOURCE_MEM,
460 },
461 {
462 .start = VIPER_UARTA_PHYS,
463 .end = VIPER_UARTA_PHYS + 0xf,
464 .flags = IORESOURCE_MEM,
465 },
466 {
467 .start = VIPER_UARTB_PHYS,
468 .end = VIPER_UARTB_PHYS + 0xf,
469 .flags = IORESOURCE_MEM,
470 },
471#else
472 {
473 0,
474 },
475#endif
476};
477
478static struct plat_serial8250_port serial_platform_data[] = {
479#ifndef CONFIG_SERIAL_PXA
480 /* Internal UARTs */
481 {
482 .membase = (void *)&FFUART,
483 .mapbase = __PREG(FFUART),
484 .irq = IRQ_FFUART,
485 .uartclk = 921600 * 16,
486 .regshift = 2,
487 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
488 .iotype = UPIO_MEM,
489 },
490 {
491 .membase = (void *)&BTUART,
492 .mapbase = __PREG(BTUART),
493 .irq = IRQ_BTUART,
494 .uartclk = 921600 * 16,
495 .regshift = 2,
496 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
497 .iotype = UPIO_MEM,
498 },
499 {
500 .membase = (void *)&STUART,
501 .mapbase = __PREG(STUART),
502 .irq = IRQ_STUART,
503 .uartclk = 921600 * 16,
504 .regshift = 2,
505 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
506 .iotype = UPIO_MEM,
507 },
508 /* External UARTs */
509 {
510 .mapbase = VIPER_UARTA_PHYS,
511 .irq = gpio_to_irq(VIPER_UARTA_GPIO),
512 .uartclk = 1843200,
513 .regshift = 1,
514 .iotype = UPIO_MEM,
515 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
516 UPF_SKIP_TEST,
517 },
518 {
519 .mapbase = VIPER_UARTB_PHYS,
520 .irq = gpio_to_irq(VIPER_UARTB_GPIO),
521 .uartclk = 1843200,
522 .regshift = 1,
523 .iotype = UPIO_MEM,
524 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
525 UPF_SKIP_TEST,
526 },
527#endif
528 { },
529};
530
531static struct platform_device serial_device = {
532 .name = "serial8250",
533 .id = 0,
534 .dev = {
535 .platform_data = serial_platform_data,
536 },
537 .num_resources = ARRAY_SIZE(viper_serial_resources),
538 .resource = viper_serial_resources,
539};
540
541/* USB */
542static void isp116x_delay(struct device *dev, int delay)
543{
544 ndelay(delay);
545}
546
547static struct resource isp116x_resources[] = {
548 [0] = { /* DATA */
549 .start = VIPER_USB_PHYS + 0,
550 .end = VIPER_USB_PHYS + 1,
551 .flags = IORESOURCE_MEM,
552 },
553 [1] = { /* ADDR */
554 .start = VIPER_USB_PHYS + 2,
555 .end = VIPER_USB_PHYS + 3,
556 .flags = IORESOURCE_MEM,
557 },
558 [2] = {
559 .start = gpio_to_irq(VIPER_USB_GPIO),
560 .end = gpio_to_irq(VIPER_USB_GPIO),
561 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
562 },
563};
564
565/* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
566static struct isp116x_platform_data isp116x_platform_data = {
567 /* Enable internal resistors on downstream ports */
568 .sel15Kres = 1,
569 /* On-chip overcurrent protection */
570 .oc_enable = 1,
571 /* INT output polarity */
572 .int_act_high = 1,
573 /* INT edge or level triggered */
574 .int_edge_triggered = 0,
575
576 /* WAKEUP pin connected - NOT SUPPORTED */
577 /* .remote_wakeup_connected = 0, */
578 /* Wakeup by devices on usb bus enabled */
579 .remote_wakeup_enable = 0,
580 .delay = isp116x_delay,
581};
582
583static struct platform_device isp116x_device = {
584 .name = "isp116x-hcd",
585 .id = -1,
586 .num_resources = ARRAY_SIZE(isp116x_resources),
587 .resource = isp116x_resources,
588 .dev = {
589 .platform_data = &isp116x_platform_data,
590 },
591
592};
593
594/* MTD */
595static struct resource mtd_resources[] = {
596 [0] = { /* RedBoot config + filesystem flash */
597 .start = VIPER_FLASH_PHYS,
598 .end = VIPER_FLASH_PHYS + SZ_32M - 1,
599 .flags = IORESOURCE_MEM,
600 },
601 [1] = { /* Boot flash */
602 .start = VIPER_BOOT_PHYS,
603 .end = VIPER_BOOT_PHYS + SZ_1M - 1,
604 .flags = IORESOURCE_MEM,
605 },
606 [2] = { /*
607 * SRAM size is actually 256KB, 8bits, with a sparse mapping
608 * (each byte is on a 16bit boundary).
609 */
610 .start = _VIPER_SRAM_BASE,
611 .end = _VIPER_SRAM_BASE + SZ_512K - 1,
612 .flags = IORESOURCE_MEM,
613 },
614};
615
616static struct mtd_partition viper_boot_flash_partition = {
617 .name = "RedBoot",
618 .size = SZ_1M,
619 .offset = 0,
620 .mask_flags = MTD_WRITEABLE, /* force R/O */
621};
622
623static struct physmap_flash_data viper_flash_data[] = {
624 [0] = {
625 .width = 2,
626 .parts = NULL,
627 .nr_parts = 0,
628 },
629 [1] = {
630 .width = 2,
631 .parts = &viper_boot_flash_partition,
632 .nr_parts = 1,
633 },
634};
635
636static struct platform_device viper_mtd_devices[] = {
637 [0] = {
638 .name = "physmap-flash",
639 .id = 0,
640 .dev = {
641 .platform_data = &viper_flash_data[0],
642 },
643 .resource = &mtd_resources[0],
644 .num_resources = 1,
645 },
646 [1] = {
647 .name = "physmap-flash",
648 .id = 1,
649 .dev = {
650 .platform_data = &viper_flash_data[1],
651 },
652 .resource = &mtd_resources[1],
653 .num_resources = 1,
654 },
655};
656
657static struct platform_device *viper_devs[] __initdata = {
658 &smc91x_device,
659 &i2c_bus_device,
660 &serial_device,
661 &isp116x_device,
662 &viper_mtd_devices[0],
663 &viper_mtd_devices[1],
664 &viper_backlight_device,
665};
666
667static mfp_cfg_t viper_pin_config[] __initdata = {
668 /* Chip selects */
669 GPIO15_nCS_1,
670 GPIO78_nCS_2,
671 GPIO79_nCS_3,
672 GPIO80_nCS_4,
673 GPIO33_nCS_5,
674
675 /* FP Backlight */
676 GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
677 GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
678 GPIO16_PWM0_OUT,
679
680 /* Ethernet PHY Ready */
681 GPIO18_RDY,
682
683 /* Serial shutdown */
684 GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
685
686 /* Compact-Flash / PC104 */
687 GPIO48_nPOE,
688 GPIO49_nPWE,
689 GPIO50_nPIOR,
690 GPIO51_nPIOW,
691 GPIO52_nPCE_1,
692 GPIO53_nPCE_2,
693 GPIO54_nPSKTSEL,
694 GPIO55_nPREG,
695 GPIO56_nPWAIT,
696 GPIO57_nIOIS16,
697 GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
698 GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
699 GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
700
701 /* Integrated UPS control */
702 GPIO20_GPIO, /* VIPER_UPS_GPIO */
703
704 /* Vcc regulator control */
705 GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
706 GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
707 GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
708
709 /* i2c busses */
710 GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
711 GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
712 GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
713 GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
714
715 /* PC/104 Interrupt */
716 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
717};
718
719static unsigned long viper_tpm;
720
721static int __init viper_tpm_setup(char *str)
722{
723 strict_strtoul(str, 10, &viper_tpm);
724 return 1;
725}
726
727__setup("tpm=", viper_tpm_setup);
728
729static void __init viper_tpm_init(void)
730{
731 struct platform_device *tpm_device;
732 struct i2c_gpio_platform_data i2c_tpm_data = {
733 .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
734 .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
735 .udelay = 10,
736 .timeout = 100,
737 };
738 char *errstr;
739
740 /* Allocate TPM i2c bus if requested */
741 if (!viper_tpm)
742 return;
743
744 tpm_device = platform_device_alloc("i2c-gpio", 2);
745 if (tpm_device) {
746 if (!platform_device_add_data(tpm_device,
747 &i2c_tpm_data,
748 sizeof(i2c_tpm_data))) {
749 if (platform_device_add(tpm_device)) {
750 errstr = "register TPM i2c bus";
751 goto error_free_tpm;
752 }
753 } else {
754 errstr = "allocate TPM i2c bus data";
755 goto error_free_tpm;
756 }
757 } else {
758 errstr = "allocate TPM i2c device";
759 goto error_tpm;
760 }
761
762 return;
763
764error_free_tpm:
765 kfree(tpm_device);
766error_tpm:
767 pr_err("viper: Couldn't %s, giving up\n", errstr);
768}
769
770static void __init viper_init_vcore_gpios(void)
771{
772 if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
773 goto err_request_data;
774
775 if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
776 goto err_request_clk;
777
778 if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
779 goto err_request_cs;
780
781 if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
782 gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
783 gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
784 goto err_dir;
785
786 /* c/should assume redboot set the correct level ??? */
787 viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
788
789 return;
790
791err_dir:
792 gpio_free(VIPER_PSU_nCS_LD_GPIO);
793err_request_cs:
794 gpio_free(VIPER_PSU_CLK_GPIO);
795err_request_clk:
796 gpio_free(VIPER_PSU_DATA_GPIO);
797err_request_data:
798 pr_err("viper: Failed to setup vcore control GPIOs\n");
799}
800
801static void __init viper_init_serial_gpio(void)
802{
803 if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
804 goto err_request;
805
806 if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
807 goto err_dir;
808
809 return;
810
811err_dir:
812 gpio_free(VIPER_UART_SHDN_GPIO);
813err_request:
814 pr_err("viper: Failed to setup UART shutdown GPIO\n");
815}
816
817#ifdef CONFIG_CPU_FREQ
818static int viper_cpufreq_notifier(struct notifier_block *nb,
819 unsigned long val, void *data)
820{
821 struct cpufreq_freqs *freq = data;
822
823 /* TODO: Adjust timings??? */
824
825 switch (val) {
826 case CPUFREQ_PRECHANGE:
827 if (freq->old < freq->new) {
828 /* we are getting faster so raise the voltage
829 * before we change freq */
830 viper_set_core_cpu_voltage(freq->new, 0);
831 }
832 break;
833 case CPUFREQ_POSTCHANGE:
834 if (freq->old > freq->new) {
835 /* we are slowing down so drop the power
836 * after we change freq */
837 viper_set_core_cpu_voltage(freq->new, 0);
838 }
839 break;
840 case CPUFREQ_RESUMECHANGE:
841 viper_set_core_cpu_voltage(freq->new, 0);
842 break;
843 default:
844 /* ignore */
845 break;
846 }
847
848 return 0;
849}
850
851static struct notifier_block viper_cpufreq_notifier_block = {
852 .notifier_call = viper_cpufreq_notifier
853};
854
855static void __init viper_init_cpufreq(void)
856{
857 if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
858 CPUFREQ_TRANSITION_NOTIFIER))
859 pr_err("viper: Failed to setup cpufreq notifier\n");
860}
861#else
862static inline void viper_init_cpufreq(void) {}
863#endif
864
865static void viper_power_off(void)
866{
867 pr_notice("Shutting off UPS\n");
868 gpio_set_value(VIPER_UPS_GPIO, 1);
869 /* Spin to death... */
870 while (1);
871}
872
873static void __init viper_init(void)
874{
875 u8 version;
876
877 pm_power_off = viper_power_off;
878
879 pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
880
881 /* Wake-up serial console */
882 viper_init_serial_gpio();
883
884 set_pxa_fb_info(&fb_info);
885
886 /* v1 hardware cannot use the datacs line */
887 version = viper_hw_version();
888 if (version == 0)
889 smc91x_device.num_resources--;
890
891 pxa_set_i2c_info(NULL);
892 platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
893
894 viper_init_vcore_gpios();
895 viper_init_cpufreq();
896
897 sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver);
898
899 if (version) {
900 pr_info("viper: hardware v%di%d detected. "
901 "CPLD revision %d.\n",
902 VIPER_BOARD_VERSION(version),
903 VIPER_BOARD_ISSUE(version),
904 VIPER_CPLD_REVISION(version));
905 system_rev = (VIPER_BOARD_VERSION(version) << 8) |
906 (VIPER_BOARD_ISSUE(version) << 4) |
907 VIPER_CPLD_REVISION(version);
908 } else {
909 pr_info("viper: No version register.\n");
910 }
911
912 i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
913
914 viper_tpm_init();
915 pxa_set_ac97_info(NULL);
916}
917
918static struct map_desc viper_io_desc[] __initdata = {
919 {
920 .virtual = VIPER_CPLD_BASE,
921 .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
922 .length = 0x00300000,
923 .type = MT_DEVICE,
924 },
925 {
926 .virtual = VIPER_PC104IO_BASE,
927 .pfn = __phys_to_pfn(_PCMCIA1IO),
928 .length = 0x00800000,
929 .type = MT_DEVICE,
930 },
931};
932
933static void __init viper_map_io(void)
934{
935 pxa_map_io();
936
937 iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
938
939 PCFR |= PCFR_OPDE;
940}
941
942MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
943 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
944 .phys_io = 0x40000000,
945 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
946 .boot_params = 0xa0000100,
947 .map_io = viper_map_io,
948 .init_irq = viper_init_irq,
949 .timer = &pxa_timer,
950 .init_machine = viper_init,
951MACHINE_END
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c
index 095f5c648236..1f4d7c052c22 100644
--- a/arch/arm/mach-pxa/zylonite_pxa300.c
+++ b/arch/arm/mach-pxa/zylonite_pxa300.c
@@ -73,6 +73,12 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = {
73 GPIO27_AC97_SDATA_OUT, 73 GPIO27_AC97_SDATA_OUT,
74 GPIO28_AC97_SYNC, 74 GPIO28_AC97_SYNC,
75 75
76 /* SSP3 */
77 GPIO91_SSP3_SCLK,
78 GPIO92_SSP3_FRM,
79 GPIO93_SSP3_TXD,
80 GPIO94_SSP3_RXD,
81
76 /* WM9713 IRQ */ 82 /* WM9713 IRQ */
77 GPIO26_GPIO, 83 GPIO26_GPIO,
78 84
@@ -209,7 +215,7 @@ static struct pca953x_platform_data gpio_exp[] = {
209 }, 215 },
210}; 216};
211 217
212struct i2c_board_info zylonite_i2c_board_info[] = { 218static struct i2c_board_info zylonite_i2c_board_info[] = {
213 { 219 {
214 .type = "pca9539", 220 .type = "pca9539",
215 .addr = 0x74, 221 .addr = 0x74,
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c
index 9879d7da2df5..755e87fa8ab9 100644
--- a/arch/arm/mach-pxa/zylonite_pxa320.c
+++ b/arch/arm/mach-pxa/zylonite_pxa320.c
@@ -69,6 +69,12 @@ static mfp_cfg_t mfp_cfg[] __initdata = {
69 GPIO39_AC97_BITCLK, 69 GPIO39_AC97_BITCLK,
70 GPIO40_AC97_nACRESET, 70 GPIO40_AC97_nACRESET,
71 71
72 /* SSP3 */
73 GPIO89_SSP3_SCLK,
74 GPIO90_SSP3_FRM,
75 GPIO91_SSP3_TXD,
76 GPIO92_SSP3_RXD,
77
72 /* WM9713 IRQ */ 78 /* WM9713 IRQ */
73 GPIO15_GPIO, 79 GPIO15_GPIO,
74 80
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-02 20:02:28 -0500