diff options
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r-- | arch/arm/mach-pxa/include/mach/entry-macro.S | 36 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/vmalloc.h | 11 | ||||
-rw-r--r-- | arch/arm/mach-pxa/time.c | 15 |
3 files changed, 3 insertions, 59 deletions
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S index a73bc86a3c26..260c0c17692a 100644 --- a/arch/arm/mach-pxa/include/mach/entry-macro.S +++ b/arch/arm/mach-pxa/include/mach/entry-macro.S | |||
@@ -7,45 +7,9 @@ | |||
7 | * License version 2. This program is licensed "as is" without any | 7 | * License version 2. This program is licensed "as is" without any |
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | #include <mach/hardware.h> | ||
11 | #include <mach/irqs.h> | ||
12 | 10 | ||
13 | .macro disable_fiq | 11 | .macro disable_fiq |
14 | .endm | 12 | .endm |
15 | 13 | ||
16 | .macro get_irqnr_preamble, base, tmp | ||
17 | .endm | ||
18 | |||
19 | .macro arch_ret_to_user, tmp1, tmp2 | 14 | .macro arch_ret_to_user, tmp1, tmp2 |
20 | .endm | 15 | .endm |
21 | |||
22 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
23 | mrc p15, 0, \tmp, c0, c0, 0 @ CPUID | ||
24 | mov \tmp, \tmp, lsr #13 | ||
25 | and \tmp, \tmp, #0x7 @ Core G | ||
26 | cmp \tmp, #1 | ||
27 | bhi 1002f | ||
28 | |||
29 | @ Core Generation 1 (PXA25x) | ||
30 | mov \base, #io_p2v(0x40000000) @ IIR Ctl = 0x40d00000 | ||
31 | add \base, \base, #0x00d00000 | ||
32 | ldr \irqstat, [\base, #0] @ ICIP | ||
33 | ldr \irqnr, [\base, #4] @ ICMR | ||
34 | |||
35 | ands \irqnr, \irqstat, \irqnr | ||
36 | beq 1001f | ||
37 | rsb \irqstat, \irqnr, #0 | ||
38 | and \irqstat, \irqstat, \irqnr | ||
39 | clz \irqnr, \irqstat | ||
40 | rsb \irqnr, \irqnr, #(31 + PXA_IRQ(0)) | ||
41 | b 1001f | ||
42 | 1002: | ||
43 | @ Core Generation 2 (PXA27x) or Core Generation 3 (PXA3xx) | ||
44 | mrc p6, 0, \irqstat, c5, c0, 0 @ ICHP | ||
45 | tst \irqstat, #0x80000000 | ||
46 | beq 1001f | ||
47 | bic \irqstat, \irqstat, #0x80000000 | ||
48 | mov \irqnr, \irqstat, lsr #16 | ||
49 | add \irqnr, \irqnr, #(PXA_IRQ(0)) | ||
50 | 1001: | ||
51 | .endm | ||
diff --git a/arch/arm/mach-pxa/include/mach/vmalloc.h b/arch/arm/mach-pxa/include/mach/vmalloc.h deleted file mode 100644 index bfecfbf5f460..000000000000 --- a/arch/arm/mach-pxa/include/mach/vmalloc.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pxa/include/mach/vmalloc.h | ||
3 | * | ||
4 | * Author: Nicolas Pitre | ||
5 | * Copyright: (C) 2001 MontaVista Software Inc. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | #define VMALLOC_END (0xe8000000UL) | ||
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index de684701449c..b503049d6d26 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c | |||
@@ -16,7 +16,6 @@ | |||
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | #include <linux/interrupt.h> | 17 | #include <linux/interrupt.h> |
18 | #include <linux/clockchips.h> | 18 | #include <linux/clockchips.h> |
19 | #include <linux/sched.h> | ||
20 | 19 | ||
21 | #include <asm/div64.h> | 20 | #include <asm/div64.h> |
22 | #include <asm/mach/irq.h> | 21 | #include <asm/mach/irq.h> |
@@ -32,18 +31,10 @@ | |||
32 | * long as there is always less than 582 seconds between successive | 31 | * long as there is always less than 582 seconds between successive |
33 | * calls to sched_clock() which should always be the case in practice. | 32 | * calls to sched_clock() which should always be the case in practice. |
34 | */ | 33 | */ |
35 | static DEFINE_CLOCK_DATA(cd); | ||
36 | 34 | ||
37 | unsigned long long notrace sched_clock(void) | 35 | static u32 notrace pxa_read_sched_clock(void) |
38 | { | 36 | { |
39 | u32 cyc = OSCR; | 37 | return OSCR; |
40 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
41 | } | ||
42 | |||
43 | static void notrace pxa_update_sched_clock(void) | ||
44 | { | ||
45 | u32 cyc = OSCR; | ||
46 | update_sched_clock(&cd, cyc, (u32)~0); | ||
47 | } | 38 | } |
48 | 39 | ||
49 | 40 | ||
@@ -119,7 +110,7 @@ static void __init pxa_timer_init(void) | |||
119 | OIER = 0; | 110 | OIER = 0; |
120 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; | 111 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; |
121 | 112 | ||
122 | init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate); | 113 | setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate); |
123 | 114 | ||
124 | clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4); | 115 | clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4); |
125 | ckevt_pxa_osmr0.max_delta_ns = | 116 | ckevt_pxa_osmr0.max_delta_ns = |