diff options
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r-- | arch/arm/mach-pxa/Kconfig | 8 | ||||
-rw-r--r-- | arch/arm/mach-pxa/generic.c | 60 | ||||
-rw-r--r-- | arch/arm/mach-pxa/irq.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-pxa/lpd270.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-pxa/lubbock.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-pxa/mainstone.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-pxa/pm.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-pxa/time.c | 7 |
8 files changed, 77 insertions, 23 deletions
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 03d07cae26c8..9e3d0bdcba07 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
@@ -13,12 +13,10 @@ config ARCH_LUBBOCK | |||
13 | config MACH_LOGICPD_PXA270 | 13 | config MACH_LOGICPD_PXA270 |
14 | bool "LogicPD PXA270 Card Engine Development Platform" | 14 | bool "LogicPD PXA270 Card Engine Development Platform" |
15 | select PXA27x | 15 | select PXA27x |
16 | select IWMMXT | ||
17 | 16 | ||
18 | config MACH_MAINSTONE | 17 | config MACH_MAINSTONE |
19 | bool "Intel HCDDBBVA0 Development Platform" | 18 | bool "Intel HCDDBBVA0 Development Platform" |
20 | select PXA27x | 19 | select PXA27x |
21 | select IWMMXT | ||
22 | 20 | ||
23 | config ARCH_PXA_IDP | 21 | config ARCH_PXA_IDP |
24 | bool "Accelent Xscale IDP" | 22 | bool "Accelent Xscale IDP" |
@@ -53,7 +51,6 @@ config PXA_SHARPSL_25x | |||
53 | config PXA_SHARPSL_27x | 51 | config PXA_SHARPSL_27x |
54 | bool "Sharp PXA270 models (SL-Cxx00)" | 52 | bool "Sharp PXA270 models (SL-Cxx00)" |
55 | select PXA27x | 53 | select PXA27x |
56 | select IWMMXT | ||
57 | 54 | ||
58 | endchoice | 55 | endchoice |
59 | 56 | ||
@@ -129,11 +126,6 @@ config PXA27x | |||
129 | help | 126 | help |
130 | Select code specific to PXA27x variants | 127 | Select code specific to PXA27x variants |
131 | 128 | ||
132 | config IWMMXT | ||
133 | bool | ||
134 | help | ||
135 | Enable support for iWMMXt | ||
136 | |||
137 | config PXA_SHARP_C7xx | 129 | config PXA_SHARP_C7xx |
138 | bool | 130 | bool |
139 | select PXA_SSP | 131 | select PXA_SSP |
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index 45fb2c3bcf82..6ae605857ca9 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c | |||
@@ -25,6 +25,10 @@ | |||
25 | #include <linux/pm.h> | 25 | #include <linux/pm.h> |
26 | #include <linux/string.h> | 26 | #include <linux/string.h> |
27 | 27 | ||
28 | #include <linux/sched.h> | ||
29 | #include <asm/cnt32_to_63.h> | ||
30 | #include <asm/div64.h> | ||
31 | |||
28 | #include <asm/hardware.h> | 32 | #include <asm/hardware.h> |
29 | #include <asm/irq.h> | 33 | #include <asm/irq.h> |
30 | #include <asm/system.h> | 34 | #include <asm/system.h> |
@@ -41,6 +45,62 @@ | |||
41 | #include "generic.h" | 45 | #include "generic.h" |
42 | 46 | ||
43 | /* | 47 | /* |
48 | * This is the PXA2xx sched_clock implementation. This has a resolution | ||
49 | * of at least 308ns and a maximum value that depends on the value of | ||
50 | * CLOCK_TICK_RATE. | ||
51 | * | ||
52 | * The return value is guaranteed to be monotonic in that range as | ||
53 | * long as there is always less than 582 seconds between successive | ||
54 | * calls to this function. | ||
55 | */ | ||
56 | unsigned long long sched_clock(void) | ||
57 | { | ||
58 | unsigned long long v = cnt32_to_63(OSCR); | ||
59 | /* Note: top bit ov v needs cleared unless multiplier is even. */ | ||
60 | |||
61 | #if CLOCK_TICK_RATE == 3686400 | ||
62 | /* 1E9 / 3686400 => 78125 / 288, max value = 32025597s (370 days). */ | ||
63 | /* The <<1 is used to get rid of tick.hi top bit */ | ||
64 | v *= 78125<<1; | ||
65 | do_div(v, 288<<1); | ||
66 | #elif CLOCK_TICK_RATE == 3250000 | ||
67 | /* 1E9 / 3250000 => 4000 / 13, max value = 709490156s (8211 days) */ | ||
68 | v *= 4000; | ||
69 | do_div(v, 13); | ||
70 | #elif CLOCK_TICK_RATE == 3249600 | ||
71 | /* 1E9 / 3249600 => 625000 / 2031, max value = 4541295s (52 days) */ | ||
72 | v *= 625000; | ||
73 | do_div(v, 2031); | ||
74 | #else | ||
75 | #warning "consider fixing sched_clock for your value of CLOCK_TICK_RATE" | ||
76 | /* | ||
77 | * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for | ||
78 | * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand | ||
79 | * years range which is nice, but with higher computation cost. | ||
80 | */ | ||
81 | { | ||
82 | union { | ||
83 | unsigned long long val; | ||
84 | struct { unsigned long lo, hi; }; | ||
85 | } x; | ||
86 | unsigned long long y; | ||
87 | |||
88 | x.val = v; | ||
89 | x.hi &= 0x7fffffff; | ||
90 | y = (unsigned long long)x.lo * NSEC_PER_SEC; | ||
91 | x.lo = y; | ||
92 | y = (y >> 32) + (unsigned long long)x.hi * NSEC_PER_SEC; | ||
93 | x.hi = do_div(y, CLOCK_TICK_RATE); | ||
94 | do_div(x.val, CLOCK_TICK_RATE); | ||
95 | x.hi += y; | ||
96 | v = x.val; | ||
97 | } | ||
98 | #endif | ||
99 | |||
100 | return v; | ||
101 | } | ||
102 | |||
103 | /* | ||
44 | * Handy function to set GPIO alternate functions | 104 | * Handy function to set GPIO alternate functions |
45 | */ | 105 | */ |
46 | 106 | ||
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index ab1a16025d51..f815678a9d63 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c | |||
@@ -143,7 +143,7 @@ static struct irq_chip pxa_low_gpio_chip = { | |||
143 | * Demux handler for GPIO>=2 edge detect interrupts | 143 | * Demux handler for GPIO>=2 edge detect interrupts |
144 | */ | 144 | */ |
145 | 145 | ||
146 | static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc) | 146 | static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc) |
147 | { | 147 | { |
148 | unsigned int mask; | 148 | unsigned int mask; |
149 | int loop; | 149 | int loop; |
@@ -286,27 +286,27 @@ void __init pxa_init_irq(void) | |||
286 | 286 | ||
287 | for (irq = PXA_IRQ(PXA_IRQ_SKIP); irq <= PXA_IRQ(31); irq++) { | 287 | for (irq = PXA_IRQ(PXA_IRQ_SKIP); irq <= PXA_IRQ(31); irq++) { |
288 | set_irq_chip(irq, &pxa_internal_chip_low); | 288 | set_irq_chip(irq, &pxa_internal_chip_low); |
289 | set_irq_handler(irq, do_level_IRQ); | 289 | set_irq_handler(irq, handle_level_irq); |
290 | set_irq_flags(irq, IRQF_VALID); | 290 | set_irq_flags(irq, IRQF_VALID); |
291 | } | 291 | } |
292 | 292 | ||
293 | #if PXA_INTERNAL_IRQS > 32 | 293 | #if PXA_INTERNAL_IRQS > 32 |
294 | for (irq = PXA_IRQ(32); irq < PXA_IRQ(PXA_INTERNAL_IRQS); irq++) { | 294 | for (irq = PXA_IRQ(32); irq < PXA_IRQ(PXA_INTERNAL_IRQS); irq++) { |
295 | set_irq_chip(irq, &pxa_internal_chip_high); | 295 | set_irq_chip(irq, &pxa_internal_chip_high); |
296 | set_irq_handler(irq, do_level_IRQ); | 296 | set_irq_handler(irq, handle_level_irq); |
297 | set_irq_flags(irq, IRQF_VALID); | 297 | set_irq_flags(irq, IRQF_VALID); |
298 | } | 298 | } |
299 | #endif | 299 | #endif |
300 | 300 | ||
301 | for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { | 301 | for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { |
302 | set_irq_chip(irq, &pxa_low_gpio_chip); | 302 | set_irq_chip(irq, &pxa_low_gpio_chip); |
303 | set_irq_handler(irq, do_edge_IRQ); | 303 | set_irq_handler(irq, handle_edge_irq); |
304 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 304 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
305 | } | 305 | } |
306 | 306 | ||
307 | for (irq = IRQ_GPIO(2); irq <= IRQ_GPIO(PXA_LAST_GPIO); irq++) { | 307 | for (irq = IRQ_GPIO(2); irq <= IRQ_GPIO(PXA_LAST_GPIO); irq++) { |
308 | set_irq_chip(irq, &pxa_muxed_gpio_chip); | 308 | set_irq_chip(irq, &pxa_muxed_gpio_chip); |
309 | set_irq_handler(irq, do_edge_IRQ); | 309 | set_irq_handler(irq, handle_edge_irq); |
310 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 310 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
311 | } | 311 | } |
312 | 312 | ||
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index 5749f6b72e12..8e27a64fa9f4 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c | |||
@@ -75,7 +75,7 @@ static struct irq_chip lpd270_irq_chip = { | |||
75 | .unmask = lpd270_unmask_irq, | 75 | .unmask = lpd270_unmask_irq, |
76 | }; | 76 | }; |
77 | 77 | ||
78 | static void lpd270_irq_handler(unsigned int irq, struct irqdesc *desc) | 78 | static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc) |
79 | { | 79 | { |
80 | unsigned long pending; | 80 | unsigned long pending; |
81 | 81 | ||
@@ -105,7 +105,7 @@ static void __init lpd270_init_irq(void) | |||
105 | /* setup extra LogicPD PXA270 irqs */ | 105 | /* setup extra LogicPD PXA270 irqs */ |
106 | for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) { | 106 | for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) { |
107 | set_irq_chip(irq, &lpd270_irq_chip); | 107 | set_irq_chip(irq, &lpd270_irq_chip); |
108 | set_irq_handler(irq, do_level_IRQ); | 108 | set_irq_handler(irq, handle_level_irq); |
109 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 109 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
110 | } | 110 | } |
111 | set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler); | 111 | set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler); |
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 142c33c3dff5..055de7f4f00a 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c | |||
@@ -85,7 +85,7 @@ static struct irq_chip lubbock_irq_chip = { | |||
85 | .unmask = lubbock_unmask_irq, | 85 | .unmask = lubbock_unmask_irq, |
86 | }; | 86 | }; |
87 | 87 | ||
88 | static void lubbock_irq_handler(unsigned int irq, struct irqdesc *desc) | 88 | static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc) |
89 | { | 89 | { |
90 | unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; | 90 | unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; |
91 | do { | 91 | do { |
@@ -108,7 +108,7 @@ static void __init lubbock_init_irq(void) | |||
108 | /* setup extra lubbock irqs */ | 108 | /* setup extra lubbock irqs */ |
109 | for (irq = LUBBOCK_IRQ(0); irq <= LUBBOCK_LAST_IRQ; irq++) { | 109 | for (irq = LUBBOCK_IRQ(0); irq <= LUBBOCK_LAST_IRQ; irq++) { |
110 | set_irq_chip(irq, &lubbock_irq_chip); | 110 | set_irq_chip(irq, &lubbock_irq_chip); |
111 | set_irq_handler(irq, do_level_IRQ); | 111 | set_irq_handler(irq, handle_level_irq); |
112 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 112 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
113 | } | 113 | } |
114 | 114 | ||
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 49c34d94a9fe..56d94d88d5ca 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c | |||
@@ -71,7 +71,7 @@ static struct irq_chip mainstone_irq_chip = { | |||
71 | .unmask = mainstone_unmask_irq, | 71 | .unmask = mainstone_unmask_irq, |
72 | }; | 72 | }; |
73 | 73 | ||
74 | static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc) | 74 | static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc) |
75 | { | 75 | { |
76 | unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; | 76 | unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; |
77 | do { | 77 | do { |
@@ -94,7 +94,7 @@ static void __init mainstone_init_irq(void) | |||
94 | /* setup extra Mainstone irqs */ | 94 | /* setup extra Mainstone irqs */ |
95 | for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) { | 95 | for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) { |
96 | set_irq_chip(irq, &mainstone_irq_chip); | 96 | set_irq_chip(irq, &mainstone_irq_chip); |
97 | set_irq_handler(irq, do_level_IRQ); | 97 | set_irq_handler(irq, handle_level_irq); |
98 | if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14)) | 98 | if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14)) |
99 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN); | 99 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN); |
100 | else | 100 | else |
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c index 2112c414f0e2..b4d8276d6050 100644 --- a/arch/arm/mach-pxa/pm.c +++ b/arch/arm/mach-pxa/pm.c | |||
@@ -83,7 +83,8 @@ int pxa_pm_enter(suspend_state_t state) | |||
83 | 83 | ||
84 | #ifdef CONFIG_IWMMXT | 84 | #ifdef CONFIG_IWMMXT |
85 | /* force any iWMMXt context to ram **/ | 85 | /* force any iWMMXt context to ram **/ |
86 | iwmmxt_task_disable(NULL); | 86 | if (elf_hwcap & HWCAP_IWMMXT) |
87 | iwmmxt_task_disable(NULL); | ||
87 | #endif | 88 | #endif |
88 | 89 | ||
89 | /* preserve current time */ | 90 | /* preserve current time */ |
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index 3ac268fa419b..b91466861029 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c | |||
@@ -124,6 +124,7 @@ static struct irqaction pxa_timer_irq = { | |||
124 | static void __init pxa_timer_init(void) | 124 | static void __init pxa_timer_init(void) |
125 | { | 125 | { |
126 | struct timespec tv; | 126 | struct timespec tv; |
127 | unsigned long flags; | ||
127 | 128 | ||
128 | set_rtc = pxa_set_rtc; | 129 | set_rtc = pxa_set_rtc; |
129 | 130 | ||
@@ -132,12 +133,12 @@ static void __init pxa_timer_init(void) | |||
132 | do_settimeofday(&tv); | 133 | do_settimeofday(&tv); |
133 | 134 | ||
134 | OIER = 0; /* disable any timer interrupts */ | 135 | OIER = 0; /* disable any timer interrupts */ |
135 | OSCR = LATCH*2; /* push OSCR out of the way */ | ||
136 | OSMR0 = LATCH; /* set initial match */ | ||
137 | OSSR = 0xf; /* clear status on all timers */ | 136 | OSSR = 0xf; /* clear status on all timers */ |
138 | setup_irq(IRQ_OST0, &pxa_timer_irq); | 137 | setup_irq(IRQ_OST0, &pxa_timer_irq); |
138 | local_irq_save(flags); | ||
139 | OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */ | 139 | OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */ |
140 | OSCR = 0; /* initialize free-running timer */ | 140 | OSMR0 = OSCR + LATCH; /* set initial match */ |
141 | local_irq_restore(flags); | ||
141 | } | 142 | } |
142 | 143 | ||
143 | #ifdef CONFIG_NO_IDLE_HZ | 144 | #ifdef CONFIG_NO_IDLE_HZ |