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-rw-r--r--arch/arm/mach-pxa/Kconfig57
-rw-r--r--arch/arm/mach-pxa/Makefile4
-rw-r--r--arch/arm/mach-pxa/cm-x300.c104
-rw-r--r--arch/arm/mach-pxa/colibri-pxa3xx.c2
-rw-r--r--arch/arm/mach-pxa/corgi.c56
-rw-r--r--arch/arm/mach-pxa/corgi_lcd.c288
-rw-r--r--arch/arm/mach-pxa/corgi_pm.c77
-rw-r--r--arch/arm/mach-pxa/corgi_ssp.c274
-rw-r--r--arch/arm/mach-pxa/csb726.c11
-rw-r--r--arch/arm/mach-pxa/em-x270.c2
-rw-r--r--arch/arm/mach-pxa/generic.c31
-rw-r--r--arch/arm/mach-pxa/include/mach/corgi.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/mmc.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h375
-rw-r--r--arch/arm/mach-pxa/include/mach/regs-ssp.h134
-rw-r--r--arch/arm/mach-pxa/include/mach/ssp.h109
-rw-r--r--arch/arm/mach-pxa/include/mach/tosa.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/vpac270.h42
-rw-r--r--arch/arm/mach-pxa/include/mach/z2.h41
-rw-r--r--arch/arm/mach-pxa/littleton.c3
-rw-r--r--arch/arm/mach-pxa/lubbock.c2
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c43
-rw-r--r--arch/arm/mach-pxa/mioa701.c2
-rw-r--r--arch/arm/mach-pxa/mxm8x10.c2
-rw-r--r--arch/arm/mach-pxa/palmld.c2
-rw-r--r--arch/arm/mach-pxa/palmt5.c2
-rw-r--r--arch/arm/mach-pxa/palmtc.c2
-rw-r--r--arch/arm/mach-pxa/palmtx.c2
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c2
-rw-r--r--arch/arm/mach-pxa/poodle.c5
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c1
-rw-r--r--arch/arm/mach-pxa/raumfeld.c2
-rw-r--r--arch/arm/mach-pxa/sharpsl.h23
-rw-r--r--arch/arm/mach-pxa/sharpsl_pm.c1
-rw-r--r--arch/arm/mach-pxa/spitz.c6
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c28
-rw-r--r--arch/arm/mach-pxa/ssp.c510
-rw-r--r--arch/arm/mach-pxa/stargate2.c5
-rw-r--r--arch/arm/mach-pxa/tosa.c2
-rw-r--r--arch/arm/mach-pxa/trizeps4.c2
-rw-r--r--arch/arm/mach-pxa/vpac270.c615
-rw-r--r--arch/arm/mach-pxa/z2.c609
-rw-r--r--arch/arm/mach-pxa/zeus.c2
-rw-r--r--arch/arm/mach-pxa/zylonite.c6
45 files changed, 1565 insertions, 1928 deletions
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 5b6ee46fa7f6..3b51741a4810 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -19,7 +19,6 @@ config MACH_MAINSTONE
19config MACH_ZYLONITE 19config MACH_ZYLONITE
20 bool 20 bool
21 select PXA3xx 21 select PXA3xx
22 select PXA_SSP
23 select HAVE_PWM 22 select HAVE_PWM
24 select PXA_HAVE_BOARD_IRQS 23 select PXA_HAVE_BOARD_IRQS
25 24
@@ -39,7 +38,6 @@ config MACH_LITTLETON
39 select PXA3xx 38 select PXA3xx
40 select CPU_PXA300 39 select CPU_PXA300
41 select CPU_PXA310 40 select CPU_PXA310
42 select PXA_SSP
43 41
44config MACH_TAVOREVB 42config MACH_TAVOREVB
45 bool "PXA930 Evaluation Board (aka TavorEVB)" 43 bool "PXA930 Evaluation Board (aka TavorEVB)"
@@ -98,7 +96,6 @@ config MACH_ARMCORE
98 select PXA27x 96 select PXA27x
99 select IWMMXT 97 select IWMMXT
100 select PXA25x 98 select PXA25x
101 select PXA_SSP
102 99
103config MACH_EM_X270 100config MACH_EM_X270
104 bool "CompuLab EM-x270 platform" 101 bool "CompuLab EM-x270 platform"
@@ -161,7 +158,6 @@ config MACH_XCEP
161 select MTD_CFI 158 select MTD_CFI
162 select MTD_CHAR 159 select MTD_CHAR
163 select SMC91X 160 select SMC91X
164 select PXA_SSP
165 help 161 help
166 PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash. 162 PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash.
167 Tuned for usage in Libera instruments for particle accelerators. 163 Tuned for usage in Libera instruments for particle accelerators.
@@ -180,7 +176,6 @@ config MACH_TRIZEPS4WL
180 depends on TRIZEPS_PXA 176 depends on TRIZEPS_PXA
181 select TRIZEPS_PCMCIA 177 select TRIZEPS_PCMCIA
182 select PXA27x 178 select PXA27x
183 select PXA_SSP
184 179
185choice 180choice
186 prompt "Select base board for Trizeps module" 181 prompt "Select base board for Trizeps module"
@@ -217,7 +212,6 @@ config MACH_PCM027
217 bool "Phytec phyCORE-PXA270 CPU module (PCM-027)" 212 bool "Phytec phyCORE-PXA270 CPU module (PCM-027)"
218 select PXA27x 213 select PXA27x
219 select IWMMXT 214 select IWMMXT
220 select PXA_SSP
221 select PXA_HAVE_BOARD_IRQS 215 select PXA_HAVE_BOARD_IRQS
222 216
223config MACH_PCM990_BASEBOARD 217config MACH_PCM990_BASEBOARD
@@ -255,13 +249,19 @@ config MACH_COLIBRI320
255 select PXA3xx 249 select PXA3xx
256 select CPU_PXA320 250 select CPU_PXA320
257 251
252config MACH_VPAC270
253 bool "Voipac PXA270"
254 select PXA27x
255 select HAVE_PATA_PLATFORM
256 help
257 PXA270 based Single Board Computer.
258
258comment "End-user Products (sorted by vendor name)" 259comment "End-user Products (sorted by vendor name)"
259 260
260config MACH_H4700 261config MACH_H4700
261 bool "HP iPAQ hx4700" 262 bool "HP iPAQ hx4700"
262 select PXA27x 263 select PXA27x
263 select IWMMXT 264 select IWMMXT
264 select PXA_SSP
265 select HAVE_PWM 265 select HAVE_PWM
266 select PXA_HAVE_BOARD_IRQS 266 select PXA_HAVE_BOARD_IRQS
267 267
@@ -277,7 +277,6 @@ config MACH_MAGICIAN
277 bool "Enable HTC Magician Support" 277 bool "Enable HTC Magician Support"
278 select PXA27x 278 select PXA27x
279 select IWMMXT 279 select IWMMXT
280 select PXA_SSP
281 select HAVE_PWM 280 select HAVE_PWM
282 select PXA_HAVE_BOARD_IRQS 281 select PXA_HAVE_BOARD_IRQS
283 282
@@ -431,13 +430,11 @@ config MACH_RAUMFELD_CONNECTOR
431 bool "Raumfeld Connector" 430 bool "Raumfeld Connector"
432 select PXA3xx 431 select PXA3xx
433 select CPU_PXA300 432 select CPU_PXA300
434 select PXA_SSP
435 433
436config MACH_RAUMFELD_SPEAKER 434config MACH_RAUMFELD_SPEAKER
437 bool "Raumfeld Speaker" 435 bool "Raumfeld Speaker"
438 select PXA3xx 436 select PXA3xx
439 select CPU_PXA300 437 select CPU_PXA300
440 select PXA_SSP
441 438
442config PXA_SHARPSL 439config PXA_SHARPSL
443 bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models" 440 bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models"
@@ -461,21 +458,11 @@ config SHARPSL_PM_MAX1111
461 select HWMON 458 select HWMON
462 select SENSORS_MAX1111 459 select SENSORS_MAX1111
463 460
464config CORGI_SSP_DEPRECATED
465 bool
466 select PXA_SSP
467 select PXA_SSP_LEGACY
468 help
469 This option will include corgi_ssp.c and corgi_lcd.c
470 that corgi_ts.c and other legacy drivers (corgi_bl.c
471 and sharpsl_pm.c) may depend on.
472
473config MACH_POODLE 461config MACH_POODLE
474 bool "Enable Sharp SL-5600 (Poodle) Support" 462 bool "Enable Sharp SL-5600 (Poodle) Support"
475 depends on PXA_SHARPSL 463 depends on PXA_SHARPSL
476 select PXA25x 464 select PXA25x
477 select SHARP_LOCOMO 465 select SHARP_LOCOMO
478 select PXA_SSP
479 select PXA_HAVE_BOARD_IRQS 466 select PXA_HAVE_BOARD_IRQS
480 467
481config MACH_CORGI 468config MACH_CORGI
@@ -581,6 +568,12 @@ config MACH_E800
581 Say Y here if you intend to run this kernel on a Toshiba 568 Say Y here if you intend to run this kernel on a Toshiba
582 e800 family PDA. 569 e800 family PDA.
583 570
571config MACH_ZIPIT2
572 bool "Zipit Z2 Handheld"
573 select PXA27x
574 select HAVE_PWM
575 select PXA_HAVE_BOARD_IRQS
576
584endmenu 577endmenu
585 578
586config PXA25x 579config PXA25x
@@ -645,28 +638,16 @@ config CPU_PXA950
645 638
646config PXA_SHARP_C7xx 639config PXA_SHARP_C7xx
647 bool 640 bool
648 select PXA_SSP
649 select SHARPSL_PM 641 select SHARPSL_PM
650 help 642 help
651 Enable support for all Sharp C7xx models 643 Enable support for all Sharp C7xx models
652 644
653config PXA_SHARP_Cxx00 645config PXA_SHARP_Cxx00
654 bool 646 bool
655 select PXA_SSP
656 select SHARPSL_PM 647 select SHARPSL_PM
657 help 648 help
658 Enable common support for Sharp Cxx00 models 649 Enable common support for Sharp Cxx00 models
659 650
660config PXA_SSP
661 tristate
662 help
663 Enable support for PXA2xx SSP ports
664
665config PXA_SSP_LEGACY
666 bool
667 help
668 Support of legacy SSP API
669
670config TOSA_BT 651config TOSA_BT
671 tristate "Control the state of built-in bluetooth chip on Sharp SL-6000" 652 tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
672 depends on MACH_TOSA 653 depends on MACH_TOSA
@@ -675,6 +656,18 @@ config TOSA_BT
675 This is a simple driver that is able to control 656 This is a simple driver that is able to control
676 the state of built in bluetooth chip on tosa. 657 the state of built in bluetooth chip on tosa.
677 658
659config TOSA_USE_EXT_KEYCODES
660 bool "Tosa keyboard: use extended keycodes"
661 depends on MACH_TOSA
662 default n
663 help
664 Say Y here to enable the tosa keyboard driver to generate extended
665 (>= 127) keycodes. Be aware, that they can't be correctly interpreted
666 by either console keyboard driver or by Kdrive keybd driver.
667
668 Say Y only if you know, what you are doing!
669
670
678config PXA_HAVE_BOARD_IRQS 671config PXA_HAVE_BOARD_IRQS
679 bool 672 bool
680 673
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 86bc87b7f2dd..b8f1f4bc7ca7 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -14,7 +14,6 @@ obj-$(CONFIG_PXA3xx) += cpufreq-pxa3xx.o
14endif 14endif
15 15
16# Generic drivers that other drivers may depend upon 16# Generic drivers that other drivers may depend upon
17obj-$(CONFIG_PXA_SSP) += ssp.o
18 17
19# SoC-specific code 18# SoC-specific code
20obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa2xx.o pxa25x.o 19obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa2xx.o pxa25x.o
@@ -62,6 +61,7 @@ obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o
62obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o 61obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o
63obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o 62obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o
64obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o 63obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o
64obj-$(CONFIG_MACH_VPAC270) += vpac270.o
65 65
66# End-user Products 66# End-user Products
67obj-$(CONFIG_MACH_H4700) += hx4700.o 67obj-$(CONFIG_MACH_H4700) += hx4700.o
@@ -80,7 +80,6 @@ obj-$(CONFIG_MACH_PALMLD) += palmld.o
80obj-$(CONFIG_PALM_TREO) += palmtreo.o 80obj-$(CONFIG_PALM_TREO) += palmtreo.o
81obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o 81obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o
82obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o 82obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o
83obj-$(CONFIG_CORGI_SSP_DEPRECATED) += corgi_ssp.o corgi_lcd.o
84obj-$(CONFIG_MACH_POODLE) += poodle.o 83obj-$(CONFIG_MACH_POODLE) += poodle.o
85obj-$(CONFIG_MACH_TOSA) += tosa.o 84obj-$(CONFIG_MACH_TOSA) += tosa.o
86obj-$(CONFIG_MACH_ICONTROL) += icontrol.o mxm8x10.o 85obj-$(CONFIG_MACH_ICONTROL) += icontrol.o mxm8x10.o
@@ -94,6 +93,7 @@ obj-$(CONFIG_MACH_E800) += e800.o
94obj-$(CONFIG_MACH_RAUMFELD_RC) += raumfeld.o 93obj-$(CONFIG_MACH_RAUMFELD_RC) += raumfeld.o
95obj-$(CONFIG_MACH_RAUMFELD_CONNECTOR) += raumfeld.o 94obj-$(CONFIG_MACH_RAUMFELD_CONNECTOR) += raumfeld.o
96obj-$(CONFIG_MACH_RAUMFELD_SPEAKER) += raumfeld.o 95obj-$(CONFIG_MACH_RAUMFELD_SPEAKER) += raumfeld.o
96obj-$(CONFIG_MACH_ZIPIT2) += z2.o
97 97
98# Support for blinky lights 98# Support for blinky lights
99led-y := leds.o 99led-y := leds.o
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index d37cfa132a65..fdda6be6c391 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -30,6 +30,9 @@
30#include <linux/i2c/pca953x.h> 30#include <linux/i2c/pca953x.h>
31 31
32#include <linux/mfd/da903x.h> 32#include <linux/mfd/da903x.h>
33#include <linux/regulator/machine.h>
34#include <linux/power_supply.h>
35#include <linux/apm-emulation.h>
33 36
34#include <linux/spi/spi.h> 37#include <linux/spi/spi.h>
35#include <linux/spi/spi_gpio.h> 38#include <linux/spi/spi_gpio.h>
@@ -430,7 +433,7 @@ static inline void cm_x300_init_nand(void) {}
430 433
431#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE) 434#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
432static struct pxamci_platform_data cm_x300_mci_platform_data = { 435static struct pxamci_platform_data cm_x300_mci_platform_data = {
433 .detect_delay = 20, 436 .detect_delay_ms = 200,
434 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 437 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
435 .gpio_card_detect = GPIO82_MMC_IRQ, 438 .gpio_card_detect = GPIO82_MMC_IRQ,
436 .gpio_card_ro = GPIO85_MMC_WP, 439 .gpio_card_ro = GPIO85_MMC_WP,
@@ -451,7 +454,7 @@ static void cm_x300_mci2_exit(struct device *dev, void *data)
451} 454}
452 455
453static struct pxamci_platform_data cm_x300_mci2_platform_data = { 456static struct pxamci_platform_data cm_x300_mci2_platform_data = {
454 .detect_delay = 20, 457 .detect_delay_ms = 200,
455 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 458 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
456 .init = cm_x300_mci2_init, 459 .init = cm_x300_mci2_init,
457 .exit = cm_x300_mci2_exit, 460 .exit = cm_x300_mci2_exit,
@@ -584,12 +587,87 @@ static void __init cm_x300_init_rtc(void)
584static inline void cm_x300_init_rtc(void) {} 587static inline void cm_x300_init_rtc(void) {}
585#endif 588#endif
586 589
590/* Battery */
591struct power_supply_info cm_x300_psy_info = {
592 .name = "battery",
593 .technology = POWER_SUPPLY_TECHNOLOGY_LIPO,
594 .voltage_max_design = 4200000,
595 .voltage_min_design = 3000000,
596 .use_for_apm = 1,
597};
598
599static void cm_x300_battery_low(void)
600{
601#if defined(CONFIG_APM_EMULATION)
602 apm_queue_event(APM_LOW_BATTERY);
603#endif
604}
605
606static void cm_x300_battery_critical(void)
607{
608#if defined(CONFIG_APM_EMULATION)
609 apm_queue_event(APM_CRITICAL_SUSPEND);
610#endif
611}
612
613struct da9030_battery_info cm_x300_battery_info = {
614 .battery_info = &cm_x300_psy_info,
615
616 .charge_milliamp = 1000,
617 .charge_millivolt = 4200,
618
619 .vbat_low = 3600,
620 .vbat_crit = 3400,
621 .vbat_charge_start = 4100,
622 .vbat_charge_stop = 4200,
623 .vbat_charge_restart = 4000,
624
625 .vcharge_min = 3200,
626 .vcharge_max = 5500,
627
628 .tbat_low = 197,
629 .tbat_high = 78,
630 .tbat_restart = 100,
631
632 .batmon_interval = 0,
633
634 .battery_low = cm_x300_battery_low,
635 .battery_critical = cm_x300_battery_critical,
636};
637
638static struct regulator_consumer_supply buck2_consumers[] = {
639 {
640 .dev = NULL,
641 .supply = "vcc_core",
642 },
643};
644
645static struct regulator_init_data buck2_data = {
646 .constraints = {
647 .min_uV = 1375000,
648 .max_uV = 1375000,
649 .state_mem = {
650 .enabled = 0,
651 },
652 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
653 .apply_uV = 1,
654 },
655 .num_consumer_supplies = ARRAY_SIZE(buck2_consumers),
656 .consumer_supplies = buck2_consumers,
657};
658
587/* DA9030 */ 659/* DA9030 */
588struct da903x_subdev_info cm_x300_da9030_subdevs[] = { 660struct da903x_subdev_info cm_x300_da9030_subdevs[] = {
589 { 661 {
590 .name = "da903x-backlight", 662 .name = "da903x-battery",
591 .id = DA9030_ID_WLED, 663 .id = DA9030_ID_BAT,
592 } 664 .platform_data = &cm_x300_battery_info,
665 },
666 {
667 .name = "da903x-regulator",
668 .id = DA9030_ID_BUCK2,
669 .platform_data = &buck2_data,
670 },
593}; 671};
594 672
595static struct da903x_platform_data cm_x300_da9030_info = { 673static struct da903x_platform_data cm_x300_da9030_info = {
@@ -599,7 +677,7 @@ static struct da903x_platform_data cm_x300_da9030_info = {
599 677
600static struct i2c_board_info cm_x300_pmic_info = { 678static struct i2c_board_info cm_x300_pmic_info = {
601 I2C_BOARD_INFO("da9030", 0x49), 679 I2C_BOARD_INFO("da9030", 0x49),
602 .irq = IRQ_GPIO(0), 680 .irq = IRQ_WAKEUP0,
603 .platform_data = &cm_x300_da9030_info, 681 .platform_data = &cm_x300_da9030_info,
604}; 682};
605 683
@@ -689,13 +767,13 @@ static void __init cm_x300_init(void)
689static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags, 767static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags,
690 char **cmdline, struct meminfo *mi) 768 char **cmdline, struct meminfo *mi)
691{ 769{
692 mi->nr_banks = 2; 770 /* Make sure that mi->bank[0].start = PHYS_ADDR */
693 mi->bank[0].start = 0xa0000000; 771 for (; tags->hdr.size; tags = tag_next(tags))
694 mi->bank[0].node = 0; 772 if (tags->hdr.tag == ATAG_MEM &&
695 mi->bank[0].size = (64*1024*1024); 773 tags->u.mem.start == 0x80000000) {
696 mi->bank[1].start = 0xc0000000; 774 tags->u.mem.start = 0xa0000000;
697 mi->bank[1].node = 0; 775 break;
698 mi->bank[1].size = (64*1024*1024); 776 }
699} 777}
700 778
701MACHINE_START(CM_X300, "CM-X300 module") 779MACHINE_START(CM_X300, "CM-X300 module")
diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c
index e6c0a2287eb8..199afa2ae303 100644
--- a/arch/arm/mach-pxa/colibri-pxa3xx.c
+++ b/arch/arm/mach-pxa/colibri-pxa3xx.c
@@ -96,7 +96,7 @@ static void colibri_pxa3xx_mci_exit(struct device *dev, void *data)
96} 96}
97 97
98static struct pxamci_platform_data colibri_pxa3xx_mci_platform_data = { 98static struct pxamci_platform_data colibri_pxa3xx_mci_platform_data = {
99 .detect_delay = 20, 99 .detect_delay_ms = 200,
100 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 100 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
101 .init = colibri_pxa3xx_mci_init, 101 .init = colibri_pxa3xx_mci_init,
102 .exit = colibri_pxa3xx_mci_exit, 102 .exit = colibri_pxa3xx_mci_exit,
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index da3156d8690b..3d1dcb9ac08f 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -106,18 +106,18 @@ static unsigned long corgi_pin_config[] __initdata = {
106 GPIO8_MMC_CS0, 106 GPIO8_MMC_CS0,
107 107
108 /* GPIO Matrix Keypad */ 108 /* GPIO Matrix Keypad */
109 GPIO66_GPIO, /* column 0 */ 109 GPIO66_GPIO | MFP_LPM_DRIVE_HIGH, /* column 0 */
110 GPIO67_GPIO, /* column 1 */ 110 GPIO67_GPIO | MFP_LPM_DRIVE_HIGH, /* column 1 */
111 GPIO68_GPIO, /* column 2 */ 111 GPIO68_GPIO | MFP_LPM_DRIVE_HIGH, /* column 2 */
112 GPIO69_GPIO, /* column 3 */ 112 GPIO69_GPIO | MFP_LPM_DRIVE_HIGH, /* column 3 */
113 GPIO70_GPIO, /* column 4 */ 113 GPIO70_GPIO | MFP_LPM_DRIVE_HIGH, /* column 4 */
114 GPIO71_GPIO, /* column 5 */ 114 GPIO71_GPIO | MFP_LPM_DRIVE_HIGH, /* column 5 */
115 GPIO72_GPIO, /* column 6 */ 115 GPIO72_GPIO | MFP_LPM_DRIVE_HIGH, /* column 6 */
116 GPIO73_GPIO, /* column 7 */ 116 GPIO73_GPIO | MFP_LPM_DRIVE_HIGH, /* column 7 */
117 GPIO74_GPIO, /* column 8 */ 117 GPIO74_GPIO | MFP_LPM_DRIVE_HIGH, /* column 8 */
118 GPIO75_GPIO, /* column 9 */ 118 GPIO75_GPIO | MFP_LPM_DRIVE_HIGH, /* column 9 */
119 GPIO76_GPIO, /* column 10 */ 119 GPIO76_GPIO | MFP_LPM_DRIVE_HIGH, /* column 10 */
120 GPIO77_GPIO, /* column 11 */ 120 GPIO77_GPIO | MFP_LPM_DRIVE_HIGH, /* column 11 */
121 GPIO58_GPIO, /* row 0 */ 121 GPIO58_GPIO, /* row 0 */
122 GPIO59_GPIO, /* row 1 */ 122 GPIO59_GPIO, /* row 1 */
123 GPIO60_GPIO, /* row 2 */ 123 GPIO60_GPIO, /* row 2 */
@@ -128,13 +128,20 @@ static unsigned long corgi_pin_config[] __initdata = {
128 GPIO65_GPIO, /* row 7 */ 128 GPIO65_GPIO, /* row 7 */
129 129
130 /* GPIO */ 130 /* GPIO */
131 GPIO9_GPIO, /* CORGI_GPIO_nSD_DETECT */ 131 GPIO9_GPIO, /* CORGI_GPIO_nSD_DETECT */
132 GPIO7_GPIO, /* CORGI_GPIO_nSD_WP */ 132 GPIO7_GPIO, /* CORGI_GPIO_nSD_WP */
133 GPIO33_GPIO, /* CORGI_GPIO_SD_PWR */ 133 GPIO11_GPIO | WAKEUP_ON_EDGE_BOTH, /* CORGI_GPIO_MAIN_BAT_{LOW,COVER} */
134 GPIO22_GPIO, /* CORGI_GPIO_IR_ON */ 134 GPIO13_GPIO | MFP_LPM_KEEP_OUTPUT, /* CORGI_GPIO_LED_ORANGE */
135 GPIO44_GPIO, /* CORGI_GPIO_HSYNC */ 135 GPIO21_GPIO, /* CORGI_GPIO_ADC_TEMP */
136 136 GPIO22_GPIO, /* CORGI_GPIO_IR_ON */
137 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, 137 GPIO33_GPIO, /* CORGI_GPIO_SD_PWR */
138 GPIO38_GPIO | MFP_LPM_KEEP_OUTPUT, /* CORGI_GPIO_CHRG_ON */
139 GPIO43_GPIO | MFP_LPM_KEEP_OUTPUT, /* CORGI_GPIO_CHRG_UKN */
140 GPIO44_GPIO, /* CORGI_GPIO_HSYNC */
141
142 GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, /* CORGI_GPIO_KEY_INT */
143 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* CORGI_GPIO_AC_IN */
144 GPIO3_GPIO | WAKEUP_ON_EDGE_BOTH, /* CORGI_GPIO_WAKEUP */
138}; 145};
139 146
140/* 147/*
@@ -437,6 +444,7 @@ static struct platform_device corgiled_device = {
437 * to give the card a chance to fully insert/eject. 444 * to give the card a chance to fully insert/eject.
438 */ 445 */
439static struct pxamci_platform_data corgi_mci_platform_data = { 446static struct pxamci_platform_data corgi_mci_platform_data = {
447 .detect_delay_ms = 250,
440 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 448 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
441 .gpio_card_detect = -1, 449 .gpio_card_detect = -1,
442 .gpio_card_ro = CORGI_GPIO_nSD_WP, 450 .gpio_card_ro = CORGI_GPIO_nSD_WP,
@@ -672,6 +680,15 @@ static void __init corgi_init(void)
672 680
673 pxa2xx_mfp_config(ARRAY_AND_SIZE(corgi_pin_config)); 681 pxa2xx_mfp_config(ARRAY_AND_SIZE(corgi_pin_config));
674 682
683 /* allow wakeup from various GPIOs */
684 gpio_set_wake(CORGI_GPIO_KEY_INT, 1);
685 gpio_set_wake(CORGI_GPIO_WAKEUP, 1);
686 gpio_set_wake(CORGI_GPIO_AC_IN, 1);
687 gpio_set_wake(CORGI_GPIO_CHRG_FULL, 1);
688
689 if (!machine_is_corgi())
690 gpio_set_wake(CORGI_GPIO_MAIN_BAT_LOW, 1);
691
675 pxa_set_ffuart_info(NULL); 692 pxa_set_ffuart_info(NULL);
676 pxa_set_btuart_info(NULL); 693 pxa_set_btuart_info(NULL);
677 pxa_set_stuart_info(NULL); 694 pxa_set_stuart_info(NULL);
@@ -679,7 +696,6 @@ static void __init corgi_init(void)
679 corgi_init_spi(); 696 corgi_init_spi();
680 697
681 pxa_set_udc_info(&udc_info); 698 pxa_set_udc_info(&udc_info);
682 corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250);
683 pxa_set_mci_info(&corgi_mci_platform_data); 699 pxa_set_mci_info(&corgi_mci_platform_data);
684 pxa_set_ficp_info(&corgi_ficp_platform_data); 700 pxa_set_ficp_info(&corgi_ficp_platform_data);
685 pxa_set_i2c_info(NULL); 701 pxa_set_i2c_info(NULL);
diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c
deleted file mode 100644
index d9b96319d498..000000000000
--- a/arch/arm/mach-pxa/corgi_lcd.c
+++ /dev/null
@@ -1,288 +0,0 @@
1/*
2 * linux/arch/arm/mach-pxa/corgi_lcd.c
3 *
4 * Corgi/Spitz LCD Specific Code
5 *
6 * Copyright (C) 2005 Richard Purdie
7 *
8 * Connectivity:
9 * Corgi - LCD to ATI Imageon w100 (Wallaby)
10 * Spitz - LCD to PXA Framebuffer
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 */
17
18#include <linux/delay.h>
19#include <linux/kernel.h>
20#include <linux/platform_device.h>
21#include <linux/module.h>
22#include <linux/string.h>
23#include <mach/corgi.h>
24#include <mach/hardware.h>
25#include <mach/sharpsl.h>
26#include <mach/spitz.h>
27#include <asm/hardware/scoop.h>
28#include <asm/mach/sharpsl_param.h>
29#include "generic.h"
30
31/* Register Addresses */
32#define RESCTL_ADRS 0x00
33#define PHACTRL_ADRS 0x01
34#define DUTYCTRL_ADRS 0x02
35#define POWERREG0_ADRS 0x03
36#define POWERREG1_ADRS 0x04
37#define GPOR3_ADRS 0x05
38#define PICTRL_ADRS 0x06
39#define POLCTRL_ADRS 0x07
40
41/* Register Bit Definitions */
42#define RESCTL_QVGA 0x01
43#define RESCTL_VGA 0x00
44
45#define POWER1_VW_ON 0x01 /* VW Supply FET ON */
46#define POWER1_GVSS_ON 0x02 /* GVSS(-8V) Power Supply ON */
47#define POWER1_VDD_ON 0x04 /* VDD(8V),SVSS(-4V) Power Supply ON */
48
49#define POWER1_VW_OFF 0x00 /* VW Supply FET OFF */
50#define POWER1_GVSS_OFF 0x00 /* GVSS(-8V) Power Supply OFF */
51#define POWER1_VDD_OFF 0x00 /* VDD(8V),SVSS(-4V) Power Supply OFF */
52
53#define POWER0_COM_DCLK 0x01 /* COM Voltage DC Bias DAC Serial Data Clock */
54#define POWER0_COM_DOUT 0x02 /* COM Voltage DC Bias DAC Serial Data Out */
55#define POWER0_DAC_ON 0x04 /* DAC Power Supply ON */
56#define POWER0_COM_ON 0x08 /* COM Power Supply ON */
57#define POWER0_VCC5_ON 0x10 /* VCC5 Power Supply ON */
58
59#define POWER0_DAC_OFF 0x00 /* DAC Power Supply OFF */
60#define POWER0_COM_OFF 0x00 /* COM Power Supply OFF */
61#define POWER0_VCC5_OFF 0x00 /* VCC5 Power Supply OFF */
62
63#define PICTRL_INIT_STATE 0x01
64#define PICTRL_INIOFF 0x02
65#define PICTRL_POWER_DOWN 0x04
66#define PICTRL_COM_SIGNAL_OFF 0x08
67#define PICTRL_DAC_SIGNAL_OFF 0x10
68
69#define POLCTRL_SYNC_POL_FALL 0x01
70#define POLCTRL_EN_POL_FALL 0x02
71#define POLCTRL_DATA_POL_FALL 0x04
72#define POLCTRL_SYNC_ACT_H 0x08
73#define POLCTRL_EN_ACT_L 0x10
74
75#define POLCTRL_SYNC_POL_RISE 0x00
76#define POLCTRL_EN_POL_RISE 0x00
77#define POLCTRL_DATA_POL_RISE 0x00
78#define POLCTRL_SYNC_ACT_L 0x00
79#define POLCTRL_EN_ACT_H 0x00
80
81#define PHACTRL_PHASE_MANUAL 0x01
82#define DEFAULT_PHAD_QVGA (9)
83#define DEFAULT_COMADJ (125)
84
85/*
86 * This is only a psuedo I2C interface. We can't use the standard kernel
87 * routines as the interface is write only. We just assume the data is acked...
88 */
89static void lcdtg_ssp_i2c_send(u8 data)
90{
91 corgi_ssp_lcdtg_send(POWERREG0_ADRS, data);
92 udelay(10);
93}
94
95static void lcdtg_i2c_send_bit(u8 data)
96{
97 lcdtg_ssp_i2c_send(data);
98 lcdtg_ssp_i2c_send(data | POWER0_COM_DCLK);
99 lcdtg_ssp_i2c_send(data);
100}
101
102static void lcdtg_i2c_send_start(u8 base)
103{
104 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT);
105 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK);
106 lcdtg_ssp_i2c_send(base);
107}
108
109static void lcdtg_i2c_send_stop(u8 base)
110{
111 lcdtg_ssp_i2c_send(base);
112 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK);
113 lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT);
114}
115
116static void lcdtg_i2c_send_byte(u8 base, u8 data)
117{
118 int i;
119 for (i = 0; i < 8; i++) {
120 if (data & 0x80)
121 lcdtg_i2c_send_bit(base | POWER0_COM_DOUT);
122 else
123 lcdtg_i2c_send_bit(base);
124 data <<= 1;
125 }
126}
127
128static void lcdtg_i2c_wait_ack(u8 base)
129{
130 lcdtg_i2c_send_bit(base);
131}
132
133static void lcdtg_set_common_voltage(u8 base_data, u8 data)
134{
135 /* Set Common Voltage to M62332FP via I2C */
136 lcdtg_i2c_send_start(base_data);
137 lcdtg_i2c_send_byte(base_data, 0x9c);
138 lcdtg_i2c_wait_ack(base_data);
139 lcdtg_i2c_send_byte(base_data, 0x00);
140 lcdtg_i2c_wait_ack(base_data);
141 lcdtg_i2c_send_byte(base_data, data);
142 lcdtg_i2c_wait_ack(base_data);
143 lcdtg_i2c_send_stop(base_data);
144}
145
146/* Set Phase Adjust */
147static void lcdtg_set_phadadj(int mode)
148{
149 int adj;
150 switch(mode) {
151 case 480:
152 case 640:
153 /* Setting for VGA */
154 adj = sharpsl_param.phadadj;
155 if (adj < 0) {
156 adj = PHACTRL_PHASE_MANUAL;
157 } else {
158 adj = ((adj & 0x0f) << 1) | PHACTRL_PHASE_MANUAL;
159 }
160 break;
161 case 240:
162 case 320:
163 default:
164 /* Setting for QVGA */
165 adj = (DEFAULT_PHAD_QVGA << 1) | PHACTRL_PHASE_MANUAL;
166 break;
167 }
168
169 corgi_ssp_lcdtg_send(PHACTRL_ADRS, adj);
170}
171
172static int lcd_inited;
173
174void corgi_lcdtg_hw_init(int mode)
175{
176 if (!lcd_inited) {
177 int comadj;
178
179 /* Initialize Internal Logic & Port */
180 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_POWER_DOWN | PICTRL_INIOFF | PICTRL_INIT_STATE
181 | PICTRL_COM_SIGNAL_OFF | PICTRL_DAC_SIGNAL_OFF);
182
183 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_OFF
184 | POWER0_COM_OFF | POWER0_VCC5_OFF);
185
186 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);
187
188 /* VDD(+8V), SVSS(-4V) ON */
189 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
190 mdelay(3);
191
192 /* DAC ON */
193 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON
194 | POWER0_COM_OFF | POWER0_VCC5_OFF);
195
196 /* INIB = H, INI = L */
197 /* PICTL[0] = H , PICTL[1] = PICTL[2] = PICTL[4] = L */
198 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE | PICTRL_COM_SIGNAL_OFF);
199
200 /* Set Common Voltage */
201 comadj = sharpsl_param.comadj;
202 if (comadj < 0)
203 comadj = DEFAULT_COMADJ;
204 lcdtg_set_common_voltage((POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF), comadj);
205
206 /* VCC5 ON, DAC ON */
207 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON |
208 POWER0_COM_OFF | POWER0_VCC5_ON);
209
210 /* GVSS(-8V) ON, VDD ON */
211 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
212 mdelay(2);
213
214 /* COM SIGNAL ON (PICTL[3] = L) */
215 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE);
216
217 /* COM ON, DAC ON, VCC5_ON */
218 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON
219 | POWER0_COM_ON | POWER0_VCC5_ON);
220
221 /* VW ON, GVSS ON, VDD ON */
222 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_ON | POWER1_GVSS_ON | POWER1_VDD_ON);
223
224 /* Signals output enable */
225 corgi_ssp_lcdtg_send(PICTRL_ADRS, 0);
226
227 /* Set Phase Adjust */
228 lcdtg_set_phadadj(mode);
229
230 /* Initialize for Input Signals from ATI */
231 corgi_ssp_lcdtg_send(POLCTRL_ADRS, POLCTRL_SYNC_POL_RISE | POLCTRL_EN_POL_RISE
232 | POLCTRL_DATA_POL_RISE | POLCTRL_SYNC_ACT_L | POLCTRL_EN_ACT_H);
233 udelay(1000);
234
235 lcd_inited=1;
236 } else {
237 lcdtg_set_phadadj(mode);
238 }
239
240 switch(mode) {
241 case 480:
242 case 640:
243 /* Set Lcd Resolution (VGA) */
244 corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_VGA);
245 break;
246 case 240:
247 case 320:
248 default:
249 /* Set Lcd Resolution (QVGA) */
250 corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_QVGA);
251 break;
252 }
253}
254
255void corgi_lcdtg_suspend(void)
256{
257 /* 60Hz x 2 frame = 16.7msec x 2 = 33.4 msec */
258 mdelay(34);
259
260 /* (1)VW OFF */
261 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
262
263 /* (2)COM OFF */
264 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_COM_SIGNAL_OFF);
265 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON);
266
267 /* (3)Set Common Voltage Bias 0V */
268 lcdtg_set_common_voltage(POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON, 0);
269
270 /* (4)GVSS OFF */
271 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
272
273 /* (5)VCC5 OFF */
274 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF);
275
276 /* (6)Set PDWN, INIOFF, DACOFF */
277 corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIOFF | PICTRL_DAC_SIGNAL_OFF |
278 PICTRL_POWER_DOWN | PICTRL_COM_SIGNAL_OFF);
279
280 /* (7)DAC OFF */
281 corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_OFF | POWER0_COM_OFF | POWER0_VCC5_OFF);
282
283 /* (8)VDD OFF */
284 corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);
285
286 lcd_inited = 0;
287}
288
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index d4a0733e905b..3f1dc74ac048 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -14,6 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/delay.h> 16#include <linux/delay.h>
17#include <linux/gpio.h>
17#include <linux/interrupt.h> 18#include <linux/interrupt.h>
18#include <linux/platform_device.h> 19#include <linux/platform_device.h>
19#include <linux/apm-emulation.h> 20#include <linux/apm-emulation.h>
@@ -25,7 +26,8 @@
25#include <mach/sharpsl.h> 26#include <mach/sharpsl.h>
26#include <mach/corgi.h> 27#include <mach/corgi.h>
27#include <mach/pxa2xx-regs.h> 28#include <mach/pxa2xx-regs.h>
28#include <mach/pxa2xx-gpio.h> 29
30#include "generic.h"
29#include "sharpsl.h" 31#include "sharpsl.h"
30 32
31#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ 33#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */
@@ -35,87 +37,46 @@
35#define SHARPSL_FATAL_ACIN_VOLT 182 /* 3.45V */ 37#define SHARPSL_FATAL_ACIN_VOLT 182 /* 3.45V */
36#define SHARPSL_FATAL_NOACIN_VOLT 170 /* 3.40V */ 38#define SHARPSL_FATAL_NOACIN_VOLT 170 /* 3.40V */
37 39
40static struct gpio charger_gpios[] = {
41 { CORGI_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },
42 { CORGI_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" },
43 { CORGI_GPIO_CHRG_UKN, GPIOF_OUT_INIT_LOW, "Charger Unknown" },
44 { CORGI_GPIO_KEY_INT, GPIOF_IN, "Key Interrupt" },
45};
46
38static void corgi_charger_init(void) 47static void corgi_charger_init(void)
39{ 48{
40 pxa_gpio_mode(CORGI_GPIO_ADC_TEMP_ON | GPIO_OUT); 49 gpio_request_array(ARRAY_AND_SIZE(charger_gpios));
41 pxa_gpio_mode(CORGI_GPIO_CHRG_ON | GPIO_OUT);
42 pxa_gpio_mode(CORGI_GPIO_CHRG_UKN | GPIO_OUT);
43 pxa_gpio_mode(CORGI_GPIO_KEY_INT | GPIO_IN);
44} 50}
45 51
46static void corgi_measure_temp(int on) 52static void corgi_measure_temp(int on)
47{ 53{
48 if (on) 54 gpio_set_value(CORGI_GPIO_ADC_TEMP_ON, on);
49 GPSR(CORGI_GPIO_ADC_TEMP_ON) = GPIO_bit(CORGI_GPIO_ADC_TEMP_ON);
50 else
51 GPCR(CORGI_GPIO_ADC_TEMP_ON) = GPIO_bit(CORGI_GPIO_ADC_TEMP_ON);
52} 55}
53 56
54static void corgi_charge(int on) 57static void corgi_charge(int on)
55{ 58{
56 if (on) { 59 if (on) {
57 if (machine_is_corgi() && (sharpsl_pm.flags & SHARPSL_SUSPENDED)) { 60 if (machine_is_corgi() && (sharpsl_pm.flags & SHARPSL_SUSPENDED)) {
58 GPCR(CORGI_GPIO_CHRG_ON) = GPIO_bit(CORGI_GPIO_CHRG_ON); 61 gpio_set_value(CORGI_GPIO_CHRG_ON, 0);
59 GPSR(CORGI_GPIO_CHRG_UKN) = GPIO_bit(CORGI_GPIO_CHRG_UKN); 62 gpio_set_value(CORGI_GPIO_CHRG_UKN, 1);
60 } else { 63 } else {
61 GPSR(CORGI_GPIO_CHRG_ON) = GPIO_bit(CORGI_GPIO_CHRG_ON); 64 gpio_set_value(CORGI_GPIO_CHRG_ON, 1);
62 GPCR(CORGI_GPIO_CHRG_UKN) = GPIO_bit(CORGI_GPIO_CHRG_UKN); 65 gpio_set_value(CORGI_GPIO_CHRG_UKN, 0);
63 } 66 }
64 } else { 67 } else {
65 GPCR(CORGI_GPIO_CHRG_ON) = GPIO_bit(CORGI_GPIO_CHRG_ON); 68 gpio_set_value(CORGI_GPIO_CHRG_ON, 0);
66 GPCR(CORGI_GPIO_CHRG_UKN) = GPIO_bit(CORGI_GPIO_CHRG_UKN); 69 gpio_set_value(CORGI_GPIO_CHRG_UKN, 0);
67 } 70 }
68} 71}
69 72
70static void corgi_discharge(int on) 73static void corgi_discharge(int on)
71{ 74{
72 if (on) 75 gpio_set_value(CORGI_GPIO_DISCHARGE_ON, on);
73 GPSR(CORGI_GPIO_DISCHARGE_ON) = GPIO_bit(CORGI_GPIO_DISCHARGE_ON);
74 else
75 GPCR(CORGI_GPIO_DISCHARGE_ON) = GPIO_bit(CORGI_GPIO_DISCHARGE_ON);
76} 76}
77 77
78static void corgi_presuspend(void) 78static void corgi_presuspend(void)
79{ 79{
80 int i;
81 unsigned long wakeup_mask;
82
83 /* charging , so CHARGE_ON bit is HIGH during OFF. */
84 if (READ_GPIO_BIT(CORGI_GPIO_CHRG_ON))
85 PGSR1 |= GPIO_bit(CORGI_GPIO_CHRG_ON);
86 else
87 PGSR1 &= ~GPIO_bit(CORGI_GPIO_CHRG_ON);
88
89 if (READ_GPIO_BIT(CORGI_GPIO_LED_ORANGE))
90 PGSR0 |= GPIO_bit(CORGI_GPIO_LED_ORANGE);
91 else
92 PGSR0 &= ~GPIO_bit(CORGI_GPIO_LED_ORANGE);
93
94 if (READ_GPIO_BIT(CORGI_GPIO_CHRG_UKN))
95 PGSR1 |= GPIO_bit(CORGI_GPIO_CHRG_UKN);
96 else
97 PGSR1 &= ~GPIO_bit(CORGI_GPIO_CHRG_UKN);
98
99 /* Resume on keyboard power key */
100 PGSR2 = (PGSR2 & ~CORGI_GPIO_ALL_STROBE_BIT) | CORGI_GPIO_STROBE_BIT(0);
101
102 wakeup_mask = GPIO_bit(CORGI_GPIO_KEY_INT) | GPIO_bit(CORGI_GPIO_WAKEUP) | GPIO_bit(CORGI_GPIO_AC_IN) | GPIO_bit(CORGI_GPIO_CHRG_FULL);
103
104 if (!machine_is_corgi())
105 wakeup_mask |= GPIO_bit(CORGI_GPIO_MAIN_BAT_LOW);
106
107 PWER = wakeup_mask | PWER_RTC;
108 PRER = wakeup_mask;
109 PFER = wakeup_mask;
110
111 for (i = 0; i <=15; i++) {
112 if (PRER & PFER & GPIO_bit(i)) {
113 if (GPLR0 & GPIO_bit(i) )
114 PRER &= ~GPIO_bit(i);
115 else
116 PFER &= ~GPIO_bit(i);
117 }
118 }
119} 80}
120 81
121static void corgi_postsuspend(void) 82static void corgi_postsuspend(void)
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c
deleted file mode 100644
index 9347254f8bcf..000000000000
--- a/arch/arm/mach-pxa/corgi_ssp.c
+++ /dev/null
@@ -1,274 +0,0 @@
1/*
2 * SSP control code for Sharp Corgi devices
3 *
4 * Copyright (c) 2004-2005 Richard Purdie
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/sched.h>
16#include <linux/delay.h>
17#include <linux/platform_device.h>
18#include <mach/hardware.h>
19#include <asm/mach-types.h>
20
21#include <mach/ssp.h>
22#include <mach/pxa2xx-gpio.h>
23#include <mach/regs-ssp.h>
24#include "sharpsl.h"
25
26static DEFINE_SPINLOCK(corgi_ssp_lock);
27static struct ssp_dev corgi_ssp_dev;
28static struct ssp_state corgi_ssp_state;
29static struct corgissp_machinfo *ssp_machinfo;
30
31/*
32 * There are three devices connected to the SSP interface:
33 * 1. A touchscreen controller (TI ADS7846 compatible)
34 * 2. An LCD controller (with some Backlight functionality)
35 * 3. A battery monitoring IC (Maxim MAX1111)
36 *
37 * Each device uses a different speed/mode of communication.
38 *
39 * The touchscreen is very sensitive and the most frequently used
40 * so the port is left configured for this.
41 *
42 * Devices are selected using Chip Selects on GPIOs.
43 */
44
45/*
46 * ADS7846 Routines
47 */
48unsigned long corgi_ssp_ads7846_putget(ulong data)
49{
50 unsigned long flag;
51 u32 ret = 0;
52
53 spin_lock_irqsave(&corgi_ssp_lock, flag);
54 if (ssp_machinfo->cs_ads7846 >= 0)
55 GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
56
57 ssp_write_word(&corgi_ssp_dev,data);
58 ssp_read_word(&corgi_ssp_dev, &ret);
59
60 if (ssp_machinfo->cs_ads7846 >= 0)
61 GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
62 spin_unlock_irqrestore(&corgi_ssp_lock, flag);
63
64 return ret;
65}
66
67/*
68 * NOTE: These functions should always be called in interrupt context
69 * and use the _lock and _unlock functions. They are very time sensitive.
70 */
71void corgi_ssp_ads7846_lock(void)
72{
73 spin_lock(&corgi_ssp_lock);
74 if (ssp_machinfo->cs_ads7846 >= 0)
75 GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
76}
77
78void corgi_ssp_ads7846_unlock(void)
79{
80 if (ssp_machinfo->cs_ads7846 >= 0)
81 GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
82 spin_unlock(&corgi_ssp_lock);
83}
84
85void corgi_ssp_ads7846_put(ulong data)
86{
87 ssp_write_word(&corgi_ssp_dev,data);
88}
89
90unsigned long corgi_ssp_ads7846_get(void)
91{
92 u32 ret = 0;
93 ssp_read_word(&corgi_ssp_dev, &ret);
94 return ret;
95}
96
97EXPORT_SYMBOL(corgi_ssp_ads7846_putget);
98EXPORT_SYMBOL(corgi_ssp_ads7846_lock);
99EXPORT_SYMBOL(corgi_ssp_ads7846_unlock);
100EXPORT_SYMBOL(corgi_ssp_ads7846_put);
101EXPORT_SYMBOL(corgi_ssp_ads7846_get);
102
103
104/*
105 * LCD/Backlight Routines
106 */
107unsigned long corgi_ssp_dac_put(ulong data)
108{
109 unsigned long flag, sscr1 = SSCR1_SPH;
110 u32 tmp;
111
112 spin_lock_irqsave(&corgi_ssp_lock, flag);
113
114 if (machine_is_spitz() || machine_is_akita() || machine_is_borzoi())
115 sscr1 = 0;
116
117 ssp_disable(&corgi_ssp_dev);
118 ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), sscr1, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_lcdcon));
119 ssp_enable(&corgi_ssp_dev);
120
121 if (ssp_machinfo->cs_lcdcon >= 0)
122 GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
123 ssp_write_word(&corgi_ssp_dev,data);
124 /* Read null data back from device to prevent SSP overflow */
125 ssp_read_word(&corgi_ssp_dev, &tmp);
126 if (ssp_machinfo->cs_lcdcon >= 0)
127 GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
128
129 ssp_disable(&corgi_ssp_dev);
130 ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
131 ssp_enable(&corgi_ssp_dev);
132
133 spin_unlock_irqrestore(&corgi_ssp_lock, flag);
134
135 return 0;
136}
137
138void corgi_ssp_lcdtg_send(u8 adrs, u8 data)
139{
140 corgi_ssp_dac_put(((adrs & 0x07) << 5) | (data & 0x1f));
141}
142
143void corgi_ssp_blduty_set(int duty)
144{
145 corgi_ssp_lcdtg_send(0x02,duty);
146}
147
148EXPORT_SYMBOL(corgi_ssp_lcdtg_send);
149EXPORT_SYMBOL(corgi_ssp_blduty_set);
150
151/*
152 * Max1111 Routines
153 */
154int corgi_ssp_max1111_get(ulong data)
155{
156 unsigned long flag;
157 long voltage = 0, voltage1 = 0, voltage2 = 0;
158
159 spin_lock_irqsave(&corgi_ssp_lock, flag);
160 if (ssp_machinfo->cs_max1111 >= 0)
161 GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
162 ssp_disable(&corgi_ssp_dev);
163 ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_max1111));
164 ssp_enable(&corgi_ssp_dev);
165
166 udelay(1);
167
168 /* TB1/RB1 */
169 ssp_write_word(&corgi_ssp_dev,data);
170 ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); /* null read */
171
172 /* TB12/RB2 */
173 ssp_write_word(&corgi_ssp_dev,0);
174 ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1);
175
176 /* TB13/RB3*/
177 ssp_write_word(&corgi_ssp_dev,0);
178 ssp_read_word(&corgi_ssp_dev, (u32*)&voltage2);
179
180 ssp_disable(&corgi_ssp_dev);
181 ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
182 ssp_enable(&corgi_ssp_dev);
183 if (ssp_machinfo->cs_max1111 >= 0)
184 GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
185 spin_unlock_irqrestore(&corgi_ssp_lock, flag);
186
187 if (voltage1 & 0xc0 || voltage2 & 0x3f)
188 voltage = -1;
189 else
190 voltage = ((voltage1 << 2) & 0xfc) | ((voltage2 >> 6) & 0x03);
191
192 return voltage;
193}
194
195EXPORT_SYMBOL(corgi_ssp_max1111_get);
196
197/*
198 * Support Routines
199 */
200
201void __init corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo)
202{
203 ssp_machinfo = machinfo;
204}
205
206static int __devinit corgi_ssp_probe(struct platform_device *dev)
207{
208 int ret;
209
210 /* Chip Select - Disable All */
211 if (ssp_machinfo->cs_lcdcon >= 0)
212 pxa_gpio_mode(ssp_machinfo->cs_lcdcon | GPIO_OUT | GPIO_DFLT_HIGH);
213 if (ssp_machinfo->cs_max1111 >= 0)
214 pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH);
215 if (ssp_machinfo->cs_ads7846 >= 0)
216 pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH);
217
218 ret = ssp_init(&corgi_ssp_dev, ssp_machinfo->port, 0);
219
220 if (ret)
221 printk(KERN_ERR "Unable to register SSP handler!\n");
222 else {
223 ssp_disable(&corgi_ssp_dev);
224 ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
225 ssp_enable(&corgi_ssp_dev);
226 }
227
228 return ret;
229}
230
231static int corgi_ssp_remove(struct platform_device *dev)
232{
233 ssp_exit(&corgi_ssp_dev);
234 return 0;
235}
236
237static int corgi_ssp_suspend(struct platform_device *dev, pm_message_t state)
238{
239 ssp_flush(&corgi_ssp_dev);
240 ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state);
241
242 return 0;
243}
244
245static int corgi_ssp_resume(struct platform_device *dev)
246{
247 if (ssp_machinfo->cs_lcdcon >= 0)
248 GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */
249 if (ssp_machinfo->cs_max1111 >= 0)
250 GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
251 if (ssp_machinfo->cs_ads7846 >= 0)
252 GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/
253 ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state);
254 ssp_enable(&corgi_ssp_dev);
255
256 return 0;
257}
258
259static struct platform_driver corgissp_driver = {
260 .probe = corgi_ssp_probe,
261 .remove = corgi_ssp_remove,
262 .suspend = corgi_ssp_suspend,
263 .resume = corgi_ssp_resume,
264 .driver = {
265 .name = "corgi-ssp",
266 },
267};
268
269int __init corgi_ssp_init(void)
270{
271 return platform_driver_register(&corgissp_driver);
272}
273
274arch_initcall(corgi_ssp_init);
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index 88575b87bd33..91fd4fea6a54 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -125,18 +125,9 @@ static unsigned long csb726_pin_config[] = {
125 GPIO118_I2C_SDA, 125 GPIO118_I2C_SDA,
126}; 126};
127 127
128static struct pxamci_platform_data csb726_mci_data;
129
130static int csb726_mci_init(struct device *dev,
131 irq_handler_t detect, void *data)
132{
133 csb726_mci_data.detect_delay = msecs_to_jiffies(500);
134 return 0;
135}
136
137static struct pxamci_platform_data csb726_mci = { 128static struct pxamci_platform_data csb726_mci = {
129 .detect_delay_ms = 500,
138 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 130 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
139 .init = csb726_mci_init,
140 /* FIXME setpower */ 131 /* FIXME setpower */
141 .gpio_card_detect = CSB726_GPIO_MMC_DETECT, 132 .gpio_card_detect = CSB726_GPIO_MMC_DETECT,
142 .gpio_card_ro = CSB726_GPIO_MMC_RO, 133 .gpio_card_ro = CSB726_GPIO_MMC_RO,
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index aab04f33e49b..0517c17978f3 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -626,6 +626,7 @@ static int em_x270_mci_get_ro(struct device *dev)
626} 626}
627 627
628static struct pxamci_platform_data em_x270_mci_platform_data = { 628static struct pxamci_platform_data em_x270_mci_platform_data = {
629 .detect_delay_ms = 250,
629 .ocr_mask = MMC_VDD_20_21|MMC_VDD_21_22|MMC_VDD_22_23| 630 .ocr_mask = MMC_VDD_20_21|MMC_VDD_21_22|MMC_VDD_22_23|
630 MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27| 631 MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27|
631 MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30| 632 MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
@@ -643,7 +644,6 @@ static void __init em_x270_init_mmc(void)
643 if (machine_is_em_x270()) 644 if (machine_is_em_x270())
644 em_x270_mci_platform_data.get_ro = em_x270_mci_get_ro; 645 em_x270_mci_platform_data.get_ro = em_x270_mci_get_ro;
645 646
646 em_x270_mci_platform_data.detect_delay = msecs_to_jiffies(250);
647 pxa_set_mci_info(&em_x270_mci_platform_data); 647 pxa_set_mci_info(&em_x270_mci_platform_data);
648} 648}
649#else 649#else
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 3126a35aa002..baabb3ce088e 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -28,7 +28,6 @@
28 28
29#include <mach/reset.h> 29#include <mach/reset.h>
30#include <mach/gpio.h> 30#include <mach/gpio.h>
31#include <mach/pxa2xx-gpio.h>
32 31
33#include "generic.h" 32#include "generic.h"
34 33
@@ -128,33 +127,3 @@ void __init pxa_map_io(void)
128 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); 127 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
129 get_clk_frequency_khz(1); 128 get_clk_frequency_khz(1);
130} 129}
131
132/*
133 * Configure pins for GPIO or other functions
134 */
135int pxa_gpio_mode(int gpio_mode)
136{
137 unsigned long flags;
138 int gpio = gpio_mode & GPIO_MD_MASK_NR;
139 int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
140 int gafr;
141
142 if (gpio > pxa_last_gpio)
143 return -EINVAL;
144
145 local_irq_save(flags);
146 if (gpio_mode & GPIO_DFLT_LOW)
147 GPCR(gpio) = GPIO_bit(gpio);
148 else if (gpio_mode & GPIO_DFLT_HIGH)
149 GPSR(gpio) = GPIO_bit(gpio);
150 if (gpio_mode & GPIO_MD_MASK_DIR)
151 GPDR(gpio) |= GPIO_bit(gpio);
152 else
153 GPDR(gpio) &= ~GPIO_bit(gpio);
154 gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
155 GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
156 local_irq_restore(flags);
157
158 return 0;
159}
160EXPORT_SYMBOL(pxa_gpio_mode);
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index 7239281788de..585970ef08ce 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -113,7 +113,6 @@
113 * Shared data structures 113 * Shared data structures
114 */ 114 */
115extern struct platform_device corgiscoop_device; 115extern struct platform_device corgiscoop_device;
116extern struct platform_device corgissp_device;
117 116
118#endif /* __ASM_ARCH_CORGI_H */ 117#endif /* __ASM_ARCH_CORGI_H */
119 118
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
index 658b28ed129b..c54cef25895c 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
@@ -25,6 +25,8 @@
25#define MFP_DIR(x) (((x) >> 23) & 0x1) 25#define MFP_DIR(x) (((x) >> 23) & 0x1)
26 26
27#define MFP_LPM_CAN_WAKEUP (0x1 << 24) 27#define MFP_LPM_CAN_WAKEUP (0x1 << 24)
28#define MFP_LPM_KEEP_OUTPUT (0x1 << 25)
29
28#define WAKEUP_ON_EDGE_RISE (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE) 30#define WAKEUP_ON_EDGE_RISE (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE)
29#define WAKEUP_ON_EDGE_FALL (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_FALL) 31#define WAKEUP_ON_EDGE_FALL (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_FALL)
30#define WAKEUP_ON_EDGE_BOTH (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_BOTH) 32#define WAKEUP_ON_EDGE_BOTH (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_BOTH)
diff --git a/arch/arm/mach-pxa/include/mach/mmc.h b/arch/arm/mach-pxa/include/mach/mmc.h
index 02a69dc2ee63..9eb515bb799d 100644
--- a/arch/arm/mach-pxa/include/mach/mmc.h
+++ b/arch/arm/mach-pxa/include/mach/mmc.h
@@ -9,7 +9,7 @@ struct mmc_host;
9 9
10struct pxamci_platform_data { 10struct pxamci_platform_data {
11 unsigned int ocr_mask; /* available voltages */ 11 unsigned int ocr_mask; /* available voltages */
12 unsigned long detect_delay; /* delay in jiffies before detecting cards after interrupt */ 12 unsigned long detect_delay_ms; /* delay in millisecond before detecting cards after interrupt */
13 int (*init)(struct device *, irq_handler_t , void *); 13 int (*init)(struct device *, irq_handler_t , void *);
14 int (*get_ro)(struct device *); 14 int (*get_ro)(struct device *);
15 void (*setpower)(struct device *, unsigned int); 15 void (*setpower)(struct device *, unsigned int);
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h b/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
deleted file mode 100644
index 1209c44aa6f1..000000000000
--- a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
+++ /dev/null
@@ -1,375 +0,0 @@
1#ifndef __ASM_ARCH_PXA2XX_GPIO_H
2#define __ASM_ARCH_PXA2XX_GPIO_H
3
4#warning Please use mfp-pxa2[57]x.h instead of pxa2xx-gpio.h
5
6#include <mach/gpio.h>
7
8/* GPIO alternate function assignments */
9
10#define GPIO1_RST 1 /* reset */
11#define GPIO6_MMCCLK 6 /* MMC Clock */
12#define GPIO7_48MHz 7 /* 48 MHz clock output */
13#define GPIO8_MMCCS0 8 /* MMC Chip Select 0 */
14#define GPIO9_MMCCS1 9 /* MMC Chip Select 1 */
15#define GPIO10_RTCCLK 10 /* real time clock (1 Hz) */
16#define GPIO11_3_6MHz 11 /* 3.6 MHz oscillator out */
17#define GPIO12_32KHz 12 /* 32 kHz out */
18#define GPIO12_CIF_DD_7 12 /* Camera data pin 7 */
19#define GPIO13_MBGNT 13 /* memory controller grant */
20#define GPIO14_MBREQ 14 /* alternate bus master request */
21#define GPIO15_nCS_1 15 /* chip select 1 */
22#define GPIO16_PWM0 16 /* PWM0 output */
23#define GPIO17_PWM1 17 /* PWM1 output */
24#define GPIO17_CIF_DD_6 17 /* Camera data pin 6 */
25#define GPIO18_RDY 18 /* Ext. Bus Ready */
26#define GPIO19_DREQ1 19 /* External DMA Request */
27#define GPIO20_DREQ0 20 /* External DMA Request */
28#define GPIO23_SCLK 23 /* SSP clock */
29#define GPIO23_CIF_MCLK 23 /* Camera Master Clock */
30#define GPIO24_SFRM 24 /* SSP Frame */
31#define GPIO24_CIF_FV 24 /* Camera frame start signal */
32#define GPIO25_STXD 25 /* SSP transmit */
33#define GPIO25_CIF_LV 25 /* Camera line start signal */
34#define GPIO26_SRXD 26 /* SSP receive */
35#define GPIO26_CIF_PCLK 26 /* Camera Pixel Clock */
36#define GPIO27_SEXTCLK 27 /* SSP ext_clk */
37#define GPIO27_CIF_DD_0 27 /* Camera data pin 0 */
38#define GPIO28_BITCLK 28 /* AC97/I2S bit_clk */
39#define GPIO29_SDATA_IN 29 /* AC97 Sdata_in0 / I2S Sdata_in */
40#define GPIO30_SDATA_OUT 30 /* AC97/I2S Sdata_out */
41#define GPIO31_SYNC 31 /* AC97/I2S sync */
42#define GPIO32_SDATA_IN1 32 /* AC97 Sdata_in1 */
43#define GPIO32_SYSCLK 32 /* I2S System Clock */
44#define GPIO32_MMCCLK 32 /* MMC Clock (PXA270) */
45#define GPIO33_nCS_5 33 /* chip select 5 */
46#define GPIO34_FFRXD 34 /* FFUART receive */
47#define GPIO34_MMCCS0 34 /* MMC Chip Select 0 */
48#define GPIO35_FFCTS 35 /* FFUART Clear to send */
49#define GPIO36_FFDCD 36 /* FFUART Data carrier detect */
50#define GPIO37_FFDSR 37 /* FFUART data set ready */
51#define GPIO38_FFRI 38 /* FFUART Ring Indicator */
52#define GPIO39_MMCCS1 39 /* MMC Chip Select 1 */
53#define GPIO39_FFTXD 39 /* FFUART transmit data */
54#define GPIO40_FFDTR 40 /* FFUART data terminal Ready */
55#define GPIO41_FFRTS 41 /* FFUART request to send */
56#define GPIO42_BTRXD 42 /* BTUART receive data */
57#define GPIO42_HWRXD 42 /* HWUART receive data */
58#define GPIO42_CIF_MCLK 42 /* Camera Master Clock */
59#define GPIO43_BTTXD 43 /* BTUART transmit data */
60#define GPIO43_HWTXD 43 /* HWUART transmit data */
61#define GPIO43_CIF_FV 43 /* Camera frame start signal */
62#define GPIO44_BTCTS 44 /* BTUART clear to send */
63#define GPIO44_HWCTS 44 /* HWUART clear to send */
64#define GPIO44_CIF_LV 44 /* Camera line start signal */
65#define GPIO45_BTRTS 45 /* BTUART request to send */
66#define GPIO45_HWRTS 45 /* HWUART request to send */
67#define GPIO45_AC97_SYSCLK 45 /* AC97 System Clock */
68#define GPIO45_CIF_PCLK 45 /* Camera Pixel Clock */
69#define GPIO46_ICPRXD 46 /* ICP receive data */
70#define GPIO46_STRXD 46 /* STD_UART receive data */
71#define GPIO47_ICPTXD 47 /* ICP transmit data */
72#define GPIO47_STTXD 47 /* STD_UART transmit data */
73#define GPIO47_CIF_DD_0 47 /* Camera data pin 0 */
74#define GPIO48_nPOE 48 /* Output Enable for Card Space */
75#define GPIO48_CIF_DD_5 48 /* Camera data pin 5 */
76#define GPIO49_nPWE 49 /* Write Enable for Card Space */
77#define GPIO50_nPIOR 50 /* I/O Read for Card Space */
78#define GPIO50_CIF_DD_3 50 /* Camera data pin 3 */
79#define GPIO51_nPIOW 51 /* I/O Write for Card Space */
80#define GPIO51_CIF_DD_2 51 /* Camera data pin 2 */
81#define GPIO52_nPCE_1 52 /* Card Enable for Card Space */
82#define GPIO52_CIF_DD_4 52 /* Camera data pin 4 */
83#define GPIO53_nPCE_2 53 /* Card Enable for Card Space */
84#define GPIO53_MMCCLK 53 /* MMC Clock */
85#define GPIO53_CIF_MCLK 53 /* Camera Master Clock */
86#define GPIO54_MMCCLK 54 /* MMC Clock */
87#define GPIO54_pSKTSEL 54 /* Socket Select for Card Space */
88#define GPIO54_nPCE_2 54 /* Card Enable for Card Space (PXA27x) */
89#define GPIO54_CIF_PCLK 54 /* Camera Pixel Clock */
90#define GPIO55_nPREG 55 /* Card Address bit 26 */
91#define GPIO55_CIF_DD_1 55 /* Camera data pin 1 */
92#define GPIO56_nPWAIT 56 /* Wait signal for Card Space */
93#define GPIO57_nIOIS16 57 /* Bus Width select for I/O Card Space */
94#define GPIO58_LDD_0 58 /* LCD data pin 0 */
95#define GPIO59_LDD_1 59 /* LCD data pin 1 */
96#define GPIO60_LDD_2 60 /* LCD data pin 2 */
97#define GPIO61_LDD_3 61 /* LCD data pin 3 */
98#define GPIO62_LDD_4 62 /* LCD data pin 4 */
99#define GPIO63_LDD_5 63 /* LCD data pin 5 */
100#define GPIO64_LDD_6 64 /* LCD data pin 6 */
101#define GPIO65_LDD_7 65 /* LCD data pin 7 */
102#define GPIO66_LDD_8 66 /* LCD data pin 8 */
103#define GPIO66_MBREQ 66 /* alternate bus master req */
104#define GPIO67_LDD_9 67 /* LCD data pin 9 */
105#define GPIO67_MMCCS0 67 /* MMC Chip Select 0 */
106#define GPIO68_LDD_10 68 /* LCD data pin 10 */
107#define GPIO68_MMCCS1 68 /* MMC Chip Select 1 */
108#define GPIO69_LDD_11 69 /* LCD data pin 11 */
109#define GPIO69_MMCCLK 69 /* MMC_CLK */
110#define GPIO70_LDD_12 70 /* LCD data pin 12 */
111#define GPIO70_RTCCLK 70 /* Real Time clock (1 Hz) */
112#define GPIO71_LDD_13 71 /* LCD data pin 13 */
113#define GPIO71_3_6MHz 71 /* 3.6 MHz Oscillator clock */
114#define GPIO72_LDD_14 72 /* LCD data pin 14 */
115#define GPIO72_32kHz 72 /* 32 kHz clock */
116#define GPIO73_LDD_15 73 /* LCD data pin 15 */
117#define GPIO73_MBGNT 73 /* Memory controller grant */
118#define GPIO74_LCD_FCLK 74 /* LCD Frame clock */
119#define GPIO75_LCD_LCLK 75 /* LCD line clock */
120#define GPIO76_LCD_PCLK 76 /* LCD Pixel clock */
121#define GPIO77_LCD_ACBIAS 77 /* LCD AC Bias */
122#define GPIO78_nCS_2 78 /* chip select 2 */
123#define GPIO79_nCS_3 79 /* chip select 3 */
124#define GPIO80_nCS_4 80 /* chip select 4 */
125#define GPIO81_NSCLK 81 /* NSSP clock */
126#define GPIO81_CIF_DD_0 81 /* Camera data pin 0 */
127#define GPIO82_NSFRM 82 /* NSSP Frame */
128#define GPIO82_CIF_DD_5 82 /* Camera data pin 5 */
129#define GPIO83_NSTXD 83 /* NSSP transmit */
130#define GPIO83_CIF_DD_4 83 /* Camera data pin 4 */
131#define GPIO84_NSRXD 84 /* NSSP receive */
132#define GPIO84_CIF_FV 84 /* Camera frame start signal */
133#define GPIO85_nPCE_1 85 /* Card Enable for Card Space (PXA27x) */
134#define GPIO85_CIF_LV 85 /* Camera line start signal */
135#define GPIO90_CIF_DD_4 90 /* Camera data pin 4 */
136#define GPIO91_CIF_DD_5 91 /* Camera data pin 5 */
137#define GPIO92_MMCDAT0 92 /* MMC DAT0 (PXA27x) */
138#define GPIO93_CIF_DD_6 93 /* Camera data pin 6 */
139#define GPIO94_CIF_DD_5 94 /* Camera data pin 5 */
140#define GPIO95_CIF_DD_4 95 /* Camera data pin 4 */
141#define GPIO96_FFRXD 96 /* FFUART recieve */
142#define GPIO98_FFRTS 98 /* FFUART request to send */
143#define GPIO98_CIF_DD_0 98 /* Camera data pin 0 */
144#define GPIO99_FFTXD 99 /* FFUART transmit data */
145#define GPIO100_FFCTS 100 /* FFUART Clear to send */
146#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */
147#define GPIO103_CIF_DD_3 103 /* Camera data pin 3 */
148#define GPIO104_CIF_DD_2 104 /* Camera data pin 2 */
149#define GPIO105_CIF_DD_1 105 /* Camera data pin 1 */
150#define GPIO106_CIF_DD_9 106 /* Camera data pin 9 */
151#define GPIO107_CIF_DD_8 107 /* Camera data pin 8 */
152#define GPIO108_CIF_DD_7 108 /* Camera data pin 7 */
153#define GPIO109_MMCDAT1 109 /* MMC DAT1 (PXA27x) */
154#define GPIO110_MMCDAT2 110 /* MMC DAT2 (PXA27x) */
155#define GPIO110_MMCCS0 110 /* MMC Chip Select 0 (PXA27x) */
156#define GPIO111_MMCDAT3 111 /* MMC DAT3 (PXA27x) */
157#define GPIO111_MMCCS1 111 /* MMC Chip Select 1 (PXA27x) */
158#define GPIO112_MMCCMD 112 /* MMC CMD (PXA27x) */
159#define GPIO113_I2S_SYSCLK 113 /* I2S System Clock (PXA27x) */
160#define GPIO113_AC97_RESET_N 113 /* AC97 NRESET on (PXA27x) */
161#define GPIO114_CIF_DD_1 114 /* Camera data pin 1 */
162#define GPIO115_CIF_DD_3 115 /* Camera data pin 3 */
163#define GPIO116_CIF_DD_2 116 /* Camera data pin 2 */
164
165/* GPIO alternate function mode & direction */
166
167#define GPIO_IN 0x000
168#define GPIO_OUT 0x080
169#define GPIO_ALT_FN_1_IN 0x100
170#define GPIO_ALT_FN_1_OUT 0x180
171#define GPIO_ALT_FN_2_IN 0x200
172#define GPIO_ALT_FN_2_OUT 0x280
173#define GPIO_ALT_FN_3_IN 0x300
174#define GPIO_ALT_FN_3_OUT 0x380
175#define GPIO_MD_MASK_NR 0x07f
176#define GPIO_MD_MASK_DIR 0x080
177#define GPIO_MD_MASK_FN 0x300
178#define GPIO_DFLT_LOW 0x400
179#define GPIO_DFLT_HIGH 0x800
180
181#define GPIO1_RTS_MD ( 1 | GPIO_ALT_FN_1_IN)
182#define GPIO6_MMCCLK_MD ( 6 | GPIO_ALT_FN_1_OUT)
183#define GPIO7_48MHz_MD ( 7 | GPIO_ALT_FN_1_OUT)
184#define GPIO8_MMCCS0_MD ( 8 | GPIO_ALT_FN_1_OUT)
185#define GPIO9_MMCCS1_MD ( 9 | GPIO_ALT_FN_1_OUT)
186#define GPIO10_RTCCLK_MD (10 | GPIO_ALT_FN_1_OUT)
187#define GPIO11_3_6MHz_MD (11 | GPIO_ALT_FN_1_OUT)
188#define GPIO12_32KHz_MD (12 | GPIO_ALT_FN_1_OUT)
189#define GPIO12_CIF_DD_7_MD (12 | GPIO_ALT_FN_2_IN)
190#define GPIO13_MBGNT_MD (13 | GPIO_ALT_FN_2_OUT)
191#define GPIO14_MBREQ_MD (14 | GPIO_ALT_FN_1_IN)
192#define GPIO15_nCS_1_MD (15 | GPIO_ALT_FN_2_OUT)
193#define GPIO16_PWM0_MD (16 | GPIO_ALT_FN_2_OUT)
194#define GPIO17_PWM1_MD (17 | GPIO_ALT_FN_2_OUT)
195#define GPIO17_CIF_DD_6_MD (17 | GPIO_ALT_FN_2_IN)
196#define GPIO18_RDY_MD (18 | GPIO_ALT_FN_1_IN)
197#define GPIO19_DREQ1_MD (19 | GPIO_ALT_FN_1_IN)
198#define GPIO20_DREQ0_MD (20 | GPIO_ALT_FN_1_IN)
199#define GPIO23_CIF_MCLK_MD (23 | GPIO_ALT_FN_1_OUT)
200#define GPIO23_SCLK_MD (23 | GPIO_ALT_FN_2_OUT)
201#define GPIO24_CIF_FV_MD (24 | GPIO_ALT_FN_1_OUT)
202#define GPIO24_SFRM_MD (24 | GPIO_ALT_FN_2_OUT)
203#define GPIO25_CIF_LV_MD (25 | GPIO_ALT_FN_1_OUT)
204#define GPIO25_STXD_MD (25 | GPIO_ALT_FN_2_OUT)
205#define GPIO26_SRXD_MD (26 | GPIO_ALT_FN_1_IN)
206#define GPIO26_CIF_PCLK_MD (26 | GPIO_ALT_FN_2_IN)
207#define GPIO27_SEXTCLK_MD (27 | GPIO_ALT_FN_1_IN)
208#define GPIO27_CIF_DD_0_MD (27 | GPIO_ALT_FN_3_IN)
209#define GPIO28_BITCLK_AC97_MD (28 | GPIO_ALT_FN_1_IN)
210#define GPIO28_BITCLK_IN_I2S_MD (28 | GPIO_ALT_FN_2_IN)
211#define GPIO28_BITCLK_OUT_I2S_MD (28 | GPIO_ALT_FN_1_OUT)
212#define GPIO29_SDATA_IN_AC97_MD (29 | GPIO_ALT_FN_1_IN)
213#define GPIO29_SDATA_IN_I2S_MD (29 | GPIO_ALT_FN_2_IN)
214#define GPIO30_SDATA_OUT_AC97_MD (30 | GPIO_ALT_FN_2_OUT)
215#define GPIO30_SDATA_OUT_I2S_MD (30 | GPIO_ALT_FN_1_OUT)
216#define GPIO31_SYNC_I2S_MD (31 | GPIO_ALT_FN_1_OUT)
217#define GPIO31_SYNC_AC97_MD (31 | GPIO_ALT_FN_2_OUT)
218#define GPIO32_SDATA_IN1_AC97_MD (32 | GPIO_ALT_FN_1_IN)
219#define GPIO32_SYSCLK_I2S_MD (32 | GPIO_ALT_FN_1_OUT)
220#define GPIO32_MMCCLK_MD (32 | GPIO_ALT_FN_2_OUT)
221#define GPIO33_nCS_5_MD (33 | GPIO_ALT_FN_2_OUT)
222#define GPIO34_FFRXD_MD (34 | GPIO_ALT_FN_1_IN)
223#define GPIO34_MMCCS0_MD (34 | GPIO_ALT_FN_2_OUT)
224#define GPIO35_FFCTS_MD (35 | GPIO_ALT_FN_1_IN)
225#define GPIO35_KP_MKOUT6_MD (35 | GPIO_ALT_FN_2_OUT)
226#define GPIO36_FFDCD_MD (36 | GPIO_ALT_FN_1_IN)
227#define GPIO37_FFDSR_MD (37 | GPIO_ALT_FN_1_IN)
228#define GPIO38_FFRI_MD (38 | GPIO_ALT_FN_1_IN)
229#define GPIO39_MMCCS1_MD (39 | GPIO_ALT_FN_1_OUT)
230#define GPIO39_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT)
231#define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT)
232#define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT)
233#define GPIO41_KP_MKOUT7_MD (41 | GPIO_ALT_FN_1_OUT)
234#define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN)
235#define GPIO42_HWRXD_MD (42 | GPIO_ALT_FN_3_IN)
236#define GPIO42_CIF_MCLK_MD (42 | GPIO_ALT_FN_3_OUT)
237#define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT)
238#define GPIO43_HWTXD_MD (43 | GPIO_ALT_FN_3_OUT)
239#define GPIO43_CIF_FV_MD (43 | GPIO_ALT_FN_3_OUT)
240#define GPIO44_BTCTS_MD (44 | GPIO_ALT_FN_1_IN)
241#define GPIO44_HWCTS_MD (44 | GPIO_ALT_FN_3_IN)
242#define GPIO44_CIF_LV_MD (44 | GPIO_ALT_FN_3_OUT)
243#define GPIO45_CIF_PCLK_MD (45 | GPIO_ALT_FN_3_IN)
244#define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT)
245#define GPIO45_HWRTS_MD (45 | GPIO_ALT_FN_3_OUT)
246#define GPIO45_SYSCLK_AC97_MD (45 | GPIO_ALT_FN_1_OUT)
247#define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN)
248#define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN)
249#define GPIO47_CIF_DD_0_MD (47 | GPIO_ALT_FN_1_IN)
250#define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT)
251#define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT)
252#define GPIO48_CIF_DD_5_MD (48 | GPIO_ALT_FN_1_IN)
253#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT)
254#define GPIO48_HWTXD_MD (48 | GPIO_ALT_FN_1_OUT)
255#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT)
256#define GPIO49_HWRXD_MD (49 | GPIO_ALT_FN_1_IN)
257#define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT)
258#define GPIO50_CIF_DD_3_MD (50 | GPIO_ALT_FN_1_IN)
259#define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT)
260#define GPIO50_HWCTS_MD (50 | GPIO_ALT_FN_1_IN)
261#define GPIO50_CIF_DD_3_MD (50 | GPIO_ALT_FN_1_IN)
262#define GPIO51_CIF_DD_2_MD (51 | GPIO_ALT_FN_1_IN)
263#define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT)
264#define GPIO51_HWRTS_MD (51 | GPIO_ALT_FN_1_OUT)
265#define GPIO51_CIF_DD_2_MD (51 | GPIO_ALT_FN_1_IN)
266#define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT)
267#define GPIO52_CIF_DD_4_MD (52 | GPIO_ALT_FN_1_IN)
268#define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT)
269#define GPIO53_MMCCLK_MD (53 | GPIO_ALT_FN_1_OUT)
270#define GPIO53_CIF_MCLK_MD (53 | GPIO_ALT_FN_2_OUT)
271#define GPIO54_MMCCLK_MD (54 | GPIO_ALT_FN_1_OUT)
272#define GPIO54_nPCE_2_MD (54 | GPIO_ALT_FN_2_OUT)
273#define GPIO54_pSKTSEL_MD (54 | GPIO_ALT_FN_2_OUT)
274#define GPIO54_CIF_PCLK_MD (54 | GPIO_ALT_FN_3_IN)
275#define GPIO55_nPREG_MD (55 | GPIO_ALT_FN_2_OUT)
276#define GPIO55_CIF_DD_1_MD (55 | GPIO_ALT_FN_1_IN)
277#define GPIO56_nPWAIT_MD (56 | GPIO_ALT_FN_1_IN)
278#define GPIO57_nIOIS16_MD (57 | GPIO_ALT_FN_1_IN)
279#define GPIO58_LDD_0_MD (58 | GPIO_ALT_FN_2_OUT)
280#define GPIO59_LDD_1_MD (59 | GPIO_ALT_FN_2_OUT)
281#define GPIO60_LDD_2_MD (60 | GPIO_ALT_FN_2_OUT)
282#define GPIO61_LDD_3_MD (61 | GPIO_ALT_FN_2_OUT)
283#define GPIO62_LDD_4_MD (62 | GPIO_ALT_FN_2_OUT)
284#define GPIO63_LDD_5_MD (63 | GPIO_ALT_FN_2_OUT)
285#define GPIO64_LDD_6_MD (64 | GPIO_ALT_FN_2_OUT)
286#define GPIO65_LDD_7_MD (65 | GPIO_ALT_FN_2_OUT)
287#define GPIO66_LDD_8_MD (66 | GPIO_ALT_FN_2_OUT)
288#define GPIO66_MBREQ_MD (66 | GPIO_ALT_FN_1_IN)
289#define GPIO67_LDD_9_MD (67 | GPIO_ALT_FN_2_OUT)
290#define GPIO67_MMCCS0_MD (67 | GPIO_ALT_FN_1_OUT)
291#define GPIO68_LDD_10_MD (68 | GPIO_ALT_FN_2_OUT)
292#define GPIO68_MMCCS1_MD (68 | GPIO_ALT_FN_1_OUT)
293#define GPIO69_LDD_11_MD (69 | GPIO_ALT_FN_2_OUT)
294#define GPIO69_MMCCLK_MD (69 | GPIO_ALT_FN_1_OUT)
295#define GPIO70_LDD_12_MD (70 | GPIO_ALT_FN_2_OUT)
296#define GPIO70_RTCCLK_MD (70 | GPIO_ALT_FN_1_OUT)
297#define GPIO71_LDD_13_MD (71 | GPIO_ALT_FN_2_OUT)
298#define GPIO71_3_6MHz_MD (71 | GPIO_ALT_FN_1_OUT)
299#define GPIO72_LDD_14_MD (72 | GPIO_ALT_FN_2_OUT)
300#define GPIO72_32kHz_MD (72 | GPIO_ALT_FN_1_OUT)
301#define GPIO73_LDD_15_MD (73 | GPIO_ALT_FN_2_OUT)
302#define GPIO73_MBGNT_MD (73 | GPIO_ALT_FN_1_OUT)
303#define GPIO74_LCD_FCLK_MD (74 | GPIO_ALT_FN_2_OUT)
304#define GPIO75_LCD_LCLK_MD (75 | GPIO_ALT_FN_2_OUT)
305#define GPIO76_LCD_PCLK_MD (76 | GPIO_ALT_FN_2_OUT)
306#define GPIO77_LCD_ACBIAS_MD (77 | GPIO_ALT_FN_2_OUT)
307#define GPIO78_nCS_2_MD (78 | GPIO_ALT_FN_2_OUT)
308#define GPIO78_nPCE_2_MD (78 | GPIO_ALT_FN_1_OUT)
309#define GPIO79_nCS_3_MD (79 | GPIO_ALT_FN_2_OUT)
310#define GPIO79_pSKTSEL_MD (79 | GPIO_ALT_FN_1_OUT)
311#define GPIO80_nCS_4_MD (80 | GPIO_ALT_FN_2_OUT)
312#define GPIO81_NSSP_CLK_OUT (81 | GPIO_ALT_FN_1_OUT)
313#define GPIO81_NSSP_CLK_IN (81 | GPIO_ALT_FN_1_IN)
314#define GPIO81_CIF_DD_0_MD (81 | GPIO_ALT_FN_2_IN)
315#define GPIO82_NSSP_FRM_OUT (82 | GPIO_ALT_FN_1_OUT)
316#define GPIO82_NSSP_FRM_IN (82 | GPIO_ALT_FN_1_IN)
317#define GPIO82_CIF_DD_5_MD (82 | GPIO_ALT_FN_3_IN)
318#define GPIO83_NSSP_TX (83 | GPIO_ALT_FN_1_OUT)
319#define GPIO83_NSSP_RX (83 | GPIO_ALT_FN_2_IN)
320#define GPIO83_CIF_DD_4_MD (83 | GPIO_ALT_FN_3_IN)
321#define GPIO84_NSSP_TX (84 | GPIO_ALT_FN_1_OUT)
322#define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN)
323#define GPIO84_CIF_FV_MD (84 | GPIO_ALT_FN_3_IN)
324#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT)
325#define GPIO85_CIF_LV_MD (85 | GPIO_ALT_FN_3_IN)
326#define GPIO86_nPCE_1_MD (86 | GPIO_ALT_FN_1_OUT)
327#define GPIO88_USBH1_PWR_MD (88 | GPIO_ALT_FN_1_IN)
328#define GPIO89_USBH1_PEN_MD (89 | GPIO_ALT_FN_2_OUT)
329#define GPIO90_CIF_DD_4_MD (90 | GPIO_ALT_FN_3_IN)
330#define GPIO91_CIF_DD_5_MD (91 | GPIO_ALT_FN_3_IN)
331#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT)
332#define GPIO93_CIF_DD_6_MD (93 | GPIO_ALT_FN_2_IN)
333#define GPIO94_CIF_DD_5_MD (94 | GPIO_ALT_FN_2_IN)
334#define GPIO95_CIF_DD_4_MD (95 | GPIO_ALT_FN_2_IN)
335#define GPIO95_KP_MKIN6_MD (95 | GPIO_ALT_FN_3_IN)
336#define GPIO96_KP_DKIN3_MD (96 | GPIO_ALT_FN_1_IN)
337#define GPIO96_FFRXD_MD (96 | GPIO_ALT_FN_3_IN)
338#define GPIO97_KP_MKIN3_MD (97 | GPIO_ALT_FN_3_IN)
339#define GPIO98_CIF_DD_0_MD (98 | GPIO_ALT_FN_2_IN)
340#define GPIO98_FFRTS_MD (98 | GPIO_ALT_FN_3_OUT)
341#define GPIO99_FFTXD_MD (99 | GPIO_ALT_FN_3_OUT)
342#define GPIO100_KP_MKIN0_MD (100 | GPIO_ALT_FN_1_IN)
343#define GPIO101_KP_MKIN1_MD (101 | GPIO_ALT_FN_1_IN)
344#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT)
345#define GPIO102_KP_MKIN2_MD (102 | GPIO_ALT_FN_1_IN)
346#define GPIO103_CIF_DD_3_MD (103 | GPIO_ALT_FN_1_IN)
347#define GPIO103_KP_MKOUT0_MD (103 | GPIO_ALT_FN_2_OUT)
348#define GPIO104_CIF_DD_2_MD (104 | GPIO_ALT_FN_1_IN)
349#define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT)
350#define GPIO104_KP_MKOUT1_MD (104 | GPIO_ALT_FN_2_OUT)
351#define GPIO105_CIF_DD_1_MD (105 | GPIO_ALT_FN_1_IN)
352#define GPIO105_KP_MKOUT2_MD (105 | GPIO_ALT_FN_2_OUT)
353#define GPIO106_CIF_DD_9_MD (106 | GPIO_ALT_FN_1_IN)
354#define GPIO106_KP_MKOUT3_MD (106 | GPIO_ALT_FN_2_OUT)
355#define GPIO107_CIF_DD_8_MD (107 | GPIO_ALT_FN_1_IN)
356#define GPIO107_KP_MKOUT4_MD (107 | GPIO_ALT_FN_2_OUT)
357#define GPIO108_CIF_DD_7_MD (108 | GPIO_ALT_FN_1_IN)
358#define GPIO108_KP_MKOUT5_MD (108 | GPIO_ALT_FN_2_OUT)
359#define GPIO109_MMCDAT1_MD (109 | GPIO_ALT_FN_1_OUT)
360#define GPIO110_MMCDAT2_MD (110 | GPIO_ALT_FN_1_OUT)
361#define GPIO110_MMCCS0_MD (110 | GPIO_ALT_FN_1_OUT)
362#define GPIO111_MMCDAT3_MD (111 | GPIO_ALT_FN_1_OUT)
363#define GPIO110_MMCCS1_MD (111 | GPIO_ALT_FN_1_OUT)
364#define GPIO112_MMCCMD_MD (112 | GPIO_ALT_FN_1_OUT)
365#define GPIO113_I2S_SYSCLK_MD (113 | GPIO_ALT_FN_1_OUT)
366#define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT)
367#define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_IN)
368#define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN)
369
370/*
371 * Handy routine to set GPIO alternate functions
372 */
373extern int pxa_gpio_mode( int gpio_mode );
374
375#endif /* __ASM_ARCH_PXA2XX_GPIO_H */
diff --git a/arch/arm/mach-pxa/include/mach/regs-ssp.h b/arch/arm/mach-pxa/include/mach/regs-ssp.h
deleted file mode 100644
index 6a2ed35acd59..000000000000
--- a/arch/arm/mach-pxa/include/mach/regs-ssp.h
+++ /dev/null
@@ -1,134 +0,0 @@
1#ifndef __ASM_ARCH_REGS_SSP_H
2#define __ASM_ARCH_REGS_SSP_H
3
4/*
5 * SSP Serial Port Registers
6 * PXA250, PXA255, PXA26x and PXA27x SSP controllers are all slightly different.
7 * PXA255, PXA26x and PXA27x have extra ports, registers and bits.
8 */
9
10#define SSCR0 (0x00) /* SSP Control Register 0 */
11#define SSCR1 (0x04) /* SSP Control Register 1 */
12#define SSSR (0x08) /* SSP Status Register */
13#define SSITR (0x0C) /* SSP Interrupt Test Register */
14#define SSDR (0x10) /* SSP Data Write/Data Read Register */
15
16#define SSTO (0x28) /* SSP Time Out Register */
17#define SSPSP (0x2C) /* SSP Programmable Serial Protocol */
18#define SSTSA (0x30) /* SSP Tx Timeslot Active */
19#define SSRSA (0x34) /* SSP Rx Timeslot Active */
20#define SSTSS (0x38) /* SSP Timeslot Status */
21#define SSACD (0x3C) /* SSP Audio Clock Divider */
22
23#if defined(CONFIG_PXA3xx)
24#define SSACDD (0x40) /* SSP Audio Clock Dither Divider */
25#endif
26
27/* Common PXA2xx bits first */
28#define SSCR0_DSS (0x0000000f) /* Data Size Select (mask) */
29#define SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..16] */
30#define SSCR0_FRF (0x00000030) /* FRame Format (mask) */
31#define SSCR0_Motorola (0x0 << 4) /* Motorola's Serial Peripheral Interface (SPI) */
32#define SSCR0_TI (0x1 << 4) /* Texas Instruments' Synchronous Serial Protocol (SSP) */
33#define SSCR0_National (0x2 << 4) /* National Microwire */
34#define SSCR0_ECS (1 << 6) /* External clock select */
35#define SSCR0_SSE (1 << 7) /* Synchronous Serial Port Enable */
36
37#if defined(CONFIG_PXA25x)
38#define SSCR0_SCR (0x0000ff00) /* Serial Clock Rate (mask) */
39#define SSCR0_SerClkDiv(x) ((((x) - 2)/2) << 8) /* Divisor [2..512] */
40#elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
41#define SSCR0_SCR (0x000fff00) /* Serial Clock Rate (mask) */
42#define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */
43#endif
44
45#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
46#define SSCR0_EDSS (1 << 20) /* Extended data size select */
47#define SSCR0_NCS (1 << 21) /* Network clock select */
48#define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */
49#define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */
50#define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */
51#define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */
52#define SSCR0_ACS (1 << 30) /* Audio clock select */
53#define SSCR0_MOD (1 << 31) /* Mode (normal or network) */
54#endif
55
56#if defined(CONFIG_PXA3xx)
57#define SSCR0_FPCKE (1 << 29) /* FIFO packing enable */
58#endif
59
60#define SSCR1_RIE (1 << 0) /* Receive FIFO Interrupt Enable */
61#define SSCR1_TIE (1 << 1) /* Transmit FIFO Interrupt Enable */
62#define SSCR1_LBM (1 << 2) /* Loop-Back Mode */
63#define SSCR1_SPO (1 << 3) /* Motorola SPI SSPSCLK polarity setting */
64#define SSCR1_SPH (1 << 4) /* Motorola SPI SSPSCLK phase setting */
65#define SSCR1_MWDS (1 << 5) /* Microwire Transmit Data Size */
66#define SSCR1_TFT (0x000003c0) /* Transmit FIFO Threshold (mask) */
67#define SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..16] */
68#define SSCR1_RFT (0x00003c00) /* Receive FIFO Threshold (mask) */
69#define SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..16] */
70
71#define SSSR_TNF (1 << 2) /* Transmit FIFO Not Full */
72#define SSSR_RNE (1 << 3) /* Receive FIFO Not Empty */
73#define SSSR_BSY (1 << 4) /* SSP Busy */
74#define SSSR_TFS (1 << 5) /* Transmit FIFO Service Request */
75#define SSSR_RFS (1 << 6) /* Receive FIFO Service Request */
76#define SSSR_ROR (1 << 7) /* Receive FIFO Overrun */
77
78#define SSCR0_TIM (1 << 23) /* Transmit FIFO Under Run Interrupt Mask */
79#define SSCR0_RIM (1 << 22) /* Receive FIFO Over Run interrupt Mask */
80#define SSCR0_NCS (1 << 21) /* Network Clock Select */
81#define SSCR0_EDSS (1 << 20) /* Extended Data Size Select */
82
83/* extra bits in PXA255, PXA26x and PXA27x SSP ports */
84#define SSCR0_TISSP (1 << 4) /* TI Sync Serial Protocol */
85#define SSCR0_PSP (3 << 4) /* PSP - Programmable Serial Protocol */
86#define SSCR1_TTELP (1 << 31) /* TXD Tristate Enable Last Phase */
87#define SSCR1_TTE (1 << 30) /* TXD Tristate Enable */
88#define SSCR1_EBCEI (1 << 29) /* Enable Bit Count Error interrupt */
89#define SSCR1_SCFR (1 << 28) /* Slave Clock free Running */
90#define SSCR1_ECRA (1 << 27) /* Enable Clock Request A */
91#define SSCR1_ECRB (1 << 26) /* Enable Clock request B */
92#define SSCR1_SCLKDIR (1 << 25) /* Serial Bit Rate Clock Direction */
93#define SSCR1_SFRMDIR (1 << 24) /* Frame Direction */
94#define SSCR1_RWOT (1 << 23) /* Receive Without Transmit */
95#define SSCR1_TRAIL (1 << 22) /* Trailing Byte */
96#define SSCR1_TSRE (1 << 21) /* Transmit Service Request Enable */
97#define SSCR1_RSRE (1 << 20) /* Receive Service Request Enable */
98#define SSCR1_TINTE (1 << 19) /* Receiver Time-out Interrupt enable */
99#define SSCR1_PINTE (1 << 18) /* Peripheral Trailing Byte Interupt Enable */
100#define SSCR1_IFS (1 << 16) /* Invert Frame Signal */
101#define SSCR1_STRF (1 << 15) /* Select FIFO or EFWR */
102#define SSCR1_EFWR (1 << 14) /* Enable FIFO Write/Read */
103
104#define SSSR_BCE (1 << 23) /* Bit Count Error */
105#define SSSR_CSS (1 << 22) /* Clock Synchronisation Status */
106#define SSSR_TUR (1 << 21) /* Transmit FIFO Under Run */
107#define SSSR_EOC (1 << 20) /* End Of Chain */
108#define SSSR_TINT (1 << 19) /* Receiver Time-out Interrupt */
109#define SSSR_PINT (1 << 18) /* Peripheral Trailing Byte Interrupt */
110
111#if defined(CONFIG_PXA3xx)
112#define SSPSP_EDMYSTOP(x) ((x) << 28) /* Extended Dummy Stop */
113#define SSPSP_EDMYSTRT(x) ((x) << 26) /* Extended Dummy Start */
114#endif
115
116#define SSPSP_FSRT (1 << 25) /* Frame Sync Relative Timing */
117#define SSPSP_DMYSTOP(x) ((x) << 23) /* Dummy Stop */
118#define SSPSP_SFRMWDTH(x) ((x) << 16) /* Serial Frame Width */
119#define SSPSP_SFRMDLY(x) ((x) << 9) /* Serial Frame Delay */
120#define SSPSP_DMYSTRT(x) ((x) << 7) /* Dummy Start */
121#define SSPSP_STRTDLY(x) ((x) << 4) /* Start Delay */
122#define SSPSP_ETDS (1 << 3) /* End of Transfer data State */
123#define SSPSP_SFRMP (1 << 2) /* Serial Frame Polarity */
124#define SSPSP_SCMODE(x) ((x) << 0) /* Serial Bit Rate Clock Mode */
125
126#define SSACD_SCDB (1 << 3) /* SSPSYSCLK Divider Bypass */
127#define SSACD_ACPS(x) ((x) << 4) /* Audio clock PLL select */
128#define SSACD_ACDS(x) ((x) << 0) /* Audio clock divider select */
129#if defined(CONFIG_PXA3xx)
130#define SSACD_SCDX8 (1 << 7) /* SYSCLK division ratio select */
131#endif
132
133
134#endif /* __ASM_ARCH_REGS_SSP_H */
diff --git a/arch/arm/mach-pxa/include/mach/ssp.h b/arch/arm/mach-pxa/include/mach/ssp.h
deleted file mode 100644
index be1be5b6db51..000000000000
--- a/arch/arm/mach-pxa/include/mach/ssp.h
+++ /dev/null
@@ -1,109 +0,0 @@
1/*
2 * ssp.h
3 *
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This driver supports the following PXA CPU/SSP ports:-
11 *
12 * PXA250 SSP
13 * PXA255 SSP, NSSP
14 * PXA26x SSP, NSSP, ASSP
15 * PXA27x SSP1, SSP2, SSP3
16 * PXA3xx SSP1, SSP2, SSP3, SSP4
17 */
18
19#ifndef __ASM_ARCH_SSP_H
20#define __ASM_ARCH_SSP_H
21
22#include <linux/list.h>
23#include <linux/io.h>
24
25enum pxa_ssp_type {
26 SSP_UNDEFINED = 0,
27 PXA25x_SSP, /* pxa 210, 250, 255, 26x */
28 PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
29 PXA27x_SSP,
30};
31
32struct ssp_device {
33 struct platform_device *pdev;
34 struct list_head node;
35
36 struct clk *clk;
37 void __iomem *mmio_base;
38 unsigned long phys_base;
39
40 const char *label;
41 int port_id;
42 int type;
43 int use_count;
44 int irq;
45 int drcmr_rx;
46 int drcmr_tx;
47};
48
49#ifdef CONFIG_PXA_SSP_LEGACY
50/*
51 * SSP initialisation flags
52 */
53#define SSP_NO_IRQ 0x1 /* don't register an irq handler in SSP driver */
54
55struct ssp_state {
56 u32 cr0;
57 u32 cr1;
58 u32 to;
59 u32 psp;
60};
61
62struct ssp_dev {
63 struct ssp_device *ssp;
64 u32 port;
65 u32 mode;
66 u32 flags;
67 u32 psp_flags;
68 u32 speed;
69 int irq;
70};
71
72int ssp_write_word(struct ssp_dev *dev, u32 data);
73int ssp_read_word(struct ssp_dev *dev, u32 *data);
74int ssp_flush(struct ssp_dev *dev);
75void ssp_enable(struct ssp_dev *dev);
76void ssp_disable(struct ssp_dev *dev);
77void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp);
78void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp);
79int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags);
80int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed);
81void ssp_exit(struct ssp_dev *dev);
82#endif /* CONFIG_PXA_SSP_LEGACY */
83
84/**
85 * ssp_write_reg - Write to a SSP register
86 *
87 * @dev: SSP device to access
88 * @reg: Register to write to
89 * @val: Value to be written.
90 */
91static inline void ssp_write_reg(struct ssp_device *dev, u32 reg, u32 val)
92{
93 __raw_writel(val, dev->mmio_base + reg);
94}
95
96/**
97 * ssp_read_reg - Read from a SSP register
98 *
99 * @dev: SSP device to access
100 * @reg: Register to read from
101 */
102static inline u32 ssp_read_reg(struct ssp_device *dev, u32 reg)
103{
104 return __raw_readl(dev->mmio_base + reg);
105}
106
107struct ssp_device *ssp_request(int port, const char *label);
108void ssp_free(struct ssp_device *);
109#endif /* __ASM_ARCH_SSP_H */
diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h
index 4df2d38507dc..1bbd1f2e4beb 100644
--- a/arch/arm/mach-pxa/include/mach/tosa.h
+++ b/arch/arm/mach-pxa/include/mach/tosa.h
@@ -167,7 +167,7 @@
167 167
168#define TOSA_KEY_SYNC KEY_102ND /* ??? */ 168#define TOSA_KEY_SYNC KEY_102ND /* ??? */
169 169
170#ifndef CONFIG_KEYBOARD_TOSA_USE_EXT_KEYCODES 170#ifndef CONFIG_TOSA_USE_EXT_KEYCODES
171#define TOSA_KEY_RECORD KEY_YEN 171#define TOSA_KEY_RECORD KEY_YEN
172#define TOSA_KEY_ADDRESSBOOK KEY_KATAKANA 172#define TOSA_KEY_ADDRESSBOOK KEY_KATAKANA
173#define TOSA_KEY_CANCEL KEY_ESC 173#define TOSA_KEY_CANCEL KEY_ESC
diff --git a/arch/arm/mach-pxa/include/mach/vpac270.h b/arch/arm/mach-pxa/include/mach/vpac270.h
new file mode 100644
index 000000000000..7bfa3dd0fd5e
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/vpac270.h
@@ -0,0 +1,42 @@
1/*
2 * GPIOs and interrupts for Voipac PXA270
3 *
4 * Copyright (C) 2010
5 * Marek Vasut <marek.vasut@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 */
12
13#ifndef _INCLUDE_VPAC270_H_
14#define _INCLUDE_VPAC270_H_
15
16#define GPIO1_VPAC270_USER_BTN 1
17
18#define GPIO15_VPAC270_LED_ORANGE 15
19
20#define GPIO81_VPAC270_BKL_ON 81
21#define GPIO83_VPAC270_NL_ON 83
22
23#define GPIO52_VPAC270_SD_READONLY 52
24#define GPIO53_VPAC270_SD_DETECT_N 53
25
26#define GPIO84_VPAC270_PCMCIA_CD 84
27#define GPIO35_VPAC270_PCMCIA_RDY 35
28#define GPIO107_VPAC270_PCMCIA_PPEN 107
29#define GPIO11_VPAC270_PCMCIA_RESET 11
30#define GPIO17_VPAC270_CF_CD 17
31#define GPIO12_VPAC270_CF_RDY 12
32#define GPIO16_VPAC270_CF_RESET 16
33
34#define GPIO41_VPAC270_UDC_DETECT 41
35
36#define GPIO114_VPAC270_ETH_IRQ 114
37
38#define GPIO36_VPAC270_IDE_IRQ 36
39
40#define GPIO113_VPAC270_TS_IRQ 113
41
42#endif
diff --git a/arch/arm/mach-pxa/include/mach/z2.h b/arch/arm/mach-pxa/include/mach/z2.h
new file mode 100644
index 000000000000..8835c16bc82f
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/z2.h
@@ -0,0 +1,41 @@
1/*
2 * arch/arm/mach-pxa/include/mach/z2.h
3 *
4 * Author: Ken McGuire
5 * Created: Feb 6, 2009
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef ASM_ARCH_ZIPIT2_H
13#define ASM_ARCH_ZIPIT2_H
14
15/* LEDs */
16#define GPIO10_ZIPITZ2_LED_WIFI 10
17#define GPIO85_ZIPITZ2_LED_CHARGED 85
18#define GPIO83_ZIPITZ2_LED_CHARGING 83
19
20/* SD/MMC */
21#define GPIO96_ZIPITZ2_SD_DETECT 96
22
23/* GPIO Buttons */
24#define GPIO1_ZIPITZ2_POWER_BUTTON 1
25#define GPIO98_ZIPITZ2_LID_BUTTON 98
26
27/* Libertas GSPI8686 WiFi */
28#define GPIO14_ZIPITZ2_WIFI_RESET 14
29#define GPIO15_ZIPITZ2_WIFI_POWER 15
30#define GPIO24_ZIPITZ2_WIFI_CS 24
31#define GPIO36_ZIPITZ2_WIFI_IRQ 36
32
33/* LCD */
34#define GPIO19_ZIPITZ2_LCD_RESET 19
35#define GPIO88_ZIPITZ2_LCD_CS 88
36
37/* MISC GPIOs */
38#define GPIO0_ZIPITZ2_AC_DETECT 0
39#define GPIO37_ZIPITZ2_HEADSET_DETECT 37
40
41#endif
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index fa527b258d61..9b9046185b00 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -41,7 +41,6 @@
41 41
42#include <mach/pxa300.h> 42#include <mach/pxa300.h>
43#include <mach/pxafb.h> 43#include <mach/pxafb.h>
44#include <mach/ssp.h>
45#include <mach/mmc.h> 44#include <mach/mmc.h>
46#include <mach/pxa2xx_spi.h> 45#include <mach/pxa2xx_spi.h>
47#include <mach/pxa27x_keypad.h> 46#include <mach/pxa27x_keypad.h>
@@ -272,7 +271,7 @@ static inline void littleton_init_keypad(void) {}
272 271
273#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) 272#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
274static struct pxamci_platform_data littleton_mci_platform_data = { 273static struct pxamci_platform_data littleton_mci_platform_data = {
275 .detect_delay = 20, 274 .detect_delay_ms = 200,
276 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 275 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
277 .gpio_card_detect = GPIO_MMC1_CARD_DETECT, 276 .gpio_card_detect = GPIO_MMC1_CARD_DETECT,
278 .gpio_card_ro = -1, 277 .gpio_card_ro = -1,
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 63d65a2a0387..330c3282856e 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -478,7 +478,7 @@ static void lubbock_mci_exit(struct device *dev, void *data)
478 478
479static struct pxamci_platform_data lubbock_mci_platform_data = { 479static struct pxamci_platform_data lubbock_mci_platform_data = {
480 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 480 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
481 .detect_delay = 1, 481 .detect_delay_ms = 10,
482 .init = lubbock_mci_init, 482 .init = lubbock_mci_init,
483 .get_ro = lubbock_mci_get_ro, 483 .get_ro = lubbock_mci_get_ro,
484 .exit = lubbock_mci_exit, 484 .exit = lubbock_mci_exit,
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index cf6b720c055f..1d1419b73457 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -81,6 +81,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
81 PGSR(bank) &= ~mask; 81 PGSR(bank) &= ~mask;
82 is_out = 1; 82 is_out = 1;
83 break; 83 break;
84 case MFP_LPM_INPUT:
84 case MFP_LPM_DEFAULT: 85 case MFP_LPM_DEFAULT:
85 break; 86 break;
86 default: 87 default:
@@ -178,8 +179,17 @@ int gpio_set_wake(unsigned int gpio, unsigned int on)
178 if (!d->valid) 179 if (!d->valid)
179 return -EINVAL; 180 return -EINVAL;
180 181
181 if (d->keypad_gpio) 182 /* Allow keypad GPIOs to wakeup system when
182 return -EINVAL; 183 * configured as generic GPIOs.
184 */
185 if (d->keypad_gpio && (MFP_AF(d->config) == 0) &&
186 (d->config & MFP_LPM_CAN_WAKEUP)) {
187 if (on)
188 PKWR |= d->mask;
189 else
190 PKWR &= ~d->mask;
191 return 0;
192 }
183 193
184 mux_taken = (PWER & d->mux_mask) & (~d->mask); 194 mux_taken = (PWER & d->mux_mask) & (~d->mask);
185 if (on && mux_taken) 195 if (on && mux_taken)
@@ -239,21 +249,25 @@ static int pxa27x_pkwr_gpio[] = {
239int keypad_set_wake(unsigned int on) 249int keypad_set_wake(unsigned int on)
240{ 250{
241 unsigned int i, gpio, mask = 0; 251 unsigned int i, gpio, mask = 0;
242 252 struct gpio_desc *d;
243 if (!on) {
244 PKWR = 0;
245 return 0;
246 }
247 253
248 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) { 254 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
249 255
250 gpio = pxa27x_pkwr_gpio[i]; 256 gpio = pxa27x_pkwr_gpio[i];
257 d = &gpio_desc[gpio];
251 258
252 if (gpio_desc[gpio].config & MFP_LPM_CAN_WAKEUP) 259 /* skip if configured as generic GPIO */
260 if (MFP_AF(d->config) == 0)
261 continue;
262
263 if (d->config & MFP_LPM_CAN_WAKEUP)
253 mask |= gpio_desc[gpio].mask; 264 mask |= gpio_desc[gpio].mask;
254 } 265 }
255 266
256 PKWR = mask; 267 if (on)
268 PKWR |= mask;
269 else
270 PKWR &= ~mask;
257 return 0; 271 return 0;
258} 272}
259 273
@@ -328,6 +342,17 @@ static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
328{ 342{
329 int i; 343 int i;
330 344
345 /* set corresponding PGSR bit of those marked MFP_LPM_KEEP_OUTPUT */
346 for (i = 0; i < pxa_last_gpio; i++) {
347 if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
348 (GPDR(i) & GPIO_bit(i))) {
349 if (GPLR(i) & GPIO_bit(i))
350 PGSR(i) |= GPIO_bit(i);
351 else
352 PGSR(i) &= ~GPIO_bit(i);
353 }
354 }
355
331 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) { 356 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
332 357
333 saved_gafr[0][i] = GAFR_L(i); 358 saved_gafr[0][i] = GAFR_L(i);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 7a50ed8fce94..d60db87dde08 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -426,6 +426,7 @@ struct gpio_vbus_mach_info gpio_vbus_data = {
426 * to give the card a chance to fully insert/eject. 426 * to give the card a chance to fully insert/eject.
427 */ 427 */
428static struct pxamci_platform_data mioa701_mci_info = { 428static struct pxamci_platform_data mioa701_mci_info = {
429 .detect_delay_ms = 250,
429 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 430 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
430 .gpio_card_detect = GPIO15_SDIO_INSERT, 431 .gpio_card_detect = GPIO15_SDIO_INSERT,
431 .gpio_card_ro = GPIO78_SDIO_RO, 432 .gpio_card_ro = GPIO78_SDIO_RO,
@@ -791,7 +792,6 @@ static void __init mioa701_machine_init(void)
791 mio_gpio_request(ARRAY_AND_SIZE(global_gpios)); 792 mio_gpio_request(ARRAY_AND_SIZE(global_gpios));
792 bootstrap_init(); 793 bootstrap_init();
793 set_pxa_fb_info(&mioa701_pxafb_info); 794 set_pxa_fb_info(&mioa701_pxafb_info);
794 mioa701_mci_info.detect_delay = msecs_to_jiffies(250);
795 pxa_set_mci_info(&mioa701_mci_info); 795 pxa_set_mci_info(&mioa701_mci_info);
796 pxa_set_keypad_info(&mioa701_keypad_info); 796 pxa_set_keypad_info(&mioa701_keypad_info);
797 wm97xx_bat_set_pdata(&mioa701_battery_data); 797 wm97xx_bat_set_pdata(&mioa701_battery_data);
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
index 8c9c6f0d56bb..462167ac05f9 100644
--- a/arch/arm/mach-pxa/mxm8x10.c
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -325,7 +325,7 @@ static mfp_cfg_t mfp_cfg[] __initdata = {
325#if defined(CONFIG_MMC) 325#if defined(CONFIG_MMC)
326static struct pxamci_platform_data mxm_8x10_mci_platform_data = { 326static struct pxamci_platform_data mxm_8x10_mci_platform_data = {
327 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 327 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
328 .detect_delay = 1, 328 .detect_delay_ms = 10,
329 .gpio_card_detect = MXM_8X10_SD_nCD, 329 .gpio_card_detect = MXM_8X10_SD_nCD,
330 .gpio_card_ro = MXM_8X10_SD_WP, 330 .gpio_card_ro = MXM_8X10_SD_WP,
331 .gpio_power = -1 331 .gpio_power = -1
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index f70c75b38769..1963819dba98 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -168,7 +168,7 @@ static struct pxamci_platform_data palmld_mci_platform_data = {
168 .gpio_card_detect = GPIO_NR_PALMLD_SD_DETECT_N, 168 .gpio_card_detect = GPIO_NR_PALMLD_SD_DETECT_N,
169 .gpio_card_ro = GPIO_NR_PALMLD_SD_READONLY, 169 .gpio_card_ro = GPIO_NR_PALMLD_SD_READONLY,
170 .gpio_power = GPIO_NR_PALMLD_SD_POWER, 170 .gpio_power = GPIO_NR_PALMLD_SD_POWER,
171 .detect_delay = 20, 171 .detect_delay_ms = 200,
172}; 172};
173 173
174/****************************************************************************** 174/******************************************************************************
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index d902a813aae3..5305a3993e69 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -110,7 +110,7 @@ static struct pxamci_platform_data palmt5_mci_platform_data = {
110 .gpio_card_detect = GPIO_NR_PALMT5_SD_DETECT_N, 110 .gpio_card_detect = GPIO_NR_PALMT5_SD_DETECT_N,
111 .gpio_card_ro = GPIO_NR_PALMT5_SD_READONLY, 111 .gpio_card_ro = GPIO_NR_PALMT5_SD_READONLY,
112 .gpio_power = GPIO_NR_PALMT5_SD_POWER, 112 .gpio_power = GPIO_NR_PALMT5_SD_POWER,
113 .detect_delay = 20, 113 .detect_delay_ms = 200,
114}; 114};
115 115
116/****************************************************************************** 116/******************************************************************************
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 717d7a638675..033b567e50bb 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -121,7 +121,7 @@ static struct pxamci_platform_data palmtc_mci_platform_data = {
121 .gpio_power = GPIO_NR_PALMTC_SD_POWER, 121 .gpio_power = GPIO_NR_PALMTC_SD_POWER,
122 .gpio_card_ro = GPIO_NR_PALMTC_SD_READONLY, 122 .gpio_card_ro = GPIO_NR_PALMTC_SD_READONLY,
123 .gpio_card_detect = GPIO_NR_PALMTC_SD_DETECT_N, 123 .gpio_card_detect = GPIO_NR_PALMTC_SD_DETECT_N,
124 .detect_delay = 20, 124 .detect_delay_ms = 200,
125}; 125};
126 126
127/****************************************************************************** 127/******************************************************************************
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 007b58c11f8d..ecc1a401598e 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -170,7 +170,7 @@ static struct pxamci_platform_data palmtx_mci_platform_data = {
170 .gpio_card_detect = GPIO_NR_PALMTX_SD_DETECT_N, 170 .gpio_card_detect = GPIO_NR_PALMTX_SD_DETECT_N,
171 .gpio_card_ro = GPIO_NR_PALMTX_SD_READONLY, 171 .gpio_card_ro = GPIO_NR_PALMTX_SD_READONLY,
172 .gpio_power = GPIO_NR_PALMTX_SD_POWER, 172 .gpio_power = GPIO_NR_PALMTX_SD_POWER,
173 .detect_delay = 20, 173 .detect_delay_ms = 200,
174}; 174};
175 175
176/****************************************************************************** 176/******************************************************************************
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 9d0ecea1760c..f56ae1008759 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -326,7 +326,7 @@ static void pcm990_mci_exit(struct device *dev, void *data)
326#define MSECS_PER_JIFFY (1000/HZ) 326#define MSECS_PER_JIFFY (1000/HZ)
327 327
328static struct pxamci_platform_data pcm990_mci_platform_data = { 328static struct pxamci_platform_data pcm990_mci_platform_data = {
329 .detect_delay = 250 / MSECS_PER_JIFFY, 329 .detect_delay_ms = 250,
330 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 330 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
331 .init = pcm990_mci_init, 331 .init = pcm990_mci_init,
332 .setpower = pcm990_mci_setpower, 332 .setpower = pcm990_mci_setpower,
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index d58a52415d75..f4abdaafdac4 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -40,13 +40,12 @@
40#include <mach/pxa25x.h> 40#include <mach/pxa25x.h>
41#include <mach/mmc.h> 41#include <mach/mmc.h>
42#include <mach/udc.h> 42#include <mach/udc.h>
43#include <plat/i2c.h>
44#include <mach/irda.h> 43#include <mach/irda.h>
45#include <mach/poodle.h> 44#include <mach/poodle.h>
46#include <mach/pxafb.h> 45#include <mach/pxafb.h>
47#include <mach/sharpsl.h> 46#include <mach/sharpsl.h>
48#include <mach/ssp.h>
49#include <mach/pxa2xx_spi.h> 47#include <mach/pxa2xx_spi.h>
48#include <plat/i2c.h>
50 49
51#include <asm/hardware/scoop.h> 50#include <asm/hardware/scoop.h>
52#include <asm/hardware/locomo.h> 51#include <asm/hardware/locomo.h>
@@ -277,6 +276,7 @@ static void poodle_mci_exit(struct device *dev, void *data)
277} 276}
278 277
279static struct pxamci_platform_data poodle_mci_platform_data = { 278static struct pxamci_platform_data poodle_mci_platform_data = {
279 .detect_delay_ms = 250,
280 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 280 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
281 .init = poodle_mci_init, 281 .init = poodle_mci_init,
282 .setpower = poodle_mci_setpower, 282 .setpower = poodle_mci_setpower,
@@ -450,7 +450,6 @@ static void __init poodle_init(void)
450 set_pxa_fb_parent(&poodle_locomo_device.dev); 450 set_pxa_fb_parent(&poodle_locomo_device.dev);
451 set_pxa_fb_info(&poodle_fb_info); 451 set_pxa_fb_info(&poodle_fb_info);
452 pxa_set_udc_info(&udc_info); 452 pxa_set_udc_info(&udc_info);
453 poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250);
454 pxa_set_mci_info(&poodle_mci_platform_data); 453 pxa_set_mci_info(&poodle_mci_platform_data);
455 pxa_set_ficp_info(&poodle_ficp_platform_data); 454 pxa_set_ficp_info(&poodle_ficp_platform_data);
456 pxa_set_i2c_info(NULL); 455 pxa_set_i2c_info(NULL);
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 4d7c03e72504..f544e58e1536 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -29,7 +29,6 @@
29#include <mach/ohci.h> 29#include <mach/ohci.h>
30#include <mach/pm.h> 30#include <mach/pm.h>
31#include <mach/dma.h> 31#include <mach/dma.h>
32#include <mach/ssp.h>
33#include <mach/regs-intc.h> 32#include <mach/regs-intc.h>
34#include <plat/i2c.h> 33#include <plat/i2c.h>
35 34
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index d12667bd9ebe..d4b61b3f08f3 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -714,7 +714,7 @@ static void raumfeld_mci_exit(struct device *dev, void *data)
714static struct pxamci_platform_data raumfeld_mci_platform_data = { 714static struct pxamci_platform_data raumfeld_mci_platform_data = {
715 .init = raumfeld_mci_init, 715 .init = raumfeld_mci_init,
716 .exit = raumfeld_mci_exit, 716 .exit = raumfeld_mci_exit,
717 .detect_delay = 20, 717 .detect_delay_ms = 200,
718 .gpio_card_detect = -1, 718 .gpio_card_detect = -1,
719 .gpio_card_ro = -1, 719 .gpio_card_ro = -1,
720 .gpio_power = -1, 720 .gpio_power = -1,
diff --git a/arch/arm/mach-pxa/sharpsl.h b/arch/arm/mach-pxa/sharpsl.h
index 1439785d3979..0cc1203c5bef 100644
--- a/arch/arm/mach-pxa/sharpsl.h
+++ b/arch/arm/mach-pxa/sharpsl.h
@@ -10,29 +10,6 @@
10#include <mach/sharpsl_pm.h> 10#include <mach/sharpsl_pm.h>
11 11
12/* 12/*
13 * SharpSL SSP Driver
14 */
15struct corgissp_machinfo {
16 int port;
17 int cs_lcdcon;
18 int cs_ads7846;
19 int cs_max1111;
20 int clk_lcdcon;
21 int clk_ads7846;
22 int clk_max1111;
23};
24
25void corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo);
26
27
28/*
29 * SharpSL/Corgi LCD Driver
30 */
31void corgi_lcdtg_suspend(void);
32void corgi_lcdtg_hw_init(int mode);
33
34
35/*
36 * SharpSL Battery/PM Driver 13 * SharpSL Battery/PM Driver
37 */ 14 */
38#define READ_GPIO_BIT(x) (GPLR(x) & GPIO_bit(x)) 15#define READ_GPIO_BIT(x) (GPLR(x) & GPIO_bit(x))
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 463d874bb867..cb4767251f3c 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -28,7 +28,6 @@
28#include <asm/mach-types.h> 28#include <asm/mach-types.h>
29#include <mach/pm.h> 29#include <mach/pm.h>
30#include <mach/pxa2xx-regs.h> 30#include <mach/pxa2xx-regs.h>
31#include <mach/pxa2xx-gpio.h>
32#include <mach/regs-rtc.h> 31#include <mach/regs-rtc.h>
33#include <mach/sharpsl.h> 32#include <mach/sharpsl.h>
34#include <mach/sharpsl_pm.h> 33#include <mach/sharpsl_pm.h>
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 01bdd7500df4..4d2413ed0ffa 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -86,6 +86,7 @@ static unsigned long spitz_pin_config[] __initdata = {
86 86
87 /* GPIOs */ 87 /* GPIOs */
88 GPIO9_GPIO, /* SPITZ_GPIO_nSD_DETECT */ 88 GPIO9_GPIO, /* SPITZ_GPIO_nSD_DETECT */
89 GPIO16_GPIO, /* SPITZ_GPIO_SYNC */
89 GPIO81_GPIO, /* SPITZ_GPIO_nSD_WP */ 90 GPIO81_GPIO, /* SPITZ_GPIO_nSD_WP */
90 GPIO41_GPIO, /* SPITZ_GPIO_USB_CONNECT */ 91 GPIO41_GPIO, /* SPITZ_GPIO_USB_CONNECT */
91 GPIO37_GPIO, /* SPITZ_GPIO_USB_HOST */ 92 GPIO37_GPIO, /* SPITZ_GPIO_USB_HOST */
@@ -119,7 +120,8 @@ static unsigned long spitz_pin_config[] __initdata = {
119 GPIO117_I2C_SCL, 120 GPIO117_I2C_SCL,
120 GPIO118_I2C_SDA, 121 GPIO118_I2C_SDA,
121 122
122 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, 123 GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* SPITZ_GPIO_KEY_INT */
124 GPIO1_GPIO | WAKEUP_ON_EDGE_FALL, /* SPITZ_GPIO_RESET */
123}; 125};
124 126
125/* 127/*
@@ -537,6 +539,7 @@ static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
537} 539}
538 540
539static struct pxamci_platform_data spitz_mci_platform_data = { 541static struct pxamci_platform_data spitz_mci_platform_data = {
542 .detect_delay_ms = 250,
540 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 543 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
541 .setpower = spitz_mci_setpower, 544 .setpower = spitz_mci_setpower,
542 .gpio_card_detect = SPITZ_GPIO_nSD_DETECT, 545 .gpio_card_detect = SPITZ_GPIO_nSD_DETECT,
@@ -757,7 +760,6 @@ static void __init common_init(void)
757 spitz_init_spi(); 760 spitz_init_spi();
758 761
759 platform_add_devices(devices, ARRAY_SIZE(devices)); 762 platform_add_devices(devices, ARRAY_SIZE(devices));
760 spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250);
761 pxa_set_mci_info(&spitz_mci_platform_data); 763 pxa_set_mci_info(&spitz_mci_platform_data);
762 pxa_set_ohci_info(&spitz_ohci_platform_data); 764 pxa_set_ohci_info(&spitz_ohci_platform_data);
763 pxa_set_ficp_info(&spitz_ficp_platform_data); 765 pxa_set_ficp_info(&spitz_ficp_platform_data);
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index fc5a70c40358..4209ddf6da61 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -24,9 +24,10 @@
24 24
25#include <mach/sharpsl.h> 25#include <mach/sharpsl.h>
26#include <mach/spitz.h> 26#include <mach/spitz.h>
27#include <mach/pxa2xx-regs.h> 27#include <mach/pxa27x.h>
28#include <mach/pxa2xx-gpio.h> 28
29#include "sharpsl.h" 29#include "sharpsl.h"
30#include "generic.h"
30 31
31#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */ 32#define SHARPSL_CHARGE_ON_VOLT 0x99 /* 2.9V */
32#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */ 33#define SHARPSL_CHARGE_ON_TEMP 0xe0 /* 2.9V */
@@ -37,10 +38,17 @@
37 38
38static int spitz_last_ac_status; 39static int spitz_last_ac_status;
39 40
41static struct gpio spitz_charger_gpios[] = {
42 { SPITZ_GPIO_KEY_INT, GPIOF_IN, "Keyboard Interrupt" },
43 { SPITZ_GPIO_SYNC, GPIOF_IN, "Sync" },
44 { SPITZ_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },
45 { SPITZ_GPIO_JK_B, GPIOF_OUT_INIT_LOW, "JK B" },
46 { SPITZ_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" },
47};
48
40static void spitz_charger_init(void) 49static void spitz_charger_init(void)
41{ 50{
42 pxa_gpio_mode(SPITZ_GPIO_KEY_INT | GPIO_IN); 51 gpio_request_array(ARRAY_AND_SIZE(spitz_charger_gpios));
43 pxa_gpio_mode(SPITZ_GPIO_SYNC | GPIO_IN);
44} 52}
45 53
46static void spitz_measure_temp(int on) 54static void spitz_measure_temp(int on)
@@ -76,6 +84,11 @@ static void spitz_discharge1(int on)
76 gpio_set_value(SPITZ_GPIO_LED_GREEN, on); 84 gpio_set_value(SPITZ_GPIO_LED_GREEN, on);
77} 85}
78 86
87static unsigned long gpio18_config[] = {
88 GPIO18_RDY,
89 GPIO18_GPIO,
90};
91
79static void spitz_presuspend(void) 92static void spitz_presuspend(void)
80{ 93{
81 spitz_last_ac_status = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN); 94 spitz_last_ac_status = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN);
@@ -97,7 +110,9 @@ static void spitz_presuspend(void)
97 PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT; 110 PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT;
98 PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0); 111 PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0);
99 112
100 pxa_gpio_mode(GPIO18_RDY|GPIO_OUT | GPIO_DFLT_HIGH); 113 pxa2xx_mfp_config(&gpio18_config[0], 1);
114 gpio_request_one(18, GPIOF_OUT_INIT_HIGH, "Unknown");
115 gpio_free(18);
101 116
102 PRER = GPIO_bit(SPITZ_GPIO_KEY_INT); 117 PRER = GPIO_bit(SPITZ_GPIO_KEY_INT);
103 PFER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET); 118 PFER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET);
@@ -114,8 +129,7 @@ static void spitz_presuspend(void)
114 129
115static void spitz_postsuspend(void) 130static void spitz_postsuspend(void)
116{ 131{
117 pxa_gpio_mode(GPIO18_RDY_MD); 132 pxa2xx_mfp_config(&gpio18_config[1], 1);
118 pxa_gpio_mode(10 | GPIO_IN);
119} 133}
120 134
121static int spitz_should_wakeup(unsigned int resume_on_alarm) 135static int spitz_should_wakeup(unsigned int resume_on_alarm)
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c
deleted file mode 100644
index a81d6dbf662d..000000000000
--- a/arch/arm/mach-pxa/ssp.c
+++ /dev/null
@@ -1,510 +0,0 @@
1/*
2 * linux/arch/arm/mach-pxa/ssp.c
3 *
4 * based on linux/arch/arm/mach-sa1100/ssp.c by Russell King
5 *
6 * Copyright (C) 2003 Russell King.
7 * Copyright (C) 2003 Wolfson Microelectronics PLC
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * PXA2xx SSP driver. This provides the generic core for simple
14 * IO-based SSP applications and allows easy port setup for DMA access.
15 *
16 * Author: Liam Girdwood <liam.girdwood@wolfsonmicro.com>
17 */
18
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/sched.h>
22#include <linux/slab.h>
23#include <linux/errno.h>
24#include <linux/interrupt.h>
25#include <linux/ioport.h>
26#include <linux/init.h>
27#include <linux/mutex.h>
28#include <linux/clk.h>
29#include <linux/err.h>
30#include <linux/platform_device.h>
31#include <linux/io.h>
32
33#include <asm/irq.h>
34#include <mach/hardware.h>
35#include <mach/ssp.h>
36#include <mach/regs-ssp.h>
37
38#ifdef CONFIG_PXA_SSP_LEGACY
39
40#define TIMEOUT 100000
41
42static irqreturn_t ssp_interrupt(int irq, void *dev_id)
43{
44 struct ssp_dev *dev = dev_id;
45 struct ssp_device *ssp = dev->ssp;
46 unsigned int status;
47
48 status = __raw_readl(ssp->mmio_base + SSSR);
49 __raw_writel(status, ssp->mmio_base + SSSR);
50
51 if (status & SSSR_ROR)
52 printk(KERN_WARNING "SSP(%d): receiver overrun\n", dev->port);
53
54 if (status & SSSR_TUR)
55 printk(KERN_WARNING "SSP(%d): transmitter underrun\n", dev->port);
56
57 if (status & SSSR_BCE)
58 printk(KERN_WARNING "SSP(%d): bit count error\n", dev->port);
59
60 return IRQ_HANDLED;
61}
62
63/**
64 * ssp_write_word - write a word to the SSP port
65 * @data: 32-bit, MSB justified data to write.
66 *
67 * Wait for a free entry in the SSP transmit FIFO, and write a data
68 * word to the SSP port.
69 *
70 * The caller is expected to perform the necessary locking.
71 *
72 * Returns:
73 * %-ETIMEDOUT timeout occurred
74 * 0 success
75 */
76int ssp_write_word(struct ssp_dev *dev, u32 data)
77{
78 struct ssp_device *ssp = dev->ssp;
79 int timeout = TIMEOUT;
80
81 while (!(__raw_readl(ssp->mmio_base + SSSR) & SSSR_TNF)) {
82 if (!--timeout)
83 return -ETIMEDOUT;
84 cpu_relax();
85 }
86
87 __raw_writel(data, ssp->mmio_base + SSDR);
88
89 return 0;
90}
91
92/**
93 * ssp_read_word - read a word from the SSP port
94 *
95 * Wait for a data word in the SSP receive FIFO, and return the
96 * received data. Data is LSB justified.
97 *
98 * Note: Currently, if data is not expected to be received, this
99 * function will wait for ever.
100 *
101 * The caller is expected to perform the necessary locking.
102 *
103 * Returns:
104 * %-ETIMEDOUT timeout occurred
105 * 32-bit data success
106 */
107int ssp_read_word(struct ssp_dev *dev, u32 *data)
108{
109 struct ssp_device *ssp = dev->ssp;
110 int timeout = TIMEOUT;
111
112 while (!(__raw_readl(ssp->mmio_base + SSSR) & SSSR_RNE)) {
113 if (!--timeout)
114 return -ETIMEDOUT;
115 cpu_relax();
116 }
117
118 *data = __raw_readl(ssp->mmio_base + SSDR);
119 return 0;
120}
121
122/**
123 * ssp_flush - flush the transmit and receive FIFOs
124 *
125 * Wait for the SSP to idle, and ensure that the receive FIFO
126 * is empty.
127 *
128 * The caller is expected to perform the necessary locking.
129 */
130int ssp_flush(struct ssp_dev *dev)
131{
132 struct ssp_device *ssp = dev->ssp;
133 int timeout = TIMEOUT * 2;
134
135 /* ensure TX FIFO is empty instead of not full */
136 if (cpu_is_pxa3xx()) {
137 while (__raw_readl(ssp->mmio_base + SSSR) & 0xf00) {
138 if (!--timeout)
139 return -ETIMEDOUT;
140 cpu_relax();
141 }
142 timeout = TIMEOUT * 2;
143 }
144
145 do {
146 while (__raw_readl(ssp->mmio_base + SSSR) & SSSR_RNE) {
147 if (!--timeout)
148 return -ETIMEDOUT;
149 (void)__raw_readl(ssp->mmio_base + SSDR);
150 }
151 if (!--timeout)
152 return -ETIMEDOUT;
153 } while (__raw_readl(ssp->mmio_base + SSSR) & SSSR_BSY);
154
155 return 0;
156}
157
158/**
159 * ssp_enable - enable the SSP port
160 *
161 * Turn on the SSP port.
162 */
163void ssp_enable(struct ssp_dev *dev)
164{
165 struct ssp_device *ssp = dev->ssp;
166 uint32_t sscr0;
167
168 sscr0 = __raw_readl(ssp->mmio_base + SSCR0);
169 sscr0 |= SSCR0_SSE;
170 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
171}
172
173/**
174 * ssp_disable - shut down the SSP port
175 *
176 * Turn off the SSP port, optionally powering it down.
177 */
178void ssp_disable(struct ssp_dev *dev)
179{
180 struct ssp_device *ssp = dev->ssp;
181 uint32_t sscr0;
182
183 sscr0 = __raw_readl(ssp->mmio_base + SSCR0);
184 sscr0 &= ~SSCR0_SSE;
185 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
186}
187
188/**
189 * ssp_save_state - save the SSP configuration
190 * @ssp: pointer to structure to save SSP configuration
191 *
192 * Save the configured SSP state for suspend.
193 */
194void ssp_save_state(struct ssp_dev *dev, struct ssp_state *state)
195{
196 struct ssp_device *ssp = dev->ssp;
197
198 state->cr0 = __raw_readl(ssp->mmio_base + SSCR0);
199 state->cr1 = __raw_readl(ssp->mmio_base + SSCR1);
200 state->to = __raw_readl(ssp->mmio_base + SSTO);
201 state->psp = __raw_readl(ssp->mmio_base + SSPSP);
202
203 ssp_disable(dev);
204}
205
206/**
207 * ssp_restore_state - restore a previously saved SSP configuration
208 * @ssp: pointer to configuration saved by ssp_save_state
209 *
210 * Restore the SSP configuration saved previously by ssp_save_state.
211 */
212void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *state)
213{
214 struct ssp_device *ssp = dev->ssp;
215 uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE;
216
217 __raw_writel(sssr, ssp->mmio_base + SSSR);
218
219 __raw_writel(state->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0);
220 __raw_writel(state->cr1, ssp->mmio_base + SSCR1);
221 __raw_writel(state->to, ssp->mmio_base + SSTO);
222 __raw_writel(state->psp, ssp->mmio_base + SSPSP);
223 __raw_writel(state->cr0, ssp->mmio_base + SSCR0);
224}
225
226/**
227 * ssp_config - configure SSP port settings
228 * @mode: port operating mode
229 * @flags: port config flags
230 * @psp_flags: port PSP config flags
231 * @speed: port speed
232 *
233 * Port MUST be disabled by ssp_disable before making any config changes.
234 */
235int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed)
236{
237 struct ssp_device *ssp = dev->ssp;
238
239 dev->mode = mode;
240 dev->flags = flags;
241 dev->psp_flags = psp_flags;
242 dev->speed = speed;
243
244 /* set up port type, speed, port settings */
245 __raw_writel((dev->speed | dev->mode), ssp->mmio_base + SSCR0);
246 __raw_writel(dev->flags, ssp->mmio_base + SSCR1);
247 __raw_writel(dev->psp_flags, ssp->mmio_base + SSPSP);
248
249 return 0;
250}
251
252/**
253 * ssp_init - setup the SSP port
254 *
255 * initialise and claim resources for the SSP port.
256 *
257 * Returns:
258 * %-ENODEV if the SSP port is unavailable
259 * %-EBUSY if the resources are already in use
260 * %0 on success
261 */
262int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags)
263{
264 struct ssp_device *ssp;
265 int ret;
266
267 ssp = ssp_request(port, "SSP");
268 if (ssp == NULL)
269 return -ENODEV;
270
271 dev->ssp = ssp;
272 dev->port = port;
273
274 /* do we need to get irq */
275 if (!(init_flags & SSP_NO_IRQ)) {
276 ret = request_irq(ssp->irq, ssp_interrupt,
277 0, "SSP", dev);
278 if (ret)
279 goto out_region;
280 dev->irq = ssp->irq;
281 } else
282 dev->irq = NO_IRQ;
283
284 /* turn on SSP port clock */
285 clk_enable(ssp->clk);
286 return 0;
287
288out_region:
289 ssp_free(ssp);
290 return ret;
291}
292
293/**
294 * ssp_exit - undo the effects of ssp_init
295 *
296 * release and free resources for the SSP port.
297 */
298void ssp_exit(struct ssp_dev *dev)
299{
300 struct ssp_device *ssp = dev->ssp;
301
302 ssp_disable(dev);
303 if (dev->irq != NO_IRQ)
304 free_irq(dev->irq, dev);
305 clk_disable(ssp->clk);
306 ssp_free(ssp);
307}
308#endif /* CONFIG_PXA_SSP_LEGACY */
309
310static DEFINE_MUTEX(ssp_lock);
311static LIST_HEAD(ssp_list);
312
313struct ssp_device *ssp_request(int port, const char *label)
314{
315 struct ssp_device *ssp = NULL;
316
317 mutex_lock(&ssp_lock);
318
319 list_for_each_entry(ssp, &ssp_list, node) {
320 if (ssp->port_id == port && ssp->use_count == 0) {
321 ssp->use_count++;
322 ssp->label = label;
323 break;
324 }
325 }
326
327 mutex_unlock(&ssp_lock);
328
329 if (&ssp->node == &ssp_list)
330 return NULL;
331
332 return ssp;
333}
334EXPORT_SYMBOL(ssp_request);
335
336void ssp_free(struct ssp_device *ssp)
337{
338 mutex_lock(&ssp_lock);
339 if (ssp->use_count) {
340 ssp->use_count--;
341 ssp->label = NULL;
342 } else
343 dev_err(&ssp->pdev->dev, "device already free\n");
344 mutex_unlock(&ssp_lock);
345}
346EXPORT_SYMBOL(ssp_free);
347
348static int __devinit ssp_probe(struct platform_device *pdev)
349{
350 const struct platform_device_id *id = platform_get_device_id(pdev);
351 struct resource *res;
352 struct ssp_device *ssp;
353 int ret = 0;
354
355 ssp = kzalloc(sizeof(struct ssp_device), GFP_KERNEL);
356 if (ssp == NULL) {
357 dev_err(&pdev->dev, "failed to allocate memory");
358 return -ENOMEM;
359 }
360 ssp->pdev = pdev;
361
362 ssp->clk = clk_get(&pdev->dev, NULL);
363 if (IS_ERR(ssp->clk)) {
364 ret = PTR_ERR(ssp->clk);
365 goto err_free;
366 }
367
368 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
369 if (res == NULL) {
370 dev_err(&pdev->dev, "no memory resource defined\n");
371 ret = -ENODEV;
372 goto err_free_clk;
373 }
374
375 res = request_mem_region(res->start, res->end - res->start + 1,
376 pdev->name);
377 if (res == NULL) {
378 dev_err(&pdev->dev, "failed to request memory resource\n");
379 ret = -EBUSY;
380 goto err_free_clk;
381 }
382
383 ssp->phys_base = res->start;
384
385 ssp->mmio_base = ioremap(res->start, res->end - res->start + 1);
386 if (ssp->mmio_base == NULL) {
387 dev_err(&pdev->dev, "failed to ioremap() registers\n");
388 ret = -ENODEV;
389 goto err_free_mem;
390 }
391
392 ssp->irq = platform_get_irq(pdev, 0);
393 if (ssp->irq < 0) {
394 dev_err(&pdev->dev, "no IRQ resource defined\n");
395 ret = -ENODEV;
396 goto err_free_io;
397 }
398
399 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
400 if (res == NULL) {
401 dev_err(&pdev->dev, "no SSP RX DRCMR defined\n");
402 ret = -ENODEV;
403 goto err_free_io;
404 }
405 ssp->drcmr_rx = res->start;
406
407 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
408 if (res == NULL) {
409 dev_err(&pdev->dev, "no SSP TX DRCMR defined\n");
410 ret = -ENODEV;
411 goto err_free_io;
412 }
413 ssp->drcmr_tx = res->start;
414
415 /* PXA2xx/3xx SSP ports starts from 1 and the internal pdev->id
416 * starts from 0, do a translation here
417 */
418 ssp->port_id = pdev->id + 1;
419 ssp->use_count = 0;
420 ssp->type = (int)id->driver_data;
421
422 mutex_lock(&ssp_lock);
423 list_add(&ssp->node, &ssp_list);
424 mutex_unlock(&ssp_lock);
425
426 platform_set_drvdata(pdev, ssp);
427 return 0;
428
429err_free_io:
430 iounmap(ssp->mmio_base);
431err_free_mem:
432 release_mem_region(res->start, res->end - res->start + 1);
433err_free_clk:
434 clk_put(ssp->clk);
435err_free:
436 kfree(ssp);
437 return ret;
438}
439
440static int __devexit ssp_remove(struct platform_device *pdev)
441{
442 struct resource *res;
443 struct ssp_device *ssp;
444
445 ssp = platform_get_drvdata(pdev);
446 if (ssp == NULL)
447 return -ENODEV;
448
449 iounmap(ssp->mmio_base);
450
451 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
452 release_mem_region(res->start, res->end - res->start + 1);
453
454 clk_put(ssp->clk);
455
456 mutex_lock(&ssp_lock);
457 list_del(&ssp->node);
458 mutex_unlock(&ssp_lock);
459
460 kfree(ssp);
461 return 0;
462}
463
464static const struct platform_device_id ssp_id_table[] = {
465 { "pxa25x-ssp", PXA25x_SSP },
466 { "pxa25x-nssp", PXA25x_NSSP },
467 { "pxa27x-ssp", PXA27x_SSP },
468 { },
469};
470
471static struct platform_driver ssp_driver = {
472 .probe = ssp_probe,
473 .remove = __devexit_p(ssp_remove),
474 .driver = {
475 .owner = THIS_MODULE,
476 .name = "pxa2xx-ssp",
477 },
478 .id_table = ssp_id_table,
479};
480
481static int __init pxa_ssp_init(void)
482{
483 return platform_driver_register(&ssp_driver);
484}
485
486static void __exit pxa_ssp_exit(void)
487{
488 platform_driver_unregister(&ssp_driver);
489}
490
491arch_initcall(pxa_ssp_init);
492module_exit(pxa_ssp_exit);
493
494#ifdef CONFIG_PXA_SSP_LEGACY
495EXPORT_SYMBOL(ssp_write_word);
496EXPORT_SYMBOL(ssp_read_word);
497EXPORT_SYMBOL(ssp_flush);
498EXPORT_SYMBOL(ssp_enable);
499EXPORT_SYMBOL(ssp_disable);
500EXPORT_SYMBOL(ssp_save_state);
501EXPORT_SYMBOL(ssp_restore_state);
502EXPORT_SYMBOL(ssp_init);
503EXPORT_SYMBOL(ssp_exit);
504EXPORT_SYMBOL(ssp_config);
505#endif
506
507MODULE_DESCRIPTION("PXA SSP driver");
508MODULE_AUTHOR("Liam Girdwood");
509MODULE_LICENSE("GPL");
510
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 2041eb1d90ba..af40d2a12d37 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -464,8 +464,6 @@ static struct platform_device smc91x_device = {
464 464
465 465
466 466
467static struct pxamci_platform_data stargate2_mci_platform_data;
468
469/* 467/*
470 * The card detect interrupt isn't debounced so we delay it by 250ms 468 * The card detect interrupt isn't debounced so we delay it by 250ms
471 * to give the card a chance to fully insert / eject. 469 * to give the card a chance to fully insert / eject.
@@ -489,8 +487,6 @@ static int stargate2_mci_init(struct device *dev,
489 goto free_power_en; 487 goto free_power_en;
490 } 488 }
491 gpio_direction_input(SG2_GPIO_nSD_DETECT); 489 gpio_direction_input(SG2_GPIO_nSD_DETECT);
492 /* Delay to allow for full insertion */
493 stargate2_mci_platform_data.detect_delay = msecs_to_jiffies(250);
494 490
495 err = request_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT), 491 err = request_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT),
496 stargate2_detect_int, 492 stargate2_detect_int,
@@ -529,6 +525,7 @@ static void stargate2_mci_exit(struct device *dev, void *data)
529} 525}
530 526
531static struct pxamci_platform_data stargate2_mci_platform_data = { 527static struct pxamci_platform_data stargate2_mci_platform_data = {
528 .detect_delay_ms = 250,
532 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 529 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
533 .init = stargate2_mci_init, 530 .init = stargate2_mci_init,
534 .setpower = stargate2_mci_setpower, 531 .setpower = stargate2_mci_setpower,
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index ad552791c4ce..7512b822c6ca 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -275,6 +275,7 @@ static void tosa_mci_exit(struct device *dev, void *data)
275} 275}
276 276
277static struct pxamci_platform_data tosa_mci_platform_data = { 277static struct pxamci_platform_data tosa_mci_platform_data = {
278 .detect_delay_ms = 250,
278 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 279 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
279 .init = tosa_mci_init, 280 .init = tosa_mci_init,
280 .exit = tosa_mci_exit, 281 .exit = tosa_mci_exit,
@@ -926,7 +927,6 @@ static void __init tosa_init(void)
926 dummy = gpiochip_reserve(TOSA_SCOOP_JC_GPIO_BASE, 12); 927 dummy = gpiochip_reserve(TOSA_SCOOP_JC_GPIO_BASE, 12);
927 dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16); 928 dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16);
928 929
929 tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250);
930 pxa_set_mci_info(&tosa_mci_platform_data); 930 pxa_set_mci_info(&tosa_mci_platform_data);
931 pxa_set_udc_info(&udc_info); 931 pxa_set_udc_info(&udc_info);
932 pxa_set_ficp_info(&tosa_ficp_platform_data); 932 pxa_set_ficp_info(&tosa_ficp_platform_data);
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 797f2544d0ce..69689112eae7 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -349,7 +349,7 @@ static void trizeps4_mci_exit(struct device *dev, void *data)
349 349
350static struct pxamci_platform_data trizeps4_mci_platform_data = { 350static struct pxamci_platform_data trizeps4_mci_platform_data = {
351 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 351 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
352 .detect_delay = 1, 352 .detect_delay_ms= 10,
353 .init = trizeps4_mci_init, 353 .init = trizeps4_mci_init,
354 .exit = trizeps4_mci_exit, 354 .exit = trizeps4_mci_exit,
355 .get_ro = NULL, /* write-protection not supported */ 355 .get_ro = NULL, /* write-protection not supported */
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
new file mode 100644
index 000000000000..9884fa978f16
--- /dev/null
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -0,0 +1,615 @@
1/*
2 * Hardware definitions for Voipac PXA270
3 *
4 * Copyright (C) 2010
5 * Marek Vasut <marek.vasut@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 */
12
13#include <linux/platform_device.h>
14#include <linux/delay.h>
15#include <linux/irq.h>
16#include <linux/gpio_keys.h>
17#include <linux/input.h>
18#include <linux/gpio.h>
19#include <linux/sysdev.h>
20#include <linux/usb/gpio_vbus.h>
21#include <linux/mtd/mtd.h>
22#include <linux/mtd/partitions.h>
23#include <linux/mtd/physmap.h>
24#include <linux/mtd/onenand.h>
25#include <linux/dm9000.h>
26#include <linux/ucb1400.h>
27#include <linux/ata_platform.h>
28
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31
32#include <mach/pxa27x.h>
33#include <mach/audio.h>
34#include <mach/vpac270.h>
35#include <mach/mmc.h>
36#include <mach/pxafb.h>
37#include <mach/ohci.h>
38#include <mach/pxa27x-udc.h>
39#include <mach/udc.h>
40
41#include <plat/i2c.h>
42
43#include "generic.h"
44#include "devices.h"
45
46/******************************************************************************
47 * Pin configuration
48 ******************************************************************************/
49static unsigned long vpac270_pin_config[] __initdata = {
50 /* MMC */
51 GPIO32_MMC_CLK,
52 GPIO92_MMC_DAT_0,
53 GPIO109_MMC_DAT_1,
54 GPIO110_MMC_DAT_2,
55 GPIO111_MMC_DAT_3,
56 GPIO112_MMC_CMD,
57 GPIO53_GPIO, /* SD detect */
58 GPIO52_GPIO, /* SD r/o switch */
59
60 /* GPIO KEYS */
61 GPIO1_GPIO, /* USER BTN */
62
63 /* LEDs */
64 GPIO15_GPIO, /* orange led */
65
66 /* FFUART */
67 GPIO34_FFUART_RXD,
68 GPIO39_FFUART_TXD,
69 GPIO27_FFUART_RTS,
70 GPIO100_FFUART_CTS,
71 GPIO33_FFUART_DSR,
72 GPIO40_FFUART_DTR,
73 GPIO10_FFUART_DCD,
74 GPIO38_FFUART_RI,
75
76 /* LCD */
77 GPIO58_LCD_LDD_0,
78 GPIO59_LCD_LDD_1,
79 GPIO60_LCD_LDD_2,
80 GPIO61_LCD_LDD_3,
81 GPIO62_LCD_LDD_4,
82 GPIO63_LCD_LDD_5,
83 GPIO64_LCD_LDD_6,
84 GPIO65_LCD_LDD_7,
85 GPIO66_LCD_LDD_8,
86 GPIO67_LCD_LDD_9,
87 GPIO68_LCD_LDD_10,
88 GPIO69_LCD_LDD_11,
89 GPIO70_LCD_LDD_12,
90 GPIO71_LCD_LDD_13,
91 GPIO72_LCD_LDD_14,
92 GPIO73_LCD_LDD_15,
93 GPIO86_LCD_LDD_16,
94 GPIO87_LCD_LDD_17,
95 GPIO74_LCD_FCLK,
96 GPIO75_LCD_LCLK,
97 GPIO76_LCD_PCLK,
98 GPIO77_LCD_BIAS,
99
100 /* PCMCIA */
101 GPIO48_nPOE,
102 GPIO49_nPWE,
103 GPIO50_nPIOR,
104 GPIO51_nPIOW,
105 GPIO85_nPCE_1,
106 GPIO54_nPCE_2,
107 GPIO55_nPREG,
108 GPIO57_nIOIS16,
109 GPIO56_nPWAIT,
110 GPIO104_PSKTSEL,
111 GPIO84_GPIO, /* PCMCIA CD */
112 GPIO35_GPIO, /* PCMCIA RDY */
113 GPIO107_GPIO, /* PCMCIA PPEN */
114 GPIO11_GPIO, /* PCMCIA RESET */
115 GPIO17_GPIO, /* CF CD */
116 GPIO12_GPIO, /* CF RDY */
117 GPIO16_GPIO, /* CF RESET */
118
119 /* UHC */
120 GPIO88_USBH1_PWR,
121 GPIO89_USBH1_PEN,
122 GPIO119_USBH2_PWR,
123 GPIO120_USBH2_PEN,
124
125 /* UDC */
126 GPIO41_GPIO,
127
128 /* Ethernet */
129 GPIO114_GPIO, /* IRQ */
130
131 /* AC97 */
132 GPIO28_AC97_BITCLK,
133 GPIO29_AC97_SDATA_IN_0,
134 GPIO30_AC97_SDATA_OUT,
135 GPIO31_AC97_SYNC,
136 GPIO95_AC97_nRESET,
137 GPIO98_AC97_SYSCLK,
138 GPIO113_GPIO, /* TS IRQ */
139
140 /* I2C */
141 GPIO117_I2C_SCL,
142 GPIO118_I2C_SDA,
143
144 /* IDE */
145 GPIO36_GPIO, /* IDE IRQ */
146 GPIO80_DREQ_1,
147};
148
149/******************************************************************************
150 * NOR Flash
151 ******************************************************************************/
152#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
153static struct mtd_partition vpac270_nor_partitions[] = {
154 {
155 .name = "Flash",
156 .offset = 0x00000000,
157 .size = MTDPART_SIZ_FULL,
158 }
159};
160
161static struct physmap_flash_data vpac270_flash_data[] = {
162 {
163 .width = 2, /* bankwidth in bytes */
164 .parts = vpac270_nor_partitions,
165 .nr_parts = ARRAY_SIZE(vpac270_nor_partitions)
166 }
167};
168
169static struct resource vpac270_flash_resource = {
170 .start = PXA_CS0_PHYS,
171 .end = PXA_CS0_PHYS + SZ_64M - 1,
172 .flags = IORESOURCE_MEM,
173};
174
175static struct platform_device vpac270_flash = {
176 .name = "physmap-flash",
177 .id = 0,
178 .resource = &vpac270_flash_resource,
179 .num_resources = 1,
180 .dev = {
181 .platform_data = vpac270_flash_data,
182 },
183};
184static void __init vpac270_nor_init(void)
185{
186 platform_device_register(&vpac270_flash);
187}
188#else
189static inline void vpac270_nor_init(void) {}
190#endif
191
192/******************************************************************************
193 * OneNAND Flash
194 ******************************************************************************/
195#if defined(CONFIG_MTD_ONENAND) || defined(CONFIG_MTD_ONENAND_MODULE)
196static struct mtd_partition vpac270_onenand_partitions[] = {
197 {
198 .name = "Flash",
199 .offset = 0x00000000,
200 .size = MTDPART_SIZ_FULL,
201 }
202};
203
204static struct onenand_platform_data vpac270_onenand_info = {
205 .parts = vpac270_onenand_partitions,
206 .nr_parts = ARRAY_SIZE(vpac270_onenand_partitions),
207};
208
209static struct resource vpac270_onenand_resources[] = {
210 [0] = {
211 .start = PXA_CS0_PHYS,
212 .end = PXA_CS0_PHYS + SZ_1M,
213 .flags = IORESOURCE_MEM,
214 },
215};
216
217static struct platform_device vpac270_onenand = {
218 .name = "onenand-flash",
219 .id = -1,
220 .resource = vpac270_onenand_resources,
221 .num_resources = ARRAY_SIZE(vpac270_onenand_resources),
222 .dev = {
223 .platform_data = &vpac270_onenand_info,
224 },
225};
226
227static void __init vpac270_onenand_init(void)
228{
229 platform_device_register(&vpac270_onenand);
230}
231#else
232static void __init vpac270_onenand_init(void) {}
233#endif
234
235/******************************************************************************
236 * SD/MMC card controller
237 ******************************************************************************/
238#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
239static struct pxamci_platform_data vpac270_mci_platform_data = {
240 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
241 .gpio_card_detect = GPIO53_VPAC270_SD_DETECT_N,
242 .gpio_card_ro = GPIO52_VPAC270_SD_READONLY,
243 .detect_delay_ms = 200,
244};
245
246static void __init vpac270_mmc_init(void)
247{
248 pxa_set_mci_info(&vpac270_mci_platform_data);
249}
250#else
251static inline void vpac270_mmc_init(void) {}
252#endif
253
254/******************************************************************************
255 * GPIO keys
256 ******************************************************************************/
257#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
258static struct gpio_keys_button vpac270_pxa_buttons[] = {
259 {KEY_POWER, GPIO1_VPAC270_USER_BTN, 0, "USER BTN"},
260};
261
262static struct gpio_keys_platform_data vpac270_pxa_keys_data = {
263 .buttons = vpac270_pxa_buttons,
264 .nbuttons = ARRAY_SIZE(vpac270_pxa_buttons),
265};
266
267static struct platform_device vpac270_pxa_keys = {
268 .name = "gpio-keys",
269 .id = -1,
270 .dev = {
271 .platform_data = &vpac270_pxa_keys_data,
272 },
273};
274
275static void __init vpac270_keys_init(void)
276{
277 platform_device_register(&vpac270_pxa_keys);
278}
279#else
280static inline void vpac270_keys_init(void) {}
281#endif
282
283/******************************************************************************
284 * LED
285 ******************************************************************************/
286#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
287struct gpio_led vpac270_gpio_leds[] = {
288{
289 .name = "vpac270:orange:user",
290 .default_trigger = "none",
291 .gpio = GPIO15_VPAC270_LED_ORANGE,
292 .active_low = 1,
293}
294};
295
296static struct gpio_led_platform_data vpac270_gpio_led_info = {
297 .leds = vpac270_gpio_leds,
298 .num_leds = ARRAY_SIZE(vpac270_gpio_leds),
299};
300
301static struct platform_device vpac270_leds = {
302 .name = "leds-gpio",
303 .id = -1,
304 .dev = {
305 .platform_data = &vpac270_gpio_led_info,
306 }
307};
308
309static void __init vpac270_leds_init(void)
310{
311 platform_device_register(&vpac270_leds);
312}
313#else
314static inline void vpac270_leds_init(void) {}
315#endif
316
317/******************************************************************************
318 * USB Host
319 ******************************************************************************/
320#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
321static int vpac270_ohci_init(struct device *dev)
322{
323 UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
324 return 0;
325}
326
327static struct pxaohci_platform_data vpac270_ohci_info = {
328 .port_mode = PMM_PERPORT_MODE,
329 .flags = ENABLE_PORT1 | ENABLE_PORT2 |
330 POWER_CONTROL_LOW | POWER_SENSE_LOW,
331 .init = vpac270_ohci_init,
332};
333
334static void __init vpac270_uhc_init(void)
335{
336 pxa_set_ohci_info(&vpac270_ohci_info);
337}
338#else
339static inline void vpac270_uhc_init(void) {}
340#endif
341
342/******************************************************************************
343 * USB Gadget
344 ******************************************************************************/
345#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
346static struct gpio_vbus_mach_info vpac270_gpio_vbus_info = {
347 .gpio_vbus = GPIO41_VPAC270_UDC_DETECT,
348 .gpio_pullup = -1,
349};
350
351static struct platform_device vpac270_gpio_vbus = {
352 .name = "gpio-vbus",
353 .id = -1,
354 .dev = {
355 .platform_data = &vpac270_gpio_vbus_info,
356 },
357};
358
359static void vpac270_udc_command(int cmd)
360{
361 if (cmd == PXA2XX_UDC_CMD_CONNECT)
362 UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE;
363 else if (cmd == PXA2XX_UDC_CMD_DISCONNECT)
364 UP2OCR = UP2OCR_HXOE;
365}
366
367static struct pxa2xx_udc_mach_info vpac270_udc_info __initdata = {
368 .udc_command = vpac270_udc_command,
369 .gpio_pullup = -1,
370};
371
372static void __init vpac270_udc_init(void)
373{
374 pxa_set_udc_info(&vpac270_udc_info);
375 platform_device_register(&vpac270_gpio_vbus);
376}
377#else
378static inline void vpac270_udc_init(void) {}
379#endif
380
381/******************************************************************************
382 * Ethernet
383 ******************************************************************************/
384#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
385static struct resource vpac270_dm9000_resources[] = {
386 [0] = {
387 .start = PXA_CS2_PHYS + 0x300,
388 .end = PXA_CS2_PHYS + 0x303,
389 .flags = IORESOURCE_MEM,
390 },
391 [1] = {
392 .start = PXA_CS2_PHYS + 0x304,
393 .end = PXA_CS2_PHYS + 0x343,
394 .flags = IORESOURCE_MEM,
395 },
396 [2] = {
397 .start = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ),
398 .end = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ),
399 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
400 },
401};
402
403static struct dm9000_plat_data vpac270_dm9000_platdata = {
404 .flags = DM9000_PLATF_32BITONLY,
405};
406
407static struct platform_device vpac270_dm9000_device = {
408 .name = "dm9000",
409 .id = -1,
410 .num_resources = ARRAY_SIZE(vpac270_dm9000_resources),
411 .resource = vpac270_dm9000_resources,
412 .dev = {
413 .platform_data = &vpac270_dm9000_platdata,
414 }
415};
416
417static void __init vpac270_eth_init(void)
418{
419 platform_device_register(&vpac270_dm9000_device);
420}
421#else
422static inline void vpac270_eth_init(void) {}
423#endif
424
425/******************************************************************************
426 * Audio and Touchscreen
427 ******************************************************************************/
428#if defined(CONFIG_TOUCHSCREEN_UCB1400) || \
429 defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
430static pxa2xx_audio_ops_t vpac270_ac97_pdata = {
431 .reset_gpio = 95,
432};
433
434static struct ucb1400_pdata vpac270_ucb1400_pdata = {
435 .irq = IRQ_GPIO(GPIO113_VPAC270_TS_IRQ),
436};
437
438static struct platform_device vpac270_ucb1400_device = {
439 .name = "ucb1400_core",
440 .id = -1,
441 .dev = {
442 .platform_data = &vpac270_ucb1400_pdata,
443 },
444};
445
446static void __init vpac270_ts_init(void)
447{
448 pxa_set_ac97_info(&vpac270_ac97_pdata);
449 platform_device_register(&vpac270_ucb1400_device);
450}
451#else
452static inline void vpac270_ts_init(void) {}
453#endif
454
455/******************************************************************************
456 * RTC
457 ******************************************************************************/
458#if defined(CONFIG_RTC_DRV_DS1307) || defined(CONFIG_RTC_DRV_DS1307_MODULE)
459static struct i2c_board_info __initdata vpac270_i2c_devs[] = {
460 {
461 I2C_BOARD_INFO("ds1339", 0x68),
462 },
463};
464
465static void __init vpac270_rtc_init(void)
466{
467 pxa_set_i2c_info(NULL);
468 i2c_register_board_info(0, ARRAY_AND_SIZE(vpac270_i2c_devs));
469}
470#else
471static inline void vpac270_rtc_init(void) {}
472#endif
473
474/******************************************************************************
475 * Framebuffer
476 ******************************************************************************/
477#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
478static struct pxafb_mode_info vpac270_lcd_modes[] = {
479{
480 .pixclock = 57692,
481 .xres = 640,
482 .yres = 480,
483 .bpp = 32,
484 .depth = 18,
485
486 .left_margin = 144,
487 .right_margin = 32,
488 .upper_margin = 13,
489 .lower_margin = 30,
490
491 .hsync_len = 32,
492 .vsync_len = 2,
493
494 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
495},
496};
497
498static struct pxafb_mach_info vpac270_lcd_screen = {
499 .modes = vpac270_lcd_modes,
500 .num_modes = ARRAY_SIZE(vpac270_lcd_modes),
501 .lcd_conn = LCD_COLOR_TFT_18BPP,
502};
503
504static void vpac270_lcd_power(int on, struct fb_var_screeninfo *info)
505{
506 gpio_set_value(GPIO81_VPAC270_BKL_ON, on);
507}
508
509static void __init vpac270_lcd_init(void)
510{
511 int ret;
512
513 ret = gpio_request(GPIO81_VPAC270_BKL_ON, "BKL-ON");
514 if (ret) {
515 pr_err("Requesting BKL-ON GPIO failed!\n");
516 goto err;
517 }
518
519 ret = gpio_direction_output(GPIO81_VPAC270_BKL_ON, 1);
520 if (ret) {
521 pr_err("Setting BKL-ON GPIO direction failed!\n");
522 goto err2;
523 }
524
525 vpac270_lcd_screen.pxafb_lcd_power = vpac270_lcd_power;
526 set_pxa_fb_info(&vpac270_lcd_screen);
527 return;
528
529err2:
530 gpio_free(GPIO81_VPAC270_BKL_ON);
531err:
532 return;
533}
534#else
535static inline void vpac270_lcd_init(void) {}
536#endif
537
538/******************************************************************************
539 * PATA IDE
540 ******************************************************************************/
541#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
542static struct pata_platform_info vpac270_pata_pdata = {
543 .ioport_shift = 1,
544 .irq_flags = IRQF_TRIGGER_RISING,
545};
546
547static struct resource vpac270_ide_resources[] = {
548 [0] = { /* I/O Base address */
549 .start = PXA_CS3_PHYS + 0x120,
550 .end = PXA_CS3_PHYS + 0x13f,
551 .flags = IORESOURCE_MEM
552 },
553 [1] = { /* CTL Base address */
554 .start = PXA_CS3_PHYS + 0x15c,
555 .end = PXA_CS3_PHYS + 0x15f,
556 .flags = IORESOURCE_MEM
557 },
558 [2] = { /* IDE IRQ pin */
559 .start = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ),
560 .end = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ),
561 .flags = IORESOURCE_IRQ
562 }
563};
564
565static struct platform_device vpac270_ide_device = {
566 .name = "pata_platform",
567 .num_resources = ARRAY_SIZE(vpac270_ide_resources),
568 .resource = vpac270_ide_resources,
569 .dev = {
570 .platform_data = &vpac270_pata_pdata,
571 }
572};
573
574static void __init vpac270_ide_init(void)
575{
576 platform_device_register(&vpac270_ide_device);
577}
578#else
579static inline void vpac270_ide_init(void) {}
580#endif
581
582/******************************************************************************
583 * Machine init
584 ******************************************************************************/
585static void __init vpac270_init(void)
586{
587 pxa2xx_mfp_config(ARRAY_AND_SIZE(vpac270_pin_config));
588
589 pxa_set_ffuart_info(NULL);
590 pxa_set_btuart_info(NULL);
591 pxa_set_stuart_info(NULL);
592
593 vpac270_lcd_init();
594 vpac270_mmc_init();
595 vpac270_nor_init();
596 vpac270_onenand_init();
597 vpac270_leds_init();
598 vpac270_keys_init();
599 vpac270_uhc_init();
600 vpac270_udc_init();
601 vpac270_eth_init();
602 vpac270_ts_init();
603 vpac270_rtc_init();
604 vpac270_ide_init();
605}
606
607MACHINE_START(VPAC270, "Voipac PXA270")
608 .phys_io = 0x40000000,
609 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
610 .boot_params = 0xa0000100,
611 .map_io = pxa_map_io,
612 .init_irq = pxa27x_init_irq,
613 .timer = &pxa_timer,
614 .init_machine = vpac270_init
615MACHINE_END
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
new file mode 100644
index 000000000000..f5d1ae3db3a4
--- /dev/null
+++ b/arch/arm/mach-pxa/z2.c
@@ -0,0 +1,609 @@
1/*
2 * linux/arch/arm/mach-pxa/z2.c
3 *
4 * Support for the Zipit Z2 Handheld device.
5 *
6 * Author: Ken McGuire
7 * Created: Jan 25, 2009
8 * Based on mainstone.c as modified for the Zipit Z2.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/platform_device.h>
16#include <linux/mtd/mtd.h>
17#include <linux/mtd/partitions.h>
18#include <linux/pwm_backlight.h>
19#include <linux/dma-mapping.h>
20#include <linux/spi/spi.h>
21#include <linux/spi/libertas_spi.h>
22#include <linux/spi/lms283gf05.h>
23#include <linux/power_supply.h>
24#include <linux/mtd/physmap.h>
25#include <linux/gpio.h>
26#include <linux/gpio_keys.h>
27#include <linux/delay.h>
28
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31
32#include <mach/pxa27x.h>
33#include <mach/mfp-pxa27x.h>
34#include <mach/z2.h>
35#include <mach/pxafb.h>
36#include <mach/mmc.h>
37#include <mach/pxa27x_keypad.h>
38#include <mach/pxa2xx_spi.h>
39
40#include <plat/i2c.h>
41
42#include "generic.h"
43#include "devices.h"
44
45/******************************************************************************
46 * Pin configuration
47 ******************************************************************************/
48static unsigned long z2_pin_config[] = {
49
50 /* LCD - 16bpp Active TFT */
51 GPIO58_LCD_LDD_0,
52 GPIO59_LCD_LDD_1,
53 GPIO60_LCD_LDD_2,
54 GPIO61_LCD_LDD_3,
55 GPIO62_LCD_LDD_4,
56 GPIO63_LCD_LDD_5,
57 GPIO64_LCD_LDD_6,
58 GPIO65_LCD_LDD_7,
59 GPIO66_LCD_LDD_8,
60 GPIO67_LCD_LDD_9,
61 GPIO68_LCD_LDD_10,
62 GPIO69_LCD_LDD_11,
63 GPIO70_LCD_LDD_12,
64 GPIO71_LCD_LDD_13,
65 GPIO72_LCD_LDD_14,
66 GPIO73_LCD_LDD_15,
67 GPIO74_LCD_FCLK,
68 GPIO75_LCD_LCLK,
69 GPIO76_LCD_PCLK,
70 GPIO77_LCD_BIAS,
71 GPIO19_GPIO, /* LCD reset */
72 GPIO88_GPIO, /* LCD chipselect */
73
74 /* PWM */
75 GPIO115_PWM1_OUT, /* Keypad Backlight */
76 GPIO11_PWM2_OUT, /* LCD Backlight */
77
78 /* MMC */
79 GPIO32_MMC_CLK,
80 GPIO112_MMC_CMD,
81 GPIO92_MMC_DAT_0,
82 GPIO109_MMC_DAT_1,
83 GPIO110_MMC_DAT_2,
84 GPIO111_MMC_DAT_3,
85 GPIO96_GPIO, /* SD detect */
86
87 /* STUART */
88 GPIO46_STUART_RXD,
89 GPIO47_STUART_TXD,
90
91 /* Keypad */
92 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
93 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
94 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
95 GPIO34_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
96 GPIO38_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
97 GPIO16_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
98 GPIO17_KP_MKIN_6 | WAKEUP_ON_LEVEL_HIGH,
99 GPIO103_KP_MKOUT_0,
100 GPIO104_KP_MKOUT_1,
101 GPIO105_KP_MKOUT_2,
102 GPIO106_KP_MKOUT_3,
103 GPIO107_KP_MKOUT_4,
104 GPIO108_KP_MKOUT_5,
105 GPIO35_KP_MKOUT_6,
106 GPIO41_KP_MKOUT_7,
107
108 /* I2C */
109 GPIO117_I2C_SCL,
110 GPIO118_I2C_SDA,
111
112 /* SSP1 */
113 GPIO23_SSP1_SCLK, /* SSP1_SCK */
114 GPIO25_SSP1_TXD, /* SSP1_TXD */
115 GPIO26_SSP1_RXD, /* SSP1_RXD */
116
117 /* SSP2 */
118 GPIO22_SSP2_SCLK, /* SSP2_SCK */
119 GPIO13_SSP2_TXD, /* SSP2_TXD */
120 GPIO40_SSP2_RXD, /* SSP2_RXD */
121
122 /* LEDs */
123 GPIO10_GPIO, /* WiFi LED */
124 GPIO83_GPIO, /* Charging LED */
125 GPIO85_GPIO, /* Charged LED */
126
127 /* I2S */
128 GPIO28_I2S_BITCLK_OUT,
129 GPIO29_I2S_SDATA_IN,
130 GPIO30_I2S_SDATA_OUT,
131 GPIO31_I2S_SYNC,
132 GPIO113_I2S_SYSCLK,
133
134 /* MISC */
135 GPIO0_GPIO, /* AC power detect */
136 GPIO1_GPIO, /* Power button */
137 GPIO37_GPIO, /* Headphone detect */
138 GPIO98_GPIO, /* Lid switch */
139 GPIO14_GPIO, /* WiFi Reset */
140 GPIO15_GPIO, /* WiFi Power */
141 GPIO24_GPIO, /* WiFi CS */
142 GPIO36_GPIO, /* WiFi IRQ */
143 GPIO88_GPIO, /* LCD CS */
144};
145
146/******************************************************************************
147 * NOR Flash
148 ******************************************************************************/
149#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
150static struct resource z2_flash_resource = {
151 .start = PXA_CS0_PHYS,
152 .end = PXA_CS0_PHYS + SZ_8M - 1,
153 .flags = IORESOURCE_MEM,
154};
155
156static struct mtd_partition z2_flash_parts[] = {
157 {
158 .name = "U-Boot Bootloader",
159 .offset = 0x0,
160 .size = 0x20000,
161 },
162 {
163 .name = "Linux Kernel",
164 .offset = 0x20000,
165 .size = 0x220000,
166 },
167 {
168 .name = "Filesystem",
169 .offset = 0x240000,
170 .size = 0x5b0000,
171 },
172 {
173 .name = "U-Boot Environment",
174 .offset = 0x7f0000,
175 .size = MTDPART_SIZ_FULL,
176 },
177};
178
179static struct physmap_flash_data z2_flash_data = {
180 .width = 2,
181 .parts = z2_flash_parts,
182 .nr_parts = ARRAY_SIZE(z2_flash_parts),
183};
184
185static struct platform_device z2_flash = {
186 .name = "physmap-flash",
187 .id = -1,
188 .resource = &z2_flash_resource,
189 .num_resources = 1,
190 .dev = {
191 .platform_data = &z2_flash_data,
192 },
193};
194
195static void __init z2_nor_init(void)
196{
197 platform_device_register(&z2_flash);
198}
199#else
200static inline void z2_nor_init(void) {}
201#endif
202
203/******************************************************************************
204 * Backlight
205 ******************************************************************************/
206#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
207static struct platform_pwm_backlight_data z2_backlight_data[] = {
208 [0] = {
209 /* Keypad Backlight */
210 .pwm_id = 1,
211 .max_brightness = 1023,
212 .dft_brightness = 512,
213 .pwm_period_ns = 1260320,
214 },
215 [1] = {
216 /* LCD Backlight */
217 .pwm_id = 2,
218 .max_brightness = 1023,
219 .dft_brightness = 512,
220 .pwm_period_ns = 1260320,
221 },
222};
223
224static struct platform_device z2_backlight_devices[2] = {
225 {
226 .name = "pwm-backlight",
227 .id = 0,
228 .dev = {
229 .platform_data = &z2_backlight_data[1],
230 },
231 },
232 {
233 .name = "pwm-backlight",
234 .id = 1,
235 .dev = {
236 .platform_data = &z2_backlight_data[0],
237 },
238 },
239};
240static void __init z2_pwm_init(void)
241{
242 platform_device_register(&z2_backlight_devices[0]);
243 platform_device_register(&z2_backlight_devices[1]);
244}
245#else
246static inline void z2_pwm_init(void) {}
247#endif
248
249/******************************************************************************
250 * Framebuffer
251 ******************************************************************************/
252#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
253static struct pxafb_mode_info z2_lcd_modes[] = {
254{
255 .pixclock = 192000,
256 .xres = 240,
257 .yres = 320,
258 .bpp = 16,
259
260 .left_margin = 4,
261 .right_margin = 8,
262 .upper_margin = 4,
263 .lower_margin = 8,
264
265 .hsync_len = 4,
266 .vsync_len = 4,
267},
268};
269
270static struct pxafb_mach_info z2_lcd_screen = {
271 .modes = z2_lcd_modes,
272 .num_modes = ARRAY_SIZE(z2_lcd_modes),
273 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_BIAS_ACTIVE_LOW |
274 LCD_ALTERNATE_MAPPING,
275};
276
277static void __init z2_lcd_init(void)
278{
279 set_pxa_fb_info(&z2_lcd_screen);
280}
281#else
282static inline void z2_lcd_init(void) {}
283#endif
284
285/******************************************************************************
286 * SD/MMC card controller
287 ******************************************************************************/
288#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
289static struct pxamci_platform_data z2_mci_platform_data = {
290 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
291 .gpio_card_detect = GPIO96_ZIPITZ2_SD_DETECT,
292 .gpio_power = -1,
293 .gpio_card_ro = -1,
294 .detect_delay_ms = 200,
295};
296
297static void __init z2_mmc_init(void)
298{
299 pxa_set_mci_info(&z2_mci_platform_data);
300}
301#else
302static inline void z2_mmc_init(void) {}
303#endif
304
305/******************************************************************************
306 * LEDs
307 ******************************************************************************/
308#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
309struct gpio_led z2_gpio_leds[] = {
310{
311 .name = "z2:green:wifi",
312 .default_trigger = "none",
313 .gpio = GPIO10_ZIPITZ2_LED_WIFI,
314 .active_low = 1,
315}, {
316 .name = "z2:green:charged",
317 .default_trigger = "none",
318 .gpio = GPIO85_ZIPITZ2_LED_CHARGED,
319 .active_low = 1,
320}, {
321 .name = "z2:amber:charging",
322 .default_trigger = "none",
323 .gpio = GPIO83_ZIPITZ2_LED_CHARGING,
324 .active_low = 1,
325},
326};
327
328static struct gpio_led_platform_data z2_gpio_led_info = {
329 .leds = z2_gpio_leds,
330 .num_leds = ARRAY_SIZE(z2_gpio_leds),
331};
332
333static struct platform_device z2_leds = {
334 .name = "leds-gpio",
335 .id = -1,
336 .dev = {
337 .platform_data = &z2_gpio_led_info,
338 }
339};
340
341static void __init z2_leds_init(void)
342{
343 platform_device_register(&z2_leds);
344}
345#else
346static inline void z2_leds_init(void) {}
347#endif
348
349/******************************************************************************
350 * GPIO keyboard
351 ******************************************************************************/
352#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
353static unsigned int z2_matrix_keys[] = {
354 KEY(0, 0, KEY_OPTION),
355 KEY(1, 0, KEY_UP),
356 KEY(2, 0, KEY_DOWN),
357 KEY(3, 0, KEY_LEFT),
358 KEY(4, 0, KEY_RIGHT),
359 KEY(5, 0, KEY_END),
360 KEY(6, 0, KEY_KPPLUS),
361
362 KEY(0, 1, KEY_HOME),
363 KEY(1, 1, KEY_Q),
364 KEY(2, 1, KEY_I),
365 KEY(3, 1, KEY_G),
366 KEY(4, 1, KEY_X),
367 KEY(5, 1, KEY_ENTER),
368 KEY(6, 1, KEY_KPMINUS),
369
370 KEY(0, 2, KEY_PAGEUP),
371 KEY(1, 2, KEY_W),
372 KEY(2, 2, KEY_O),
373 KEY(3, 2, KEY_H),
374 KEY(4, 2, KEY_C),
375 KEY(5, 2, KEY_LEFTALT),
376
377 KEY(0, 3, KEY_PAGEDOWN),
378 KEY(1, 3, KEY_E),
379 KEY(2, 3, KEY_P),
380 KEY(3, 3, KEY_J),
381 KEY(4, 3, KEY_V),
382 KEY(5, 3, KEY_LEFTSHIFT),
383
384 KEY(0, 4, KEY_ESC),
385 KEY(1, 4, KEY_R),
386 KEY(2, 4, KEY_A),
387 KEY(3, 4, KEY_K),
388 KEY(4, 4, KEY_B),
389 KEY(5, 4, KEY_LEFTCTRL),
390
391 KEY(0, 5, KEY_TAB),
392 KEY(1, 5, KEY_T),
393 KEY(2, 5, KEY_S),
394 KEY(3, 5, KEY_L),
395 KEY(4, 5, KEY_N),
396 KEY(5, 5, KEY_SPACE),
397
398 KEY(0, 6, KEY_STOPCD),
399 KEY(1, 6, KEY_Y),
400 KEY(2, 6, KEY_D),
401 KEY(3, 6, KEY_BACKSPACE),
402 KEY(4, 6, KEY_M),
403 KEY(5, 6, KEY_COMMA),
404
405 KEY(0, 7, KEY_PLAYCD),
406 KEY(1, 7, KEY_U),
407 KEY(2, 7, KEY_F),
408 KEY(3, 7, KEY_Z),
409 KEY(4, 7, KEY_SEMICOLON),
410 KEY(5, 7, KEY_DOT),
411};
412
413static struct pxa27x_keypad_platform_data z2_keypad_platform_data = {
414 .matrix_key_rows = 7,
415 .matrix_key_cols = 8,
416 .matrix_key_map = z2_matrix_keys,
417 .matrix_key_map_size = ARRAY_SIZE(z2_matrix_keys),
418
419 .debounce_interval = 30,
420};
421
422static void __init z2_mkp_init(void)
423{
424 pxa_set_keypad_info(&z2_keypad_platform_data);
425}
426#else
427static inline void z2_mkp_init(void) {}
428#endif
429
430/******************************************************************************
431 * GPIO keys
432 ******************************************************************************/
433#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
434static struct gpio_keys_button z2_pxa_buttons[] = {
435 {KEY_POWER, GPIO1_ZIPITZ2_POWER_BUTTON, 0, "Power Button" },
436 {KEY_CLOSE, GPIO98_ZIPITZ2_LID_BUTTON, 0, "Lid Button" },
437};
438
439static struct gpio_keys_platform_data z2_pxa_keys_data = {
440 .buttons = z2_pxa_buttons,
441 .nbuttons = ARRAY_SIZE(z2_pxa_buttons),
442};
443
444static struct platform_device z2_pxa_keys = {
445 .name = "gpio-keys",
446 .id = -1,
447 .dev = {
448 .platform_data = &z2_pxa_keys_data,
449 },
450};
451
452static void __init z2_keys_init(void)
453{
454 platform_device_register(&z2_pxa_keys);
455}
456#else
457static inline void z2_keys_init(void) {}
458#endif
459
460/******************************************************************************
461 * SSP Devices - WiFi and LCD control
462 ******************************************************************************/
463#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
464/* WiFi */
465static int z2_lbs_spi_setup(struct spi_device *spi)
466{
467 int ret = 0;
468
469 ret = gpio_request(GPIO15_ZIPITZ2_WIFI_POWER, "WiFi Power");
470 if (ret)
471 goto err;
472
473 ret = gpio_direction_output(GPIO15_ZIPITZ2_WIFI_POWER, 1);
474 if (ret)
475 goto err2;
476
477 ret = gpio_request(GPIO14_ZIPITZ2_WIFI_RESET, "WiFi Reset");
478 if (ret)
479 goto err2;
480
481 ret = gpio_direction_output(GPIO14_ZIPITZ2_WIFI_RESET, 0);
482 if (ret)
483 goto err3;
484
485 /* Reset the card */
486 mdelay(180);
487 gpio_set_value(GPIO14_ZIPITZ2_WIFI_RESET, 1);
488 mdelay(20);
489
490 spi->bits_per_word = 16;
491 spi->mode = SPI_MODE_2,
492
493 spi_setup(spi);
494
495 return 0;
496
497err3:
498 gpio_free(GPIO14_ZIPITZ2_WIFI_RESET);
499err2:
500 gpio_free(GPIO15_ZIPITZ2_WIFI_POWER);
501err:
502 return ret;
503};
504
505static int z2_lbs_spi_teardown(struct spi_device *spi)
506{
507 gpio_set_value(GPIO14_ZIPITZ2_WIFI_RESET, 0);
508 gpio_set_value(GPIO15_ZIPITZ2_WIFI_POWER, 0);
509 gpio_free(GPIO14_ZIPITZ2_WIFI_RESET);
510 gpio_free(GPIO15_ZIPITZ2_WIFI_POWER);
511 return 0;
512
513};
514
515static struct pxa2xx_spi_chip z2_lbs_chip_info = {
516 .rx_threshold = 8,
517 .tx_threshold = 8,
518 .timeout = 1000,
519 .gpio_cs = GPIO24_ZIPITZ2_WIFI_CS,
520};
521
522static struct libertas_spi_platform_data z2_lbs_pdata = {
523 .use_dummy_writes = 1,
524 .setup = z2_lbs_spi_setup,
525 .teardown = z2_lbs_spi_teardown,
526};
527
528/* LCD */
529static struct pxa2xx_spi_chip lms283_chip_info = {
530 .rx_threshold = 1,
531 .tx_threshold = 1,
532 .timeout = 64,
533 .gpio_cs = GPIO88_ZIPITZ2_LCD_CS,
534};
535
536static const struct lms283gf05_pdata lms283_pdata = {
537 .reset_gpio = GPIO19_ZIPITZ2_LCD_RESET,
538};
539
540static struct spi_board_info spi_board_info[] __initdata = {
541{
542 .modalias = "libertas_spi",
543 .platform_data = &z2_lbs_pdata,
544 .controller_data = &z2_lbs_chip_info,
545 .irq = gpio_to_irq(GPIO36_ZIPITZ2_WIFI_IRQ),
546 .max_speed_hz = 13000000,
547 .bus_num = 1,
548 .chip_select = 0,
549},
550{
551 .modalias = "lms283gf05",
552 .controller_data = &lms283_chip_info,
553 .platform_data = &lms283_pdata,
554 .max_speed_hz = 400000,
555 .bus_num = 2,
556 .chip_select = 0,
557},
558};
559
560static struct pxa2xx_spi_master pxa_ssp1_master_info = {
561 .clock_enable = CKEN_SSP,
562 .num_chipselect = 1,
563 .enable_dma = 1,
564};
565
566static struct pxa2xx_spi_master pxa_ssp2_master_info = {
567 .clock_enable = CKEN_SSP2,
568 .num_chipselect = 1,
569};
570
571static void __init z2_spi_init(void)
572{
573 pxa2xx_set_spi_info(1, &pxa_ssp1_master_info);
574 pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
575 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
576}
577#else
578static inline void z2_spi_init(void) {}
579#endif
580
581/******************************************************************************
582 * Machine init
583 ******************************************************************************/
584static void __init z2_init(void)
585{
586 pxa2xx_mfp_config(ARRAY_AND_SIZE(z2_pin_config));
587
588 z2_lcd_init();
589 z2_mmc_init();
590 z2_mkp_init();
591
592 pxa_set_i2c_info(NULL);
593
594 z2_spi_init();
595 z2_nor_init();
596 z2_pwm_init();
597 z2_leds_init();
598 z2_keys_init();
599}
600
601MACHINE_START(ZIPIT2, "Zipit Z2")
602 .phys_io = 0x40000000,
603 .boot_params = 0xa0000100,
604 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
605 .map_io = pxa_map_io,
606 .init_irq = pxa27x_init_irq,
607 .timer = &pxa_timer,
608 .init_machine = z2_init,
609MACHINE_END
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 39896d883584..3680f6a90623 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -644,7 +644,7 @@ static struct pxafb_mach_info zeus_fb_info = {
644 644
645static struct pxamci_platform_data zeus_mci_platform_data = { 645static struct pxamci_platform_data zeus_mci_platform_data = {
646 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 646 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
647 .detect_delay = HZ/4, 647 .detect_delay_ms = 250,
648 .gpio_card_detect = ZEUS_MMC_CD_GPIO, 648 .gpio_card_detect = ZEUS_MMC_CD_GPIO,
649 .gpio_card_ro = ZEUS_MMC_WP_GPIO, 649 .gpio_card_ro = ZEUS_MMC_WP_GPIO,
650 .gpio_card_ro_invert = 1, 650 .gpio_card_ro_invert = 1,
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 2b4043c04d0c..c479cbecf784 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -218,7 +218,7 @@ static inline void zylonite_init_lcd(void) {}
218 218
219#if defined(CONFIG_MMC) 219#if defined(CONFIG_MMC)
220static struct pxamci_platform_data zylonite_mci_platform_data = { 220static struct pxamci_platform_data zylonite_mci_platform_data = {
221 .detect_delay = 20, 221 .detect_delay_ms= 200,
222 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 222 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
223 .gpio_card_detect = EXT_GPIO(0), 223 .gpio_card_detect = EXT_GPIO(0),
224 .gpio_card_ro = EXT_GPIO(2), 224 .gpio_card_ro = EXT_GPIO(2),
@@ -226,7 +226,7 @@ static struct pxamci_platform_data zylonite_mci_platform_data = {
226}; 226};
227 227
228static struct pxamci_platform_data zylonite_mci2_platform_data = { 228static struct pxamci_platform_data zylonite_mci2_platform_data = {
229 .detect_delay = 20, 229 .detect_delay_ms= 200,
230 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 230 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
231 .gpio_card_detect = EXT_GPIO(1), 231 .gpio_card_detect = EXT_GPIO(1),
232 .gpio_card_ro = EXT_GPIO(3), 232 .gpio_card_ro = EXT_GPIO(3),
@@ -234,7 +234,7 @@ static struct pxamci_platform_data zylonite_mci2_platform_data = {
234}; 234};
235 235
236static struct pxamci_platform_data zylonite_mci3_platform_data = { 236static struct pxamci_platform_data zylonite_mci3_platform_data = {
237 .detect_delay = 20, 237 .detect_delay_ms= 200,
238 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 238 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
239 .gpio_card_detect = EXT_GPIO(30), 239 .gpio_card_detect = EXT_GPIO(30),
240 .gpio_card_ro = EXT_GPIO(31), 240 .gpio_card_ro = EXT_GPIO(31),
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-03 17:54:28 -0500